Lag-Lead Compensator Design

Transcription

1 Lag-Lead Compenator Deign ELEC 3 Spring 08 Lag or Lead Struture A bai ompenator onit of a gain, one real pole and one real zero Two type: phae-lead and phae-lag Phae-lead: provide poitive phae hift and tend to move the dominant branhe of the root lou to the left inreae the amount of damping, and hene, the peed of the repone Phae-lag: oppoite effet

2 Compenator Tranfer Funtion ( ( ( p z K G Phae-lead: z i to the right of p Phae-lag: z i to the left of p At any point =, the ompenator provide a magnitude and a phae angle ( ( ( p z K G p z K Re( Im( tan Re( Im( tan ] [Im( ] [Re( ] [Im( ] [Re( ( p z K p z K G

3 Lag Compenation Improve teady-tate error by lightly rehaping the root lou of an unompenated ytem Very little effet on the tranient repone harateriti Unlike PI ompenation, the pole and zero are plaed loe to the origin doe not inreae the ytem type Compenator: Lag Funtion: Tranfer funtion: Improve teady-tate error z G ( K p Charateriti:. Error i improved but not driven to zero. Pole at p i mall and negative 3. Zero at z i loe to and to the left of the pole 4. Pole and zero are plaed loe to the origin to improve the tati error ontant by a large fator equal to = z /p >> 5. Pole and zero are plaed loe to eah other to minimize angular ontribution to root lou 6. Ative iruit are not required to implement 3

4 Before and after Lag Compenation 4

5 Compenator: Lead Funtion: Tranfer funtion: Improve tranient repone z G ( K p Charateriti:. Zero at z and pole at p are eleted to put deign point on root lou.. Pole at p i more negative than the zero (i.e., z i to the right of p or = z /p < 3. Ative iruit are not required to implement 5

6 Control Ation: Lead or Lag Vo ( G( V ( i R R 4 3 R R ( RC ( R C Lag ompenator Lead ompenator 6

7 Compenator: Lag-lead Funtion: Improve teady-tate error and tranient repone ( zlag( zlead Tranfer funtion: G ( K ( p lag( p lead Charateriti:. Lag zero at z lag and lag pole at p lag improve teady-tate error.. Lead zero at z lead and lead pole at p lead improve tranient repone 3. Lag pole at p lag i mall and negative 4. Lag zero at z lag i loe to and to the left of p lag 5. Lead zero at z lead and lead pole at p lead eleted to put deign point on root lou. 6. Lead pole at p lead more negative than z lead 7. Ative iruit are not required to implement Control Ation: Lag-Lead Vo ( G( V ( i R R 6 5 R R 4 3 [ C ( R R ( R C 3 [ C ]( R C ( R R 4 ] 7

8 Paive-iruit Lag-lead ompenator Outline of the Proedure Determine if the ytem type N need to be inreaed in order to atify the teady-tate error peifiation, and if neeary, augment the plant with the required number of pole at the origin ( = 0 Chooe the point in the -plane to be the loation of the dominant loed-loop pole baed on the tranient performane peifiation 8

9 Outline of the Proedure 3 Deign the lead ompenator 3. Compute the phae hift of the plant to ee if i already on the root lou. If o, the only ompenation needed i a proper gain. If not, ompute the amount of phae hift that the ompenator mut provide. 3. Selet the loation for either z or p, and ompute the loation of the other. 3.3 Compute the ompenator gain. Outline of the Proedure 4 Determine how muh more improvement in teady-tate error i required 5 Deign the lag ompenator to yield the required teady-tate error 6 Simulate the ytem to be ure all requirement have been met. 9

10 Example 9.6 Deign a lag-lead ompenator for the ytem hown to improve the teady-tate error by tenfold for a ramp input if the ytem i operating with 0% overhoot and a twofold redution in ettling time. 0

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15 Example Deign a ompenator in order for the ytem G p 8 ( 4 to meet the given peifiation: teady-tate error for a unit-ramp input of 0. tep repone ettling time of e tep repone overhoot of 0% 5

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