1.0 Introduction. 1.1 Nanotechnology Historical Developments

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1 1.0 Introduction 1.1 Nanotechnology Historical Developments Around 370BC, Democritus a Greek philosopher developed the atomic theory of matter. Nano in GREEK means DWARF. The prefix nano means a billionth (10-9 )! Nanotechnology deals with structures where at least one physical dimension is of the nanometer scale. Nanostructures are not new! They have been around for as long as earth itself. For example, the abalone constructs very strong shells based on nanoparticles calcium carbonate organized into strong nanostructured bricks glued together by a carbohydrate-protein mix preventing cracks on the outside from propagating in. Not clear when humans first started taking advantage of nanosized materials. Fourth-century A.D. Roman glassmakers made cups from soda lime glass containing silver and gold nanoparticles. The color of the cup changes from green to deep red when a light source is placed inside. In fact, the medieval cathedral window contains nanoparticles in the glass. Another example is photography first developed in the 18 th and 19 th centuries. The photographic film is emulsion thin layer of gelatin containing silver halides, e.g. silver bromide, and a transparent cellulose acetate. Light decomposes the silver halide, producing nanoparticles of silver which forms the image pixel. Several well known scientists worked on photography in the 19 th century, including the well-known e.m. specialist James Clark Maxwell, who produced the first color photograph in In 1883, American inventor George Eastman who later founded Kodak Corp. produced film and later made it flexible so that it can be rolled. In 1857 Michael Faraday published a paper in the Royal Society which attempted to explain how metal particles affected color on church windows and was subsequently clarified by Gustav Mie in Richard Feynman was awarded the Nobel Prize 1965 for his quantributions to quantum electrodynamics, although he was a true visionary of modern day nanotechnology. He was a very gifted teacher and artist see his lighthearted autobiographical sketch, Surely You re Joking, Mr. Feynman. In 1960, he presented his visionary and prophetic lecture at the APS There is plenty of room at the bottom, which talked about possibility and potential of nanosized materials. He envisioned e-beam lithography, atomic manipulation (now done with scanning tunneling microscopes), high density circuit integration, and nano bio-systems. His lecture only caught on with scientists once technology was in place. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

2 Nanotechnology - Historical Developments (contd) see Feynman s lecture - Appendix A There were other visionaries Ralph Landauer of IBM, in 1957 predicted nanoscale electronics and the importance of quantum mechanical effects. First 2-D quantum wells were fabricated in the early 1970s in IBM and Bell Labs. In the eighties. Development of the scanning tunneling microscope (STM) and the atomic force microscope (AFM) key tools for viewing, characterizing, and atomically manipulating nanostructures. First observation of quantized conductance. Fabrication of the single electron transistor. Discovery of high Tc superconductivity. Development of e-beam lithography. Discovery of giant magnetoresistance major implications in magnetic storage. In the nineties. Fabrication of the first 3-D photonic crystal. Fabrication of carbon nanotubes (CNT) and demonstration of the first CNT field effect transistor. Demonstration of self-assembly of molecules. etc. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

3 1.2 Nanoelectronics and Information Technology Information in the real world is analog in nature and bound to physical media. Operations on information involve matter and energy. Fundamental to Information Technology (IT) is the relation between information and physics. Fig. 1.1 Major areas of Information Technology Fig. 1.1 illustrates the major areas of IT. Raw information from the outside world comes from other technical systems or humans, and is converted by SENSORS to a usable form, e.g. digital camera coverts a scenery/portrait which can be processed and TRANSMITTED. Information acquisition is analogous to the biological system where one or more of the five senses are used to obtain information that is processed by the brain or central nervous system. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

4 Nanoelectronics and Information Technology (contd) From Figure 1.1 LOGIC AND LOCAL MEMORY elements constitute the core of information processing and rely on microelectronic and emerging nanoelectronic concepts. Fig. 1.2 Connection between the IT areas and material systems. Nanoelectronics can be broadly defined as electronics with a minimum feature size below 100 nm. Decreasing feature size involves a number of novel issues and brings us to the regime where quantum effects dominate and are utilized for device functions. Storage of information takes place in MASS STORAGE DEVICES, which are usually non-electronic, e.g. hard disk, DVD, etc. The result of information processing, transmission, and retrieval goes to the outside world by means of actuators, e.g., DISPLAYS, loudspeakers, etc. see Physics Today s Nanotech + IT article Appendix B Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

5 1.3 Technology Technology can be defined as a collection of techniques and processes which can be classified as: Additive Methods deposition of thin film materials, including self-controlled selective growth, and assembly of materials and substrates by bonding, soldering, glueing. Subtractive Methods material removal by chemical and physical etching, mechanical milling, radiation assisted ablation. Modifying methods changing material properties by doping (diffusion or ion implantation) or by process conditions that alter the microstructure (e.g. a-si, mc-si, nc-si, poly-si). Fig. 1.3 Classification of techniques and processes in technology. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

6 CMOS Technology Can be divided into two phases design and fabrication. Design phase well-established knowledge and covered well in other courses. CMOS chips go through an elaborate processing sequence as shown in Fig Transistor fabrication is sketched in Fig Fig. 2.2 Design and fabrication phases for CMOS circuits. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

7 CMOS Technology (contd) Si wafer + thermal oxidation (tox + fox) + poly-si deposition + photo-resist, and then exposed and patterned, followed by ion-implantation. Metallization cycle through metal layer deposition and patterning, intermetal dielectric layer deposition followed by planarization by chemo-mechanical polishing, and patterning of dielectrics for via formation. Fig. 2.3 Essential steps in MOSFET fabrication to show the self-aligned processes. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

8 Nanotechnological Approaches The classical technique with feature size reduction as with IC technologies is the top-down approach. Here, manufacturing starts at the wafer level and patterning takes place through lithography and etching. To reduce the minimum feature size, we reduce the wavelength used in photolithography using extreme UV or x-ray lithography. Alternatively, to reduce the bottle neck, imprint techniques can be used. Due to the extreme precision needed, cost of lithographic tools grow almost exponentially. But fabrication of nanostructures can start from individual atoms and molecules, ordered physically or reacted chemically to achieve the desired feature. This is called the bottom-up approach. The order associated with bottom-up approaches is generally small because of disturbances in the formation process over large ranges. This problem can be avoided using a hybrid approach a top-down approach for a coarse definition of the pattern and a bottom-up technique to realise short-range ordered nanostructures. An example of this is illustrated in Fig It uses the (highly controllable) thickness of the thin film (or vertical structures) to define lateral dimensions. The most known variant of this flip-up principle is the so-called spacer technique see Fig. 2.4, which illustrates nm channel length MOSFET fabrication. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

9 Nanotechnological Approaches (contd) A hard mask and/or functional material is deposited conformally as a thin film on course structures made out of a sacrificial material this film thickness defines the final feature size or channel length. Here, the nitride is deposited on photolithographically patterned oxide on a polysi layer. The nitride film is (timed) dry etched anisotropically leaving nitride spaces on oxide sidewalls. The oxide is removed and the poly-si is etched. Next we have dopant implantation using the nitride/poly as mask leading to self-aligned source/drain regions for a MOSFET. This structure can also serve as a stamp which can be used for pattern transfer. For example, by evaporating a thin platinum layer on the relief and printing it onto the surface, Pt nanowires down to 5 nm with spacing of 20 nm have been realized on Si substrates. Fig. 2.4 Spacer technique for self-aligned nm channel length MOSFET. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

10 Nanotechnological Approaches (contd) Self-assembly can be defined as a coordinated action of independent entities under local (not global nor macroscopic) control of driving forces to produce larger, ordered structures. An example of a chemically-controlled self-assembly process is the deposition of diblock copolymer miscelles these are an aggregate of molecules in a colloidal solution as occurs when soap dissolves in water. The miscelles can be uploaded with e.g. compounds containing gold. Combined with conventional lithographic techniques, nano-sized dots regularly arranged over large areas can be realized. Fig. 2.5 AFM topographical images of the (a) top and (b) height profiles of a monomicellar film cast from a solution of HAuCl4 loaded diblock copolymer miscelles on a glass substrate (a) as deposited molecules (b) film after oxygen plasma treatment resulting in bare Au particles on the glass substrate. Distance between dots can be controlled by use of polymers of different chain lengths. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

11 Nanotechnological Approaches (contd) Fig. 2.7 Array of Au dots on Si dots separated by 5 microns. Fig. 2.6 Schematic cross-section of the process for creating nm Au dots in periodic patterns. (a) Template created by direct writing on e-beam resist (b) misceles spin coated onto template (c) e-beal resist lifted off by acetone (d) substrate exposed to oxygen plasma reduces the loaded compound to Au. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

12 Nanotechnology Analysis Methods Diffraction methods used to analyse structural properties of the crystal, amorphous materials, or layered stacks. For good resolution, the beam wavelength has to be the same order of magnitude as the length scale of the nanostructure. Different wavelengths can be used corresponding to photons (x-rays), electrons, ions or neutrons having different energies. Fig. 2.8 HREM of aligned nanowires showing the coherent orientations of Ag atoms in different wires. Transmission electron microscopy (TEM) or high resolution TEM (HREM) yield information about the samples morphology, the structure at or near interfaces, the density of defects in the crystal, etc. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter

13 Nanotechnology Analysis Methods Scanning electron microscopy (SEM) reveals sample morphology. Together with energy of wavelength dispersive x-ray analysis (EDX or WDX), we can get the stoichiometry of the meterial. Secondary ion mass spectroscopy and Auger electron microscopy (SIMS and AES) and binding energy XPS surface analytical methods for near surface composition. Scanning probe microscopy (SPM) sharp tips scans the surface of a sample. The interaction between tip and surface depends on the physical properties of the surface. There are different SPM techniques atomic force microscopy (AFM), electrostatic force microscopy (EFM), magnetic force microscopy (MFM), scanning capacitance microscopy (SCM), near field scanning optical microscopy (NSOM) can also measure local physical properties with nanoscale resolution. SPM is widely used for nanoscale characterization of materials using mechanical, electrical, magnetic, optic, and chemical interactions between tip and surface. SPM also allows manipulation of single atoms or molecules and for contacting single grain electronic devices. Fig. 2.9 AFM image (1.7 by 1.7 microns) Ge nanodots on Si surface. Arokia Nathan E&CE 493 Topic 2/730 Topic 13 Nanoelectronics: Winter