A Simulation Study of Crazy-PSO Controller For Direct Matrix Converter

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1 A multion Study of Crzy-PSO Controller For Diret Mtrix Converter Hlu Gözde 1, M.Cengiz Tplmıoğlu 1 Gzi University, Mltepe, Anr, Turey hlugozde@gmil.om University of Turish Aeronutil Assoition, Anr, Turey tplm@th.edu.tr Astrt Mtrix onverter (MC) is n AC-AC onverter whih provides power flow etween AC power supply nd the lod with different voltge nd urrent requirements. Its reltively smll power iruits nd simple ontrol strutures provide onsiderle dvntges to itself ording to the lssil AC-AC onverter topologies. In this simultion study, optiml ontrol pproh sed on Crzy Prtile Swrm Optimiztion (CPSO) lgorithm is suggested in order to ontrol the Diret Mtrix Converter (DMC). The funtion of CPSO lgorithm in the proposed ontroller is to oth minimize the ost funtion whih is the signifint prt of the optiml ontroller nd lso produe the optimum swithing sttes t eh swithing period. At the end of the study, the results otined from the DMC system show tht the CPSO lgorithm sed optiml ontroller provides desired stedy-stte response towrds different lod frequeny onditions. lso reviewed in detil y Wheeler et l. [] nd Rodriguez et l. [7]. It n e seen from these reviews tht the ontrol tehnique pplied to the MC hs high importne in order to produe desired output voltge nd urrent nd lso stility of the system. In the se of three-phse AC-AC onverter, the DMC hs nine idiretionl power swithes whih re seprted in threes for eh phse s noted ove. In eh swithing period, on-off sttes of the power swithes re hnged y the pplied ontrol tehnique so s to produe the output voltge nd urrent with desired mplitude nd frequeny. Atully, n output voltge of ny phse is totl of the verge vlues of the instntneous input phse voltges trnsferred to the relted output y swithing the hosen power swithes in tht period. Aording to this, overll output voltge of the onverter is otined y ppending these verge output voltges onseutively. Due to provide this mehnism effetively, different ontrol tehniques hve een pplied to DMC in literture so fr [7]. 1. Introdution MATRIX onverter (MC) is silly n AC-AC onverter tht onverts two different AC powers etween eh other, whih hve different voltge nd/or urrent prmeters. But there is signifint differene seprted it from the lssil AC-AC onverters: the mtrix onverters diretly onvert AC power without ny d-lin pitne or the other lrge energy storge elements [1]. In ddition to this, some signifint fetures suh s providing sinusoidl input nd output urrents, hving regenertion pility nd hving reltively simple nd softwre sed ontrol strutures re quired more importne to the MCs [1], []. Although the first ide on MC ws suggested y Hzeltine s ptent in 193 [3] nd the other milestones noted y Friedli nd Kolr [] hve een exposed eginning from 195s, the first prtil wors strt with Venturini nd Alesin in 198 [5], []. Venturini suggested the new ontrol method for single-stge DMC with mxn idiretionl power swithes in his study [11]. This type of MC topology diretly onnets n m-phse voltge soure to n n- phse lod [], [5], [], [7]. Surely, the most useful version of this topology hs n input of 3-phse voltge soure nd n output of 3-phse lod s depited in Fig. 1. Afterwrds, lot of simultions nd prtil studies out this struture hve een relized nd pulished in literture long with developing power eletronis nd ontrol tehnologies. These studies re Fig. 1. DMC system topology with RL lod. In literture, the however, the heuristi optimiztion lgorithms suh s geneti lgorithm, differentil evolution, nt olony et. n offer more powerful methods in order to minimize the ost funtion for DMC ontrol system s similr to the MPC method. When the DMC ontrol system is evluted s n optimiztion prolem, these lgorithms n e used s n optiml ontroller y himself nd their stohsti serh pilities n inrese the roustness of the ontroller towrds different woring onditions. As mtter of ft, Hosseini nd Bei pplied the Lest Men Squre Error (LMSE) method in order to produe the optimum swithing sttes for DMC [8]. After tht, Znhett oliquely used 17

2 Geneti Algorithm in order to utomtilly tune the PI regultor used in VA ground power supply inluding DMC unit ontrolled with spe vetor modultion method in [9], nd Villrroel et l. diretly pplied Fuzzy Logi method for seletion of the swithing sttes of DMC system in 11 [1]. One yer fter, vrni et l. suessfully used Fuzzy Logi ontroller, Prtile Swrm Optimiztion tuned Fuzzy Logi ontroller nd Adptive Neuro-Fuzzy (ANFIS) ontroller s swithing strtegy in n indution motor driver sed on DMC system [11]. At the sme yer, Ghoni et l. used hyrid PSO (HPSO) lgorithm due to the voltge vetor seletion proess of the diret torque ontrol for DMC [1]. This study proposes the heuristi optimiztion lgorithm sed ontrol pproh to oth minimize the ost funtion nd then produe the optimum swithing sttes for DMC woring in different lod frequeny onditions. Heuristi optimiztion lgorithms optimize the prolems itertively in ordne with given lgorithm inluding signifint onvergene rules. The prole solutions re onverged step y step to the rel solution nmed glol optimum in eh itertion. The onvergene rules n involve some rndomness prmeters in order to inrese the ility to go to the glol optimum without flling into the lol optimums. This feture mostly improves roustness of the optimiztion proess. In prllel, the im of using this type of optimiztion lgorithm s ontroller in this study is to provide roustness of DMC system for different woring onditions suh s hnging output frequeny. For this purpose, the CPSO lgorithm whih is introdued y Roy nd Ghoshl in 8 is perred y the uthor euse of its proved superior optimiztion performne mong the other heuristi lgorithms [13].. Diret Mtrix Converter Model A 3x3 DMC hs 9 idiretionl power swithes driven with 7 vlid swithing sttes s mentioned ove. These swithing sttes re generted to void oth open iruits t the lod side nd short iruits t the supply side [1]. The swithing funtion for swith is represented in (1). Also diret ommuttion mtrix T(S i) depited in () is omposed from (1). 1, losed = (1), open S 1 S S3 T ( ) = S S5 S () S S S where i = 1,,, 9. The DMC model is otined y using (1) nd (). v = T ( ). vi (3) T i i = T ( ). io () However, disrete-time model of DMC is needed in order to minimize the given ost funtion nd lst, to produe the est swithing sttes whih will e pplied to the rel DMC s similr to MPC method. Before the disrete-time model is omposed, input nd output dynmis of the DMC system re represented y the following ontinuous-time equtions ording to Fig. 1 [1], dis vs = R f is + L f + vi (5) dvi is = ii + C f () dio vo = RLio + LL (7) The stte-spe model with the vriles vi nd is n e lso otined from these equtions s depited elow, v& i vi vs = A. + B. (8) i & s is ii 1 1 C f A = 1 R, C f B = (9) 1 f L f C f Consequently, disrete-time model of DMC represented elow n e otined y using zero-order hold method [1]. + 1 v i vi vs = Φ. + Γ. + (1) 1 is is ii φ Φ = φ 11 1 φ1 = φ A T e. s (11) ν 11 ν1 1 Γ = = A.( Φ I x ). B (1) ν 1 ν Also the lod urrent model n e written y using forwrd Euler pproximtion in ordne with (7), + 1 i o = d1. vo + d. io (13) where d 1=T s/l L nd d =1-T sr L/L L. In these equtions, T s is nmed the smpling time [1]. 3. CPSO Algorithm Bsed Optiml Control Approh The power iruit whih is ontrolled inludes 3-phse DMC fed y 3-phse AC soure through LC input filters in order to drive 3-phse indutive lod with different voltge nd urrent requirements. The vlues of the prmeters used in this system re given in ppendix. To ontrol this system, CPSO lgorithm sed optiml ontroller is suggested in this study. The ontrol struture whih is ontined DMC model nd PSO lgorithm is designed sed on softwre s represented in Fig.. A funtion of CPSO lgorithm in the ontroller is to itertively hoose pproprite swithing sttes mong 7 vlid swithing sttes nd pply them to the DMC system. Fig.. Struture of the proposed ontrol system. 18

3 The CPSO lgorithm pplies step y step ll prole solutions, S ij, in the swrm to the DMC model t eh itertion period. Then the DMC model mesures the instntneous output urrent I o, soure urrent I s, soure voltge V s nd input voltge V i from the rel system nd produes the preditions of following output urrent I +1 o nd the following instntneous retive power Q +1 in y using these prmeters nd erenes of the output urrent nd instntneous retive power. After tht, these preditions re trnsmitted to the CPSO lgorithm in order to e le to ompute the urrent vlues of the ost funtion, j +1, represented elow j = ( + 1 ).( Δioα + Δioβ ) + Ψ. ) (1) where Δi +1 oα nd Δi +1 oβ re the solute vlues of the output urrent errors etween output urrent erene, I o_ nd output urrent predition, I +1 o in the α-β frme [1]. + 1 * Δioα = ioα ioα (15) + 1 * Δioβ = ioβ ioβ (1) +1 Also, the instntneous retive power Q in n e omputed y the model s represented elow [1] = vsα. isβ vsβ. isα (17) However, if the input voltge n e onsidered onstnt for two smpling period, the eqution ove n e simplified s elow [1] = vsα. isβ vsβ. isα (18) In ddition, Ψ in (1) is the weighting ftor hnging the effet of the instntneous retive power in the formul. PSO lgorithm finds the est ost funtions t the end of this proess. After tht, the optimum ost funtion whih hs minimum vlue is hosen mong ll ost funtions. This ost funtion lso indites the est swithing sttes, S ij *. Finlly, the swithing sttes re sent to the rel DMC to produe the desired outputs. Fig. 3. Blo sheme of the ontrol system. multion Study The study is implemented on MATLAB/mulin environment run on the omputer inluding Pentium-T5 proessor nd GB RAM. In the study, it is evluted tht the 3-phse DMC is fed y 3-phse lned AC supply with Vpp phse voltge nd provides 5 App, 5 Hz sinuzoidl urrents to the 3-phse indutive lod inluding 1 Ω nd 15 mh. In ddition to this, frequeny of the lod urrent n e hnged in the rnge of 5-1 Hz respetively. Aout ±1% vritions of the lod frequeny is represented in Fig.. The mulin model of the system is lso depited in Fig. 3. Fig.. Output frequeny vritions While the 3-phse LC input filter woring etween AC supply nd DMC is used in order to mitigte the high frequeny hrmonis of the input urrents, the lmp iruit wors s protetion iruit for the possile voltge spies under norml nd fult onditions of the power system. The softwre sed 19

4 ontrol ox presented in Fig. 3 inludes DMC model nd PSO lgorithm, nd it genertes the pproprite swithing sttes so s to drive the rel DMC. In the CPSO lgorithm, the numer of prtiles nd itertions re ten 5. Also, 1 nd onstnts re ten.5. In ddition, when the veloities of the prtiles re omputed, the multiplition oeffiient used in the omputtion of mximum oundry of the veloity, v mx, is ten.55. Prtiulrly, this oeffiient is highly importnt euse its lower vlues derese the step size of the prtiles nd vie vers. If the step sizes of the prtiles re lower thn the desired vlues, the prtiles n not reh the erene urrents. In ontrst, if the step sizes of the prtiles re upper thn the desired vlues, the prtiles exeed the erene urrents. The smpling time, T s, is ten.5 ms. T s is lso provide KHz swithing frequeny for the IGBT swithes of the DMC in the simultion. Vs (V) Fig. 5. V pp, 5Hz, 3-phse lned AC soure voltge Vs Vs Vs Is Is (phse-to-phse) (men vlue) 5. Results nd Disussion (V) -1 The results otined from the simultions whih re relized in se of different urrent onditions re represented in Fig., 7, 8 nd 9. In ddition to these, the Vpp, 5 Hz soure voltge is lso represented in the Fig. 5. The Fig., 7, 8 nd 9 re seprted into 5 prts inluding () soure urrent, () lod urrent, () lod voltge nd (d) FFT nlysis of the lod urrent. All nlyses prt from Fig. 9 whih is the results out 5 Hz lod urrent frequeny is relized in the time rnge of. s. nd.8 s. in order to investigte the stedy-stte response of the DMC system. Fig. 9 is relized in the time rnge of. s. nd.5 s. due to its reltively smll frequeny. At the end of the simultions, it is seen tht the PSO sed optiml ontroller produes the optimum swithing sttes providing the output urrents with unity power ftor tht follow the 5 App lod urrent erenes within the lrge frequeny rnge. In ddition to this, the soure phse urrents for ll frequeny onditions hve pproximtely 3 A pe-tope vlues with their sinusoidl forms. The pe-to-pe vlues of the output phse voltges re lso otined pproximtely 1 Vpp. However, when it is investigted the figures of the lod urrents, the pe vlues of the phse-a is igger thn those of the other phses. The reson of this sitution is ommented the tring error of PSO lgorithm. The strt point of the phse-a is t zero, ut those of the others re different from the zero due to their phse shifts. Beuse PSO lgorithm strts the tring proess t zero point for ll phses, the tring errors will e different for eh phse. Furthermore, the est THD% is otined in se of 5 Hz lod frequeny. It n e seen tht when the lod frequeny is deresed to 5 Hz nd 5 Hz, THD% of the lod urrent inreses. In prllel, when the lod frequeny is inresed to 1 Hz, THD% of the lod urrent lso inreses. There re two resons for this sitution. First of ll, the input filter of the DMC hs een tuned in order to eliminte the hrmonis of 5 Hz lod frequeny. The seond is in the ft tht the sling oeffiients of PSO lgorithm mentioned in the previous setion hs een tuned for 5 Hz lod frequeny s the first pplition. Aout ±1% frequeny vrition is used the inresing of hrmonis nd THDs. In spite of these, the stedy-stte performne of the proposed DMC system ontrolled with PSO lgorithm is suffiient in the rnge of out ±1% lod frequeny vrition Fig.. () Soure urrent, () lod voltge, () 5A, 5Hz lod urrent (THD: 7.3%) in the se of lned AC soure. Vo(V) Io(A) Is Is (phse-to-phse) (men vlue) Fig. 7. () Soure urrent, () lod voltge, () 5A, 1Hz lod urrent (THD: 197.3%) in the se of lned AC soure. Io(A) Vo (V) 5 Is Is (phse-to-phse) (men vlue) 11

5 Fig. 8. () Soure urrent, () lod voltge, () 5A, 5Hz lod urrent (THD: 31.1%) in the se of lned AC soure. Vo (V) Is Is (phse-to-phse) (men vlue) Fig. 9. () Soure urrent, () lod voltge, () 5A, 5Hz lod urrent (THD: 7.39%) in the se of lned AC soure.. Conlusion In this simultion study, swrm intelligene sed heuristi optimiztion lgorithm is pplied to the DMC system so s to produe optimum swithing sttes for the onverter. It is imed with this study tht the heuristi optimiztion lgorithm provides roust ontrol to the DMC system for different woring onditions. Atully, the suffiient roust ontrols re otined with the hosen CPSO lgorithm for different lod frequenies hnging from 5% to 1% of 5 Hz. However, some undesired results re ourred in the simultions suh s inresed pe voltge. It is evluted tht these n e omplished y using hyrid PSO lgorithms or the other heuristi lgorithms. In ddition to these, it is ler tht the voltge trnsfer rtio of the onverter is.5. The next study will over the inresing of voltge trnsfer rtio of the proposed DMC ontrol system. 7. Appendix Vriles Desription Vlues V s Soure voltge (pe-tope) V pp f soure Soure frequeny 5 Hz I o Lod urrent (pe-to-pe) 5 A pp f o Lod frequeny 5, 5, 5, 1 Hz L f Filter indutne 3 mh C f Filter pitne 15 μf R f Filter resistne.5 Ω L o Lod indutne 15 mh R o Lod resistne 1 Ω T s Smple time (swithing time) 8. Referenes 5 μs [1] E. Ymmoto, T. Kume, H. Hr, T. Uhino, J. Kng, nd H. Krug, Development of mtrix onverter nd its pplitions in industry, in Pro. 35th IEEE IECON, Porto, Portugl, pp. -1, 9. [] P. Wheeler, J. Rodriguez, J. Clre, L. Empringhm, nd A. Weinstein, Mtrix onverters: A tehnology review, IEEE Trns. Ind. Eletron., vol. 9, no., pp. 7 88,. [3] L.A. Hzeltine, An improved method of n pprtus for onverting eletroni power, US Ptent 1875, 193. [] T. Friedli, J.W. Kolr, Milestones in mtrix onverter reserh, IEEJ Journl of Industry Applitions, vol. 1, no. 1, pp. -1, 1. [5] M. Venturini, A new sine wve in sine wve out onversion tehnique whih elimintes retive elements, in Pro. Poweron 7, pp. E3/1 E3/15, 198. [] M. Venturini nd A. Alesin, The generlized trnsformer: A new idiretionl sinusoidl wveform frequeny onverter with ontinuously djustle input power ftor, in Pro. IEEE PESC 8, pp. 5, 198. [7] J. Rodriguez, M. River, J. Kolr, P. Wheeler, A review of ontrol nd modultion methods for mtrix onverters, IEEE Trnstions on Industril Eletronis, vol. 59, no. 1, Jn. 1. [8] S.H. Hosseini, E. Bei, A new ontrol lgorithm for mtrix onverters under distorted nd unlned onditions, CCA3 IEEE Conferene on Control Applitions, vol., pp , 3. [9] P. Znhett, M. Sumner, J.C. Clre, P.W. Wheeler, Control of mtrix onverters for AC power supplies using geneti lgorithms, IEEE Interntionl Symposium on Industril Eletronis, vol., pp ,. [1] F. Villrroel, J. Espinoz, C. Rojs, C. Molin, J. Rodriguez, Applition of fuzzy deision ming to the swithing stte seletion in the preditive ontrol of Diret Mtrix Converter, IECON 11-37th Annul Conferene on IEEE Industril Eletronis Soiety, pp. 7 77, 11. [11] T.S. vrni, S.J. Jwhr, C.A. Kumr, Novel intelligent hyrid tehniques for speed ontrol of eletri drives fed y mtrix onverter, Interntionl Conferene on Computing, Eletronis nd Eletril Tehnologies (ICCEET), pp. - 71, 1. [1] R. Ghoni, A.N. Adll, T. Irhim, D. Rifi, Z. Luis, A ripple minimiztion strtegy for mtrix onverter using hyrid PSO, Proedi Engineering, vol. 38, pp , 1. [13] R. Roy, S.P. Ghoshl, A novel rzy swrm optimized eonomi lod dispth for vrious types of ost funtions, Int J Eletr Power Energy Syst, vol.3(), pp. 53, 8. [1] F. Villrroel, J. Espinoz, C. Rojs, C. Molin, E. Espinos, A multiojetive rning sed finite sttes model preditive ontrol sheme pplied to diret mtrix onverter, IECON 1-3th Annul Conferene on IEEE Industril Eletronis Soiety, pp. 919,