VOLTAGE SENSITIVITY BASED TECHNIQUE FOR OPTIMAL PLACEMENT OF SWITCHED CAPACITORS

Transcription

1 VOLTAGE SENSITIVITY BASED TECHNIQUE FOR OPTIMAL PLACEMENT OF SWITCHED CAPACITORS M. Rodríguez Montañés J. Rquelme Santos E. Romero Ramos Isotrol Unversty of Sevlla Unversty of Sevlla Sevlla, Span Sevlla, Span Sevlla, Span Abstract - Ths paper s about the development of a fast but exact enough technque to solve the optmal allocaton and szng of capactors on power systems, no matter the voltage level. The proposed methodology s manly characterzed by assumng a lnear behavour for the reactve problem and havng an objectve functon that mnmzes the sum of the voltage magntude devatons from the specfed voltage lmts squared, for all those buses wth over/under voltages. The proposed approach has been tested on the IEEE 14-bus and 30-bus systems, and on an exstng dstrbuton system wth actual data. Results are compared wth those of usng an exact calculaton of voltages. Keywords - Capactor placement, capactor szng, VAR plannng, senstvty factor, voltage profle. 1 Introducton PO wer dstrbuton from electrc power generators to consumers s accomplshed va the transmsson, subtransmsson, and dstrbuton lnes. Voltage profle mprovement and system losses reducton by capactor nstallaton depend greatly on how capactors are placed and operated n the system [1, 2]. The general capactor placement problem conssts of determnng the optmal locaton and sze of capactors to be nstalled and the effcent control schemes n the buses of the system [3]-[8]. Much mathematcal research on the capactor placement has been studed n dstrbuton systems. A nonlnear programmng such as gradent search method s proposed n [1]. Baran and Wu [2] decomposed capactor placement problem nto a master problem and a slave problem by usng mxed nteger programmng. The master problem determnes the locaton of the capactors and the slave problem determnes the type and sze of the capactors. Smulated annealng s used n [3, 4] after formulatng capactor placement problem as a dscrete combnatonal optmzaton problem. Huang et al. [5] proposes by tabu search (TS)-based soluton algorthm and uses senstvty analyss method to select the canddate nstallaton locatons of capactors to reduce the search space. Also, many researchers proposed genetc algorthm (GA) applcaton to search global optmal soluton of capactor placement problem [6, 7, 8]. Sundhararajan et al. [6] used senstvty analyss to search the locaton of the capactors and GA to determne the sze of the capactors, whch somewhat depends on experences n the selecton of the probablty parameters. Mu et al. [7] suggested the two-stage algorthms that combne the good qualtes of GA and a fast senstvty-based heurstc. Ths paper presents a lnear reasonng for determnng the optmal locatons and szes for capactor placement for voltage profle mprovement. Voltage senstvty ndces have been usually used as ndcators of voltage stablty and several ndces of ths knd have been proposed [9, 10]. One such voltage senstvty ndex, dv/dq, called the reactve voltage senstvty factor (RP V S), was the frst ndex used to predct voltage control problems [11]. Ths ndex also provdes a means of allocatng capactors to mprove bus voltages as we shall show. The analyss of the results after applyng the proposed algorthm to dfferent systems allow to conclude that the new methodology s qute fast and accurate so t can be used not only by the planner of the system, but also on real tme to determne the best way to operate on all the swtched capactors beng on the system to mprove all voltages n a global way. The papers s structured as follows: secton 2 defnes bus voltage senstvty factors and how computng them. Next, n secton 3 the mathematcal problem of optmzaton s posed, focused on mnmzng voltage magntude devatons from the specfed voltage lmts by usng the bus voltage senstvty factors. Once the mnmzaton problem s solved, a heurstc algorthm lookng for establshng the mnmum number of allocatons and swtches s descrbed. Secton 4 apples the new methodology to three dfferent cases, two IEEE test systems and an actual one. Results are fnally commented and analyzed. 2 Bus voltage senstvty factors A senstvty whch gven the varaton of node voltage magntude due to a unt reactve power njecton to node j s called the reactve power voltage senstvty (RP V S j ) and denoted by ( V / Q j ). The lnearzed steady state system power voltage equatons are gven by, [ ][ ] [ ] H N θ P = (1) M L V Q where P and Q are vectors of real and reactve bus power njecton changes, whle θ and V are vectors of bus voltage angle and magntude changes. The Jacoban matrx n (1) s that used when the power flow equatons are solved by the Newton-Raphson technque. Although system voltages are affected by both P and Q, P can be kept constant at each specfed operatng pont and the voltage varatons can be evaluated by consderng the ncremental relatonshp between Q and V. As a consequence, makng null the ncremental changes n P n (1), the followng relaton Q V results, Q = [ L MH 1 N ] V = J R V (2) 15th PSCC, Lege, August 2005 Sesson 16, Paper 4, Page 1

2 Load Lnear Exact Absolute Lnear Exact Absolute Lnear Exact Absolute Buses method method error method method error method method error RP V S 4 RP V S 9 RP V S ,0445 0,0482 0,0037 0,0206 0,0239 0,0033 0,0014 0,0019 0, ,0268 0,0294 0,0026 0,0124 0,0146 0,0022 0,0008 0,0011 0, ,0207 0,0226 0,0019 0,0599 0,0672 0,0073 0,0040 0,0052 0, ,0206 0,0240 0,0034 0,1178 0,1356 0,0178 0,0078 0,0106 0, ,0171 0,0210 0,0039 0,0978 0,1186 0,0208 0,0065 0,0092 0, ,0089 0,0112 0,0023 0,0507 0,0631 0,0124 0,0034 0,0049 0, ,0014 0,0018 0,0004 0,0078 0,0100 0,0022 0,2178 0,2390 0, ,0031 0,0041 0,001 0,0178 0,0230 0,0052 0,0518 0,0619 0, ,0130 0,0173 0,0043 0,0745 0,0979 0,0234 0,0269 0,0366 0,0097 Tabla 1: RPVS factors n each load bus of the IEEE 14-bus test system where J R s called the reduced Jacoban matrx of the system and ts nverse drectly relates the bus voltage magntude and bus reactve power njecton. Adoptng the well-known strong nterdependence between actve powers and bus voltage angles, and between reactve powers and voltage magntudes, the jacoban matrx n (1) s smplfed to, [ H 0 0 L ][ θ V ] = [ P Q and, n consequence, equaton (2) s reduced to, ] (3) Q = L V (4) Fnally, the matrx RP V S, whch s assocated to all the PQ nodes of the system, can be obtaned from ths last system, RP V S = V Q = L 1 (5) The former way of reasonng allows to compute a quas-exact RP V S j factors. The procedure wll be the followng, 1. For a gven load and generator power profle, load flow equatons (1) are solved to know the state varables θ F and V F n all buses. 2. Matrx L s computed from θ F and V F. 3. Matrx RP V S s determned by (5) If the equatons of the Fast Decoupled Load Flow method (FDLF) were the startng pont nstead of the Newton- Raphson power flow equatons, only the lnearzed, decoupled, reactve power model would be requred. Ths one s represented by, B V = Q (6) where B s equal to the magnary part of the nodal admttance matrx changed of sgn. Then, matrx RP V S can be computed from the nverse of B, RP V S =(B ) 1 (7) The man advantage from computng RP V S matrx from (7) nstead of (5) s that matrx B s constant whle matrx L depends on the state varables. Ths mples a lot of savng of computatonal tme when ths ssue becomes mportant. On the contrary, accuracy s reduced due to the assumed smplfcatons after adoptng the FDLF method. Followng n table 1 the RPVS factors n each load bus of the IEEE 14-bus test system are lsted, both usng (5) ( Exact method ) and (7) ( Lnear method ). The bus voltage sensbltes regards to reactve power njectons n buses 4, 9 and 12 are showed, that s, the factors RP V S 4, RP V S 9 and RP V S 12 respectvely, where refers to any load bus. These three nodes have been chosen as there are capactors banks n all of them, so t could be of nterest to quantfy how much voltage magntudes change when the reactve power njecton n any of these three buses s modfed. Absolute errors between the exact and lnear form of obtanng RPVS factors are also dsplayed. It can be concluded from these results, and also thanks to the fnal relatve errors computed when the compensated voltage magntudes are determned (see table 4 n secton 4), that the error by usng the matrx B s almost null. As a consequence, the lnear methodolgy to determne the RPVS factors has been fnally the mplemented one. Nevertheless, the exact RPVS factors are saved to study the accuracy of the results after the whole problem s solved. It must noted that the hgher the load level of the system, the larger the absolute error between the exact and the lnear RPVS factors. Ths result was expected snce the exact method takes nto account the actual voltage magntudes whle the lnear supposes voltage magntudes equal to nomnal voltages. On the other hand, t always results that exact RP V S factors are hgher than the lnear RP V S ones n buses whose voltages are less than the nomnal value, and just the opposte n nodes wth voltages larger than the nomnal. These results allow to conclude that the fnal soluton wth the lnear RPVS factors s always enclosed by the exact soluton. All these consderatons encourage to follow wth the use of the lnear RPVS factors to try to solve the proposed problem. 3 Optmzaton procedure Followng, the optmzaton problem s posed by usng the former RPVS factors. The objectve conssts of deducng the best buses where the new capactors must be allocated and how much reactve power must be njected by 15th PSCC, Lege, August 2005 Sesson 16, Paper 4, Page 2

3 those components n order to get the followng ams: Elmnatng undervoltages Avodng overvoltages n any bus due to the ncreased njected reactve power on the system Mnmzng the number of capactors to be nstalled and the number of swtches on them. If N denotes the total number of buses n the power system, and M the number of load nodes, that s, the usually named PQ nodes, C s the sze of the set S C that comprses all those nodes where capactors can be allocated. Ths set s known n advance to the formulaton of the problem and the nequalty C M s always met. For example, f the problem to solve conssted of determnng the best swtches over already nstalled capactors, set S C would be perfectly defned by those nodes where shunt elements are allocated; n the contrast, f t were a plannng problem, probably the best pont of startng would be to defne S C wth all the beng PQ nodes. Once the load flow equatons have been solved and RPVS factors have been obtaned, the voltage msmatch vector V s computed for each load bus as follows, 1. If V >V max 2. If V <V mn 3. If V mn V = V max V = V mn V V <V <V max V =0 Computng the vector V Mx1 n ths way, the overvoltages and undervoltages n the system are beng quantfed. Then, ths vector s used to defne a frst verson of the objectve functon as, f = M C RP V S j Q j V j where the vector Q Cx1 s obtaned from the RPVS matrx, RP V S MxC Q Cx1 = V Mx1 (9) No consderaton has been done yet n relaton to mnmze the nvestment n new capactors. The followng measures gve answer to ths queston: 2 (8) Buses wth V =0are elmnated from (8) and the related equaton n system (9) s also removed. Ths mples that those buses whose voltages are n lmts are not forced to hold ther actual values. Due to the prevous tem, buses that ntally have ther voltages n lmts could surpass the maxmum specfed voltage V max after the reactve power compensaton. Ths undesrable effect can be avoded by adoptng a practcal maxmum voltage, V pmax, lower than the real maxmum specfed one, that s, V pmax = V pmax tol max. Consderng overvoltages nto the optmzaton problem allows to penalze those capactors more sensble to ncrease even more those overvoltages. So, the fnal mnmzng problem results, M C f = RP V S j Q j V j 2 (10) RP V S M xc Q Cx1 = V M x1 (11) where M s less than M and results after removng nodes wth voltage magntudes n lmts. After solvng ths optmzaton problem, a vector of new njected reactve powers Q Cx1 s deduced. Ths soluton s arranged from large to lowest sze and new swtched capactors are allocated sequentally (followng the order deduced) untl all voltages are n lmts. Ths form of proceedng ensures a mnmum number of new capactors. Agan, RPVS factors are used to recalculate voltage magntudes each tme a new capactor s consdered to be placed, V comp = V F + RP V S j Q j (12) There are some computatonal ssues related to the soluton of (10) and (11). Some negatve solutons could result after the resoluton of the mnmzaton problem, whch mples nductve shunts compensatng capactors. Obvously ths soluton s mpractcable. When ths stuaton occurs, the mnmzaton problem s solved agan after removng those buses j S C wth negatve soluton. Ths s done untl no negatve soluton results. Ths way to proceed guarantees the mnmum number of swtches to compensate undervoltages. As a consequence of ths ssue, agan a practcal mnmum voltage hgher than the real mnmum specfed one must be consdered, V pmn = V pmn + tol mn. Other pont s that swtched capactors banks nstead of fxed capactors could be the avalable compensaton shunts. In ths case, when the Q j soluton s fnally defned as the best reactve power njecton, the number of swtchng tmes for the specfed capactor bank can be easly deduced. Summarzng, the whole process s as follows, 1. Intally, load flow problem s solved to know the state of the system: complex voltages, taps of transformers and reactve power njected by shunt capactors beng nto the system. 2. Matrx of senstvtes s computed and used to defne the objectve functon, ether by a lnear or an exact technque as t has been dscussed n secton Optmzaton problem s solved, equatons (10) and (11), so a vector of new njected reactve powers s deduced. 4. The former soluton s arranged from large to lowest sze. 15th PSCC, Lege, August 2005 Sesson 16, Paper 4, Page 3

4 5. New swtched capactors are allocated sequentally (followng the order deduced n pont 4) untl all voltages, recomputed by (12), are n lmts. 4 Case studes Three dfferent systems wll be analyzed wth the proposed methodology, [A] The IEEE 14-bus test system. [B] The IEEE 30-bus test system. [C] An actual 128-bus system from a Spansh utlty. The voltage lmts n all the cases have been set up at ±5% of nomnal voltage, and the adopted maxmum and mnmum tolerance have been defned n such a way that the allowed voltage nterval s reduced to 1.0 <V < 1.03 for all buses. Also t s supposed any load bus s sensble to allocate a new capactor. The two IEEE test systems have been overloaded n order to have notceable undervoltages. Ths allows to know more about the accuracy of the proposed methodology. Load Buses Intal Voltage V Q Tabla 2: Intal voltages, V vector and Q vector for the IEEE 14-bus test system The ntal load state for the A system results n undervoltage levels for all load buses as t s showed n column one of table 2. From these voltages and the commented practcal voltage lmts, the vector V s computed, whch s lsted n the second column of ths table 2. Then the optmzaton problem (10) and (11) s solved resultng the vector Q depcted n the thrd column of the table 2. Load Intal V Fnal Buses V 5 5,13 5,13,10 Voltage Tabla 3: Soluton for the IEEE 14-bus test system by usng the lnear RP V S factors As t was argued prevously, buses where a negatve njected reactve power results are elmnated from set S C, buses 4 and 9 n ths case. Then the optmzaton problem s agan solved but wth a new number C of possble allocatons for capactors less than the ntal one. Once no any negatve elements of Q s obtaned, ths vector s arranged from large to lowest sze and new swtched capactors are allocated sequentally untl all voltages are n lmts. For ths case ths stuaton s reached after nstallng capactors n buses 5, 13 and 10, and njectng a reactve power of , and Mvar respectvely. The V vector after each compensaton, and the fnal compensated voltages n PQ buses, obtaned by (12), are showed n table 3. As t can be noted, there are no any under/overvoltages. In order to study the accuracy of the method when lnear RP V S factors are used nstead of the exact ones, the whole problem for the A case has been solved by computng the exact RP V S factors. In ths case the optmal placement of capactors are the buses 5, 13 and 11, wth an njected reactve power of , and Mvar respectvely. Ths new soluton only dffers from the prevous one n the last bus where a new capactor should be allocated, resultng bus 11 nstead of bus 10. Ths dfference s due to these nodes are very closed to each other. Table 4 llustrates about the two solutons. Moreover, the fnal voltages by usng the RP V S factors and by solvng the exact load flow equatons are compared n both cases. It can be concluded as the obtaned soluton wth the lnear methodology s exact enough not only to deduce the number of capactors to be nstalled and ther allocaton, but also to compute the fnal voltages. The maxmum relatve error s not hgher than a 2%, whch s very low f we take nto account how much low the ntal voltages were. Ths relatve error has been defned as follows, Relatve error(%) = Comp. voltage Exact comp. voltage 100 Exact comp. voltage where Comp. voltage refers to those compensated voltages obtaned from usng RVPS factors (lnear or exact ones), and Exact comp. voltage are those voltages computed from solvng an exact load flow, both cases wth the new capactors already allocated. Once the accuracy of the proposed methodology has been countersgned n a certan way by the former results, for the other two tested cases not such detaled results wll be wrtten, but only the fnal soluton. For the B case, wth 24 PQ nodes, fve buses have ntally undervoltages lower tan Fgure 1 shows, among others, these ntal voltages. The optmal soluton, by usng the lnear factors, drves to allocate three new capactors n buses 9, 21 and 30, beng the njected reactve power, Q 9,21,30 = [ ] Mvar. The compensated voltage magntudes are also depcted n fgure 1, those usng the lnear RP V S factors as well as the exact ones computed by solvng the load flow equatons. Note as compensated voltages by usng the proposed lnear methodology are very closed to the exact ones once more. The C case has 111 PQ buses, and the smulated load profle gves undervoltages n 27 of them. When the proposed algorthm s appled, the reached soluton conssts of nstallng 5 new capactors njectng a reactve power detaled n table 5. The large amount of reactve power obtaned n bus s justfed by a hgh reactve load connected n ths bus that produces an extremely low ntal voltage of n ths bus. Fgure 2 s the counterpart 15th PSCC, Lege, August 2005 Sesson 16, Paper 4, Page 4

5 Load Q 5,13,10 = Λ Q 5,13,11 = Λ Fnal V Relatve Fnal V Relatve Buses Lnear RV P S Exact Load Flow error (%) Exact RV P S Exact Load Flow error (%) 4 0,9878 0, ,9901 0, ,0061 1, ,0130 1, ,0104 1, ,0034 0, ,0138 1, ,9996 0, ,0161 1, ,9889 0, ,9735 0, ,0131 0, ,9965 0, ,9979 0, ,0183 1, ,0224 0, ,9620 0, ,9645 0, Tabla 4: Comparatve study of fnal voltages for the IEEE 14-bus test system by usng RP V S factors or an exact load flow Fgura 1: Voltage profles for the 30-bus system to 1, now for the C system. Agan, compensated voltages are qute good, beng the most relatve error of 3.26 %. Ths result s qute good takng nto account the hgh level of load of the system. As n the rest of the tested systems the upper lmt of 1.05 s not exceeded. Moreover, the resultng few number of capactors regards to the sze of the system s emphaszed, achevng the man proposed goal, that s, all the voltage magntudes are n lmts. New Capactors Allocaton Injected Reactve Power (Mvar) Tabla 5: Soluton for the actual 128-bus test system 5 Concluson In ths paper, a procedure to solve the capactor placement problem s consdered. A lnear programmng method s employed whch mnmzes the bus voltage devatons from voltage lmts. Ths lnear methodology has been guaranteed to reach realstc solutons not only to solve the optmzaton problem but also to deduce the fnal voltage magntudes, even for very overloaded systems. The mplemented algorthm s smple and fast, so ts use on real tme would be of nterest n order to determne the best way to operate on all the swtched capactors beng on the system to mprove all voltages n a global way. 6 Acknowledgments Authors acknowledge the fnancal support provded by the Spansh Mnster of Scence and Technology under grant ENE Referencas [1] J. J. Granger and S. H. Lee, Optmum sze and locaton of shunt capactors for reducton of losses on dstrbuton feeders, IEEE Trans. Power App. Syst., vol. PAS-100, pp , Mar [2] M. E. Baran and F. F. Wu, Optmal szng of capactors placed on a radal dstrbuton system, IEEE Trans. Power Delvery, vol. 4, pp , Jan [3] H. D. Chang, J. C. Wang, O. Cockngs, and H. D. Shn, Optmal capactor placement n dstrbuton systems; Part 1: A new formulaton of overall problem, IEEE Trans. Power Delvery, vol. 5, pp , Apr th PSCC, Lege, August 2005 Sesson 16, Paper 4, Page 5

6 Fgura 2: Voltage profles for the 128-bus system [4] H. D. Chang, J. C. Wang, O. Cockngs, and H. D. Shn, Optmal capactor placement n dstrbuton systems; Part 2: Soluton algorthms and numercal results, IEEE Trans. Power Delvery, vol. 5, pp , Apr [5] Y. C. Huang, H. T. Yang, and C. L. Huang, Solvng the capactor placement problem n a radal dstrbuton system usng tabu search approach, IEEE Trans. Power Syst., vol. 11, pp , Nov [6] S. Sundhararajan and A. Pahwa, Optmal selecton of capactors for radal dstrbuton systems usng a genetc algorthm, IEEE Trans. Power Syst., vol. 9, pp , Aug [7] K. N. Mu, H. S. Chang, and G. Darlng, Capactor placement, replacement and control n largescale dstrbuton systems by a GA-based two-stage algorthms, IEEE Trans. Power Syst., vol. 12, pp , Aug [8] A. Kalyuzhny, G. Levtn, D. Elmaks, and H. B. Ham, System approach to shunt capactor allocaton n radal dstrbuton systems, Electrc Power Syst. Res., vol. 56, pp. 5160, [9] P.Kundur, Power System Stablty and Control, EPRI Power System Engneerng Seres, McGraw Hll Inc., 1994, p.992. [10] B.Gao, G.K.Monson, P.Kundur, Voltage Stablty Evaluaton Usng Modal Analyss, IEEE Trans. Power Systems, Vo1.7, No.4, November 1992, pp [11] IEEE Specal Tutoral Course - Voltage Stablty. Proceedngs of the 1998 Power Engneerng Socety Summer meetng. San Dego CA p p (4).6. 15th PSCC, Lege, August 2005 Sesson 16, Paper 4, Page 6