Structured Electronic Design. Building the nullor: Distortion

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1 Structured Electronic Design Building the nullor: Distortion 1

2 Specs 1 N verification Topology Best nullor implementation Voltage and current swing Power consumption FINAL Noise level

3 All stages maximal gain (CE CS) Most orthogonal order: N, D, B i i i o + + v i - - v o Noise Bandwidth Loopgain Clipping 3

4 bandwidth noise distortion bandwidth distortion - noise noise - bandwidth distortion noise distortion - bandwidth distortion - noise bandwidth distortion bandwidth - noise Specs 1 N D B Bias verification 4

5 When optimizing bandwidth: Small-signal models (no non-linearity) No noise When optimizing noise behavior: Small-signal models (no non-linearity) No bandwidth details When optimizing non-linear behavior: No dynamic effects No noise 5

6 i S v out Non-dynamic active circuit (Not a nullor anymore) 6

7 Out Clipping Weak distortion In 7

8 Clipping c be ce 8

9 Weak distortion v in + + v be v be B i out Simplest model that suffices i I e out s v in = VT 1 V T kt = q 9

10 Strategy Noise Clipping Input signal Weak distortion distortion types Completely different approach 10

11 Clipping breaks the loop R f i s R L R f i s R L More loop gain does not repair this 11

12 Clipping breaks the loop R f i s R L R f i s R L More loop gain makes it worse 1

13 Strategy Clipping breaks the loop local problem local solution Weak distortion does not break the loop can be in any stage reduced by the loop (everywhere) 13

14 The bipolar transistor model v A v B i i C D A B C D 14

15 Simulation of B 15

16 Simulation of D 16

17 D D-type distortion is is much less than B-type distortion B 17

18 Location B or D D D D 18

19 Select a suitable tangent I c Offset I cq Distortion Offset I c di V = IcQ + + d c( be) d f( Vbe) ( Vbe VbeQ ) V be dv V = V be V = V be beq be beq V beq V be ( Vbe Vbe Q )

20 Translation to the origin (Biasing) I c I cq Distortion V beq V be 0

21 Adding and subtracting offsets = Biasing i c 1 = v + in B V beq d f( V ) dv be be V be = V beq v be +... v be + + Σ I c di V = IcQ+ + d c( be) d f( Vbe) ( Vbe VbeQ) V be dv V = V be V = V be beq be beq + ( Vbe Vbe Q)... + _ Σ i c v beq I cq 1

22 Bias parameters for transfer B i c IF: parameter 1 = I cq parameter = V beq Then: Suitable tangent in origin B is still non-linear v be i c 1 = vbe + B V beq d f( Vbe ) dvbe V = V be beq v be +...

23 More bias parameters V cq V beq Specs 1 N D B Bias verification I bq I cq i max,min Clipping v max,min Usable range 3

24 4 bias parameters i c IF: parameter 1 = I cq parameter = V beq parameter 3 = V cq parameter 4 = I bq Then: Suitable tangent in origin No clipping v be 4

25 4 bias sources needed for the translations Implementation will be done later in the biasing step Now biasing quantities are just parameters Biasing does not make the circuit linear 5

26 Summary : Clipping and weak distortion Still 1-1 relation with input Weak distortion output Y Q X Q input Clipping No 1-1 Essential relation difference? with input 6

27 Design the last stage: clipping V beq and I bq not independent i S v out V V < v < V cq min I I < i < I cq min c c Slewing max max V V < v < V cq cq min I I < i < I min c c max max 7

28 Power bandwidth ω max >ω power I bias II c clips at I c = I bias i = M sin( ωt) S C v out I bias I c ω max I bias ω power M full BW M M max 8

29 Check all stages i S V V < v < V cq cq min I I < i < I min c c max max v out Can Can be be verified with with small-signal models (AC (AC analysis) I bias ω Bw,max ω Bw,power A full BW A A max 9

30 Conclusions: Clipping The loop is broken! Loop gain does not help (Disaster) Can only be prevented locally Last stage large gain Clipping in last stage Dominant criterion for last stage Dominant influence on power consumption Clipping of other stages should not be a problem 30

31 Weak distortion Proper bias signals added (no offsets) No clipping Small distortion components Third order is enough = c t be t be t3 be i Gv G v G v 31

32 Weak distortion, 4 cases 3

33 Weak distortion, Bipolar transistor 1 1 g r g m o m 1 1 β r F o β F g m or B type distortion β or D type distortion 33

34 Weak distortion, bipolar transistor g m or orb type distortion 1 ( ) ( ) i v d f V d f V v v 3 be be 3 c = be + be + 3 be B dvbe 6dV V = V be V = V be beq be beq β or ord type distortion i c 1 d f( I ) d f( I ) = ib + + D 6 3 b b 3 i b i 3 b dib di I = I b I = I b bq b bq 34

35 B type distortion I I e c s V be = VT 1 vin iout kt V di 1 be c q Ic 1 = Ie s = = dv V V B be T T kt d I 1 V be c q Ic 1 = Ie s = = dvbe VT VT BVT 3 kt di 1 V be c q Ic 1 = Ie 3 3 s = = 3 dvbe VT VT BVT i out 1 v v = vin + + B V 6V 3 in in T T 35

36 B type distortion is bias independent i out 1 v v = vin + + B V 6V 3 in in T T v s B D D R L R f B type at the input, when the nullator is a voltage sensor Reduce via loopgain (no interference with noise optimum) 36

37 Reduction of B type distortion i out 3 1 vin vi n = vin + + BD 1 D3 VT 6VT i out v s v in B1 D D3 R L R f Secondary effect : Increase bias first stage B 1 smaller more loopgain Without feedback, increasing bias first stage does not help 37

38 Influence of location of distortion iinb ioutb i out i ina Da Db Dc R L i s R f 1 R f i = D i + δ i + δ i 3 inb b outb outb 3 outb ina ( ) ( ) 3 a b c out c out 3 c out i δ δ = D DDi + Di + Di D a has a linear effect on distortion D c has a quadratic and cubic effect on distortion 38

39 Gain after non-linear stage is best ( ) ( ) 3 D ina a b c out c out 3 c out i D D i δ Di δ Di = + + Gain last stage important! Insert extra gain after distorting stage Maximum gain all stages Worst distortion often at input (B type) 39

40 Distortion caused by first transistor i = Li + l i + l i 3 L L1 L1 3 L1 L = RF BDD a b c l l 1 BDD a b c 1 1 = = V R V L T F T BDD a b c = = 3VT RF 3VT L B D D a b c B D D a b c Gain of stage itself works as if it s after its non-linearity 40

41 41 Weak distortion, FET 1 1 m m m d gs m gs d g g C g g r j C j r ω ω Always g m distortion m m F o F o g g r r β β

42 Distortion caused by last transistor i L i L1 R S + v s Q a Q b Q c R F R L i = Li + l i + l i 3 L L1 L1 3 L1 L = RF AAB a b c l l 1 AAB = a b c = 4 R I 4 L I F dqc dqc 1 AAB = a b c = 3 8 R I 8 L I F dqc dqc A ( ) Channellength 1 Longer transistor lower distortion 4

43 Bipolar versus FET l l 1 BDD a b c 1 1 = = V R V L T F T BDD a b c = = 3VT RF 3VT L B D D a b c B D D a b c Distortion from first stage Reduce via bias, loopgain l l 1 AAB a b c = = 4 RI 4 LI F dqc dqc 1 AAB = = a b c 3 8 RI F dqc 8 LIdQc Distortion from last stage Reduce via bias, loopgain, layout 43

44 Local feedback Reduces non-linearity of stage Impedance in active part Reduces the overall loopgain Never better than overall loop Increases distortion other stages Especially for last stage not a good idea Only when non-linearity makes variation of loopgain too large 44

45 Conclusions weak distortion B type distortion (only at nullor input) D type distortion (for bipolar) Increase the loopgain Via biasing ( B(I Q ) ) Via Layout (FET) Extra stage (preferably after distortion source) No local feedback Use high gain last stage (also reduces clipping preceding stage) 45

46 Dynamic distortion Volterra series Dynamic eigenvalues Loopgain helps Still research 46

47 Conclusions Specs 1 N D B Bias verification 47

48 Specifications Harmonic distortion Intercept points Compression point Intermodulation Power bandwidth 48

49 Harmonic distortion Compare amplitudes fundamental harmonic with n th order harmonic HD n THD = ˆ y y n 1 m = n= HD n Magnitude ω 1 fundamental HD ω 1 3ω 1 HD 3 f 49

50 Intercept points output amplitude (log) y 1 y y 3 IP IP3 input amplitude (log) 50

51 Compression point output amplitude (log) -3 db y 1 y y 3 input amplitude (log) 51

52 f 5 ω1 -ω IM ω1 -ω ω1 ω ω -ω 1 ω1 +ω IM3 fundamental fundamental IM3 IM ω1 +ω ω +ω 1 IM3 IM3 Intermodulation Magnitude

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