Digital Logic & Computer Design CS Professor Dan Moldovan Spring Copyright 2007 Elsevier 2-<101>
|
|
- Carmella Lewis
- 5 years ago
- Views:
Transcription
1 Digital Logic & Computer Design CS 434 Professor Dan Moldovan Spring 2 Copyright 27 Elsevier 2-<>
2 Chapter 2 :: Combinational Logic Design Digital Design and Computer Architecture David Money Harris and Sarah L. Harris Copyright 27 Elsevier 2-<2>
3 Chapter 2 :: Topics Introduction oolean Equations oolean Algebra From Logic to Gates Multilevel Combinational Logic X s and Z s Karnaugh Maps Combinational uilding locks Timing Copyright 27 Elsevier 2-<3>
4 Introduction A logic circuit is composed of: Inputs Outputs Functional specification Timing specification inputs functional spec timing spec outputs Copyright 27 Elsevier 2-<4>
5 Circuits Nodes Inputs: A,, C Outputs:, Z Internal: n Circuit elements E, E2, E3 Each a circuit A E n E3 C E2 Z Copyright 27 Elsevier 2-<5>
6 Types of Logic Circuits Combinational Logic Memoryless Outputs determined by current values of inputs Sequential Logic Has memory Outputs determined by previous and current values of inputs inputs functional spec timing spec outputs Copyright 27 Elsevier 2-<6>
7 Rules of Combinational Composition Every circuit element is itself combinational Every node of the circuit is either designated as an input to the circuit or connects to exactly one output terminal of a circuit element The circuit contains no cyclic paths: every path through the circuit visits each circuit node at most once Example: Copyright 27 Elsevier 2-<7>
8 oolean Equations Functional specification of outputs in terms of inputs Example: S = F(A,, C in ) C out = F(A,, C in ) A S C L C C out in S = A C in C out = A + AC in + C in Copyright 27 Elsevier 2-<8>
9 Some Definitions Complement: variable with a bar over it A,, C Literal: variable or its complement A, A,,, C, C Implicant: product of literals AC, AC, C Minterm: product that includes all input variables AC, AC, AC Maxterm: sum that includes all input variables (A++C), (A++C), (A++C) Copyright 27 Elsevier 2-<9>
10 Sum-of-Products (SOP) Form All oolean equations can be written in SOP form Each row in a truth table has a minterm A minterm is a product (AND) of literals Each minterm is TRUE for that row (and only that row) The function is formed by ORing the minterms for which the output is TRUE Thus, a sum (OR) of products (AND terms) A = F(A, ) = minterm A A A A Copyright 27 Elsevier 2-<>
11 Sum-of-Products (SOP) Form All oolean equations can be written in SOP form Each row in a truth table has a minterm A minterm is a product (AND) of literals Each minterm is TRUE for that row (and only that row) The function is formed by ORing the minterms for which the output is TRUE Thus, a sum (OR) of products (AND terms) A = F(A, ) = minterm A A A A Copyright 27 Elsevier 2-<>
12 Sum-of-Products (SOP) Form All oolean equations can be written in SOP form Each row in a truth table has a minterm A minterm is a product (AND) of literals Each minterm is TRUE for that row (and only that row) The function is formed by ORing the minterms for which the output is TRUE Thus, a sum (OR) of products (AND terms) A minterm A A A A = F(A, ) = A + A Copyright 27 Elsevier 2-<2>
13 Product-of-Sums (POS) Form All oolean equations can be written in POS form Each row in a truth table has a maxterm A maxterm is a sum (OR) of literals Each maxterm is FALSE for that row (and only that row) The function is formed by ANDing the maxterms for which the output is FALSE Thus, a product (AND) of sums (OR terms) A maxterm A + A + A + A + = F(A, ) = (A + )(A + ) Copyright 27 Elsevier 2-<3>
14 oolean Equations Example ou are going to the cafeteria for lunch ou won t eat lunch (E) If it s not open (O) or If they only serve corndogs (C) Write a truth table for determining if you will eat lunch (E). O C E Copyright 27 Elsevier 2-<4>
15 oolean Equations Example ou are going to the cafeteria for lunch ou won t eat lunch (E) If it s not open (O) or If they only serve corndogs (C) Write a truth table for determining if you will eat lunch (E). O C E Copyright 27 Elsevier 2-<5>
16 SOP & POS Form SOP sum-of-products O C E minterm O C O C O C O C POS product-of-sums O C maxterm O + C O + C O + C O + C Copyright 27 Elsevier 2-<6>
17 SOP & POS Form SOP sum-of-products O C E minterm O C O C O C O C = OC POS product-of-sums O C E maxterm O + C O + C O + C O + C = (O + C)(O + C)(O + C) Copyright 27 Elsevier 2-<7>
18 oolean Algebra Set of axioms and theorems to simplify oolean equations Like regular algebra, but in some cases simpler because variables can have only two values ( or ) Axioms and theorems obey the principles of duality: ANDs and ORs interchanged, s and s interchanged Copyright 27 Elsevier 2-<8>
19 oolean Axioms Copyright 27 Elsevier 2-<9>
20 T: Identity Theorem = + = Copyright 27 Elsevier 2-<2>
21 T: Identity Theorem = + = = = Copyright 27 Elsevier 2-<2>
22 T2: Null Element Theorem = + = Copyright 27 Elsevier 2-<22>
23 T2: Null Element Theorem = + = = = Copyright 27 Elsevier 2-<23>
24 T3: Idempotency Theorem = + = Copyright 27 Elsevier 2-<24>
25 T3: Idempotency Theorem = + = = = Copyright 27 Elsevier 2-<25>
26 T4: Identity Theorem = Copyright 27 Elsevier 2-<26>
27 T4: Identity Theorem = = Copyright 27 Elsevier 2-<27>
28 T5: Complement Theorem = + = Copyright 27 Elsevier 2-<28>
29 T5: Complement Theorem = + = = = Copyright 27 Elsevier 2-<29>
30 oolean Theorems: Summary Copyright 27 Elsevier 2-<3>
31 oolean Theorems of Several Variables Copyright 27 Elsevier 2-<3>
32 Simplifying oolean Expressions: Example = A + A Copyright 27 Elsevier 2-<32>
33 Simplifying oolean Expressions: Example = A + A = (A + A) T8 = () T5 = T Copyright 27 Elsevier 2-<33>
34 Simplifying oolean Expressions: Example 2 = A(A + AC) Copyright 27 Elsevier 2-<34>
35 Simplifying oolean Expressions: Example 2 = A(A + AC) = A(A( + C)) T8 = A(A()) T2 = A(A) T = (AA) T7 = A T3 Copyright 27 Elsevier 2-<35>
36 DeMorgan s Theorem = A = A + A A = A + = A A A Copyright 27 Elsevier 2-<36>
37 ubble Pushing Pushing bubbles backward (from the output) or forward (from the inputs) changes the body of the gate from AND to OR or vice versa. Pushing a bubble from the output back to the inputs puts bubbles on all gate inputs. A Pushing bubbles on all gate inputs forward toward the output puts a bubble on the output and changes the gate body. A A A Copyright 27 Elsevier 2-<37>
38 ubble Pushing What is the oolean expression for this circuit? A C D Copyright 27 Elsevier 2-<38>
39 ubble Pushing What is the oolean expression for this circuit? A C D = A + CD Copyright 27 Elsevier 2-<39>
40 ubble Pushing Rules egin at the output of the circuit and work toward the inputs. Push any bubbles on the final output back toward the inputs. Draw each gate in a form so that bubbles cancel. A C D Copyright 27 Elsevier 2-<4>
41 ubble Pushing Example A C D Copyright 27 Elsevier 2-<4>
42 ubble Pushing Example A no output bubble C D Copyright 27 Elsevier 2-<42>
43 ubble Pushing Example A no output bubble C D A bubble on input and output C D Copyright 27 Elsevier 2-<43>
44 ubble Pushing Example A no output bubble C D A C D A no bubble on input and output bubble on input and output C D = AC + D Copyright 27 Elsevier 2-<44>
45 From Logic to Gates Two-level logic: ANDs followed by ORs Example: = AC + AC + AC A C A C minterm: AC minterm: AC minterm: AC Copyright 27 Elsevier 2-<45>
46 Circuit Schematics with Style Inputs are on the left (or top) side of a schematic Outputs are on the right (or bottom) side of a schematic Whenever possible, gates should flow from left to right Straight wires are better to use than wires with multiple corners Copyright 27 Elsevier 2-<46>
47 Circuit Schematic Rules (cont.) Wires always connect at a T junction A dot where wires cross indicates a connection between the wires Wires crossing without a dot make no connection wires connect at a T junction wires connect at a dot wires crossing without a dot do not connect Copyright 27 Elsevier 2-<47>
48 Multiple Output Circuits Output asserted corresponding to most significant TRUE input A 3 A 2 A A PRIORIT CiIRCUIT 3 2 A 3 A 2 A A 3 2 Copyright 27 Elsevier 2-<48>
49 Multiple Output Circuits Output asserted corresponding to most significant TRUE input A 3 A 2 A A PRIORIT CiIRCUIT 3 2 A 3 A 2 A A 3 2 Copyright 27 Elsevier 2-<49>
50 Priority Encoder Hardware A 3 A 2 A A 3 2 A 3 A 2 A A 3 2 Copyright 27 Elsevier 2-<5>
51 Don t Cares A 3 A 2 A A 3 2 A 3 A 2 X A A X X X 3 2 X X Copyright 27 Elsevier 2-<5>
52 Contention: X Contention: circuit tries to drive the output to and Actual value may be somewhere in between Could be a legal, a legal, or in the forbidden zone Might change with voltage, temperature, time, noise Often causes excessive power dissipation A = = X = Contention usually indicates a bug. Fix it unless you are sure you know what you are doing. Warning: X is used for don t care and contention Note the same thing Look at the context to tell them apart Copyright 27 Elsevier 2-<52>
53 Floating: Z Floating, high impedance, open, high Z Floating output might be,, or somewhere in between A voltmeter won t indicate whether a node is floating Tristate uffer E A E A Z Z Copyright 27 Elsevier 2-<53>
54 Tristate usses Floating nodes are used in tristate busses Many different drivers Exactly one is active at any time processor to bus from bus en video to bus from bus Ethernet to bus from bus en2 en3 shared bus memory to bus from bus en4 Copyright 27 Elsevier 2-<54>
55 Karnaugh Maps (K-Maps) oolean expressions can be minimized by combining terms K-maps minimize equations graphically PA + PA = P A C C A A C AC AC AC AC AC AC AC AC Copyright 27 Elsevier 2-<55>
56 K-map Circle s in adjacent squares In the oolean expression, include only the literals whose true and complement form are not in the circle A C C A = A Copyright 27 Elsevier 2-<56>
57 3-input K-map A C AC AC AC AC AC AC AC AC A Truth Table C K-Map A C Copyright 27 Elsevier 2-<57>
58 3-input K-map A C AC AC AC AC AC AC AC AC A Truth Table K-Map C A C = A + C Copyright 27 Elsevier 2-<58>
59 K-map Definitions Complement: variable with a bar over it A,, C Literal: variable or its complement A, A,,, C, C Implicant: product of literals AC, AC, C Prime implicant: implicant corresponding to the largest circle in a K-map Copyright 27 Elsevier 2-<59>
60 K-map Rules Every in a K-map must be circled at least once Each circle must span a power of 2 (i.e., 2, 4) squares in each direction Each circle must be as large as possible A circle may wrap around the edges of the K-map A don't care (X) is circled only if it helps minimize the equation Copyright 27 Elsevier 2-<6>
61 4-input K-map A C D A CD Copyright 27 Elsevier 2-<6>
62 4-input K-map A C D A CD Copyright 27 Elsevier 2-<62>
63 4-input K-map A C D A CD = AC + AD + AC + D Copyright 27 Elsevier 2-<63>
64 K-maps with Don t Cares A C D X X X X X X X A CD Copyright 27 Elsevier 2-<64>
65 K-maps with Don t Cares A C D X X X X X X X A CD X X X X X X X Copyright 27 Elsevier 2-<65>
66 K-maps with Don t Cares A C D X X X X X X X A CD X X X X X = A + D + C X X Copyright 27 Elsevier 2-<66>
67 Combinational uilding locks Multiplexers Decoders Copyright 27 Elsevier 2-<67>
68 Multiplexer (Mux) Selects between one of N inputs to connect to the output. log 2 N-bit select input control input Example: 2: Mux S D D S D D Copyright 27 Elsevier 2-<68>
69 Multiplexer (Mux) Selects between one of N inputs to connect to the output. log 2 N-bit select input control input Example: 2: Mux S D D S D D Copyright 27 Elsevier 2-<69> S D D
70 Multiplexer Implementations Logic gates Sum-of-products form D D S Tristates For an N-input mux, use N tristates Turn on exactly one to select the appropriate input = D S + D S S D D S D D Copyright 27 Elsevier 2-<7>
71 Logic using Multiplexers Using the mux as a lookup table A = A A Copyright 27 Elsevier 2-<7>
72 Logic using Multiplexers Reducing the size of the mux = A A A A Copyright 27 Elsevier 2-<72>
73 Decoders N inputs, 2 N outputs One-hot outputs: only one output HIGH at once A A 2:4 Decoder 3 2 A A 3 2 Copyright 27 Elsevier 2-<73>
74 Decoder Implementation A A 3 2 Copyright 27 Elsevier 2-<74>
75 Logic using Decoders OR minterms A 2:4 Decoder Minterm A A A A = A + A = A Copyright 27 Elsevier 2-<75>
76 Timing Delay between input change and output changing How to build fast circuits? A delay A Time Copyright 27 Elsevier 2-<76>
77 Propagation & Contamination Delay Propagation delay: t pd = max delay from input to output Contamination delay: t cd = min delay from input to output A t pd A t cd Time Copyright 27 Elsevier 2-<77>
78 Propagation & Contamination Delay Delay is caused by Capacitance and resistance in a circuit Speed of light limitation Reasons why t pd and t cd may be different: Different rising and falling delays Multiple inputs and outputs, some of which are faster than others Circuits slow down when hot and speed up when cold Copyright 27 Elsevier 2-<78>
79 Critical (Long) and Short Paths Critical Path A C D n Short Path n2 Critical (Long) Path: t pd = 2t pd_and + t pd_or Short Path: t cd = t cd_and Copyright 27 Elsevier 2-<79>
80 Glitches Glitch: when a single input change causes multiple output changes Glitches don t cause problems because of synchronous design conventions (which we ll talk about in a bit) ut it s important to recognize a glitch when you see one in timing diagrams Copyright 27 Elsevier 2-<8>
81 Glitch Example What happens when A =, C =, falls? A C C A = A + C Copyright 27 Elsevier 2-<8>
82 Glitch Example (cont.) A = = C = Critical Path n n2 = Short Path n2 n glitch Time Copyright 27 Elsevier 2-<82>
83 Fixing the Glitch C A AC = A + C + AC A = = = C = Copyright 27 Elsevier 2-<83>
84 Why Understand Glitches? Glitches don t cause problems because of synchronous design conventions (which we ll talk about in Chapter 3) ut it s important to recognize a glitch when you see one in simulations or on an oscilloscope Can t get rid of all glitches simultaneous transitions on multiple inputs can also cause glitches Copyright 27 Elsevier 2-<84>
Digital Logic & Computer Design CS Professor Dan Moldovan Spring 2010
Digital Logic & Computer Design CS 434 Professor Dan Moldovan Spring 2 Copyright 27 Elsevier 2- Chapter 2 :: Combinational Logic Design Digital Design and Computer rchitecture David Money Harris and
More informationChapter 2. Introduction. Chapter 2 :: Topics. Circuits. Nodes. Circuit elements. Introduction
hapter 2 Introduction igital esign and omputer rchitecture, 2 nd Edition avid Money Harris and Sarah L. Harris logic circuit is composed of: Inputs Outputs Functional specification Timing specification
More informationLogic Design Combinational Circuits. Digital Computer Design
Logic Design Combinational Circuits Digital Computer Design Topics Combinational Logic Karnaugh Maps Combinational uilding locks Timing 2 Logic Circuit logic circuit is composed of: Inputs Outputs Functional
More informationCOSC3330 Computer Architecture Lecture 2. Combinational Logic
COSC333 Computer rchitecture Lecture 2. Combinational Logic Instructor: Weidong Shi (Larry), PhD Computer Science Department University of Houston Today Combinational Logic oolean lgebra Mux, DeMux, Decoder
More informationCPE100: Digital Logic Design I
Chapter 2 Professor Brendan Morris, SEB 326, brendan.morris@unlv.edu http://www.ee.unlv.edu/~bmorris/cpe/ CPE: Digital Logic Design I Section 4: Dr. Morris Combinational Logic Design Chapter 2 Chapter
More informationENGR 303 Introduction to Logic Design Lecture 3. Dr. Chuck Brown Engineering and Computer Information Science Folsom Lake College
Introduction to Logic Design Lecture 3 Dr. Chuck rown Engineering and Computer Information Science Folsom Lake College Outline for Todays Lecture Logic Circuits SOP / POS oolean Theorems DeMorgan s Theorem
More informationKarnaugh Maps (K-Maps)
Karnaugh Maps (K-Maps) Boolean expressions can be minimized by combining terms P + P = P K-maps minimize equations graphically Put terms to combine close to one another B C C B B C BC BC BC BC BC BC BC
More informationCPE100: Digital Logic Design I
Chapter 2 Professor Brendan Morris, SEB 3216, brendan.morris@unlv.edu http://www.ee.unlv.edu/~b1morris/cpe100/ CPE100: Digital Logic Design I Section 1004: Dr. Morris Combinational Logic Design Chapter
More informationDigital Design 2. Logic Gates and Boolean Algebra
Digital Design 2. Logic Gates and oolean lgebra József Sütő ssistant Lecturer References: [1] D.M. Harris, S.L. Harris, Digital Design and Computer rchitecture, 2nd ed., Elsevier, 213. [2] T.L. Floyd,
More informationAdministrative Notes. Chapter 2 <9>
Administrative Notes Note: New homework instructions starting with HW03 Homework is due at the beginning of class Homework must be organized, legible (messy is not), and stapled to be graded Chapter 2
More informationSlide Set 6. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary
Slide Set 6 for ENEL 353 Fall 2017 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 2017 SN s ENEL 353 Fall 2017 Slide Set 6 slide
More informationProve that if not fat and not triangle necessarily means not green then green must be fat or triangle (or both).
hapter : oolean lgebra.) Definition of oolean lgebra The oolean algebra is named after George ool who developed this algebra (854) in order to analyze logical problems. n example to such problem is: Prove
More information211: Computer Architecture Summer 2016
211: Computer Architecture Summer 2016 Liu Liu Topic: Storage Project3 Digital Logic - Storage: Recap - Review: cache hit rate - Project3 - Digital Logic: - truth table => SOP - simplification: Boolean
More informationThis form sometimes used in logic circuit, example:
Objectives: 1. Deriving of logical expression form truth tables. 2. Logical expression simplification methods: a. Algebraic manipulation. b. Karnaugh map (k-map). 1. Deriving of logical expression from
More informationENG2410 Digital Design Combinational Logic Circuits
ENG240 Digital Design Combinational Logic Circuits Fall 207 S. Areibi School of Engineering University of Guelph Binary variables Binary Logic Can be 0 or (T or F, low or high) Variables named with single
More informationPossible logic functions of two variables
ombinational logic asic logic oolean algebra, proofs by re-writing, proofs by perfect induction logic functions, truth tables, and switches NOT, ND, OR, NND, NOR, OR,..., minimal set Logic realization
More informationCh 2. Combinational Logic. II - Combinational Logic Contemporary Logic Design 1
Ch 2. Combinational Logic II - Combinational Logic Contemporary Logic Design 1 Combinational logic Define The kind of digital system whose output behavior depends only on the current inputs memoryless:
More informationFundamentals of Computer Systems
Fundamentals of Computer Systems Boolean Logic Stephen A. Edwards Columbia University Summer 2017 Boolean Logic George Boole 1815 1864 Boole s Intuition Behind Boolean Logic Variables,,... represent classes
More informationCHAPTER1: Digital Logic Circuits Combination Circuits
CS224: Computer Organization S.KHABET CHAPTER1: Digital Logic Circuits Combination Circuits 1 PRIMITIVE LOGIC GATES Each of our basic operations can be implemented in hardware using a primitive logic gate.
More informationCSE140: Components and Design Techniques for Digital Systems. Logic minimization algorithm summary. Instructor: Mohsen Imani UC San Diego
CSE4: Components and Design Techniques for Digital Systems Logic minimization algorithm summary Instructor: Mohsen Imani UC San Diego Slides from: Prof.Tajana Simunic Rosing & Dr.Pietro Mercati Definition
More informationII. COMBINATIONAL LOGIC DESIGN. - algebra defined on a set of 2 elements, {0, 1}, with binary operators multiply (AND), add (OR), and invert (NOT):
ENGI 386 Digital Logic II. COMBINATIONAL LOGIC DESIGN Combinational Logic output of digital system is only dependent on current inputs (i.e., no memory) (a) Boolean Algebra - developed by George Boole
More informationCPE100: Digital Logic Design I
Professor Brendan Morris, SEB 3216, brendan.morris@unlv.edu CPE100: Digital Logic Design I Midterm02 Review http://www.ee.unlv.edu/~b1morris/cpe100/ 2 Logistics Thursday Nov. 16 th In normal lecture (13:00-14:15)
More informationFundamentals of Computer Systems
Fundamentals of Computer Systems Boolean Logic Stephen A. Edwards Columbia University Summer 2015 Boolean Logic George Boole 1815 1864 Boole s Intuition Behind Boolean Logic Variables X,,... represent
More informationEECS150 - Digital Design Lecture 19 - Combinational Logic Circuits : A Deep Dive
EECS150 - Digital Design Lecture 19 - Combinational Logic Circuits : A Deep Dive March 30, 2010 John Wawrzynek Spring 2010 EECS150 - Lec19-cl1 Page 1 Boolean Algebra I (Representations of Combinational
More informationChap 2. Combinational Logic Circuits
Overview 2 Chap 2. Combinational Logic Circuits Spring 24 Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard Forms Part 2 Circuit Optimization Two-Level Optimization
More informationDigital Logic. CS211 Computer Architecture. l Topics. l Transistors (Design & Types) l Logic Gates. l Combinational Circuits.
CS211 Computer Architecture Digital Logic l Topics l Transistors (Design & Types) l Logic Gates l Combinational Circuits l K-Maps Figures & Tables borrowed from:! http://www.allaboutcircuits.com/vol_4/index.html!
More informationCombinational Logic (mostly review!)
ombinational Logic (mostly review!)! Logic functions, truth tables, and switches " NOT, N, OR, NN, NOR, OR,... " Minimal set! xioms and theorems of oolean algebra " Proofs by re-writing " Proofs by perfect
More informationWeek-I. Combinational Logic & Circuits
Week-I Combinational Logic & Circuits Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other logic operators IC families and
More informationCHAPTER III BOOLEAN ALGEBRA
CHAPTER III- CHAPTER III CHAPTER III R.M. Dansereau; v.. CHAPTER III-2 BOOLEAN VALUES INTRODUCTION BOOLEAN VALUES Boolean algebra is a form of algebra that deals with single digit binary values and variables.
More informationCombinational Logic. Review of Combinational Logic 1
Combinational Logic! Switches -> Boolean algebra! Representation of Boolean functions! Logic circuit elements - logic gates! Regular logic structures! Timing behavior of combinational logic! HDLs and combinational
More informationCombinational logic. Possible logic functions of two variables. Minimal set of functions. Cost of different logic functions.
Combinational logic Possible logic functions of two variables Logic functions, truth tables, and switches NOT, ND, OR, NND, NOR, OR,... Minimal set xioms and theorems of oolean algebra Proofs by re-writing
More informationCombinational Logic Circuits Part II -Theoretical Foundations
Combinational Logic Circuits Part II -Theoretical Foundations Overview Boolean Algebra Basic Logic Operations Basic Identities Basic Principles, Properties, and Theorems Boolean Function and Representations
More informationChapter 2 Combinational logic
Chapter 2 Combinational logic Chapter 2 is very easy. I presume you already took discrete mathemtics. The major part of chapter 2 is boolean algebra. II - Combinational Logic Copyright 24, Gaetano Borriello
More informationReview. EECS Components and Design Techniques for Digital Systems. Lec 06 Minimizing Boolean Logic 9/ Review: Canonical Forms
Review EECS 150 - Components and Design Techniques for Digital Systems Lec 06 Minimizing Boolean Logic 9/16-04 David Culler Electrical Engineering and Computer Sciences University of California, Berkeley
More informationUNIT 5 KARNAUGH MAPS Spring 2011
UNIT 5 KRNUGH MPS Spring 2 Karnaugh Maps 2 Contents Minimum forms of switching functions Two- and three-variable Four-variable Determination of minimum expressions using essential prime implicants Five-variable
More informationMODULAR CIRCUITS CHAPTER 7
CHAPTER 7 MODULAR CIRCUITS A modular circuit is a digital circuit that performs a specific function or has certain usage. The modular circuits to be introduced in this chapter are decoders, encoders, multiplexers,
More informationUnit 2 Session - 6 Combinational Logic Circuits
Objectives Unit 2 Session - 6 Combinational Logic Circuits Draw 3- variable and 4- variable Karnaugh maps and use them to simplify Boolean expressions Understand don t Care Conditions Use the Product-of-Sums
More informationSlides for Lecture 19
Slides for Lecture 19 ENEL 353: Digital Circuits Fall 2013 Term Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary 23 October, 2013 ENEL 353
More informationCHAPTER III BOOLEAN ALGEBRA
CHAPTER III- CHAPTER III CHAPTER III R.M. Dansereau; v.. CHAPTER III-2 BOOLEAN VALUES INTRODUCTION BOOLEAN VALUES Boolean algebra is a form of algebra that deals with single digit binary values and variables.
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT2: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 2 Following the slides of Dr. Ahmed H. Madian ذو الحجة 438 ه Winter
More informationWorking with Combinational Logic. Design example: 2x2-bit multiplier
Working with ombinational Logic Simplification two-level simplification exploiting don t cares algorithm for simplification Logic realization two-level logic and canonical forms realized with NNs and NORs
More informationCMSC 313 Lecture 19 Homework 4 Questions Combinational Logic Components Programmable Logic Arrays Introduction to Circuit Simplification
CMSC 33 Lecture 9 Homework 4 Questions Combinational Logic Components Programmable Logic rrays Introduction to Circuit Simplification UMC, CMSC33, Richard Chang CMSC 33, Computer Organization
More informationChapter 2: Switching Algebra and Logic Circuits
Chapter 2: Switching Algebra and Logic Circuits Formal Foundation of Digital Design In 1854 George Boole published An investigation into the Laws of Thoughts Algebraic system with two values 0 and 1 Used
More informationChapter 4 Optimized Implementation of Logic Functions
Chapter 4 Optimized Implementation of Logic Functions Logic Minimization Karnaugh Maps Systematic Approach for Logic Minimization Minimization of Incompletely Specified Functions Tabular Method for Minimization
More informationLogic Design. Chapter 2: Introduction to Logic Circuits
Logic Design Chapter 2: Introduction to Logic Circuits Introduction Logic circuits perform operation on digital signal Digital signal: signal values are restricted to a few discrete values Binary logic
More informationCSE140: Components and Design Techniques for Digital Systems. Decoders, adders, comparators, multipliers and other ALU elements. Tajana Simunic Rosing
CSE4: Components and Design Techniques for Digital Systems Decoders, adders, comparators, multipliers and other ALU elements Tajana Simunic Rosing Mux, Demux Encoder, Decoder 2 Transmission Gate: Mux/Tristate
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 1 Gate Circuits and Boolean Equations Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active
More informationAppendix A: Digital Logic. Principles of Computer Architecture. Principles of Computer Architecture by M. Murdocca and V. Heuring
- Principles of Computer rchitecture Miles Murdocca and Vincent Heuring 999 M. Murdocca and V. Heuring -2 Chapter Contents. Introduction.2 Combinational Logic.3 Truth Tables.4 Logic Gates.5 Properties
More informationCMSC 313 Lecture 19 Combinational Logic Components Programmable Logic Arrays Karnaugh Maps
CMSC 33 Lecture 9 Combinational Logic Components Programmable Logic rrays Karnaugh Maps UMC, CMSC33, Richard Chang Last Time & efore Returned midterm exam Half adders & full adders Ripple
More informationContents. Chapter 3 Combinational Circuits Page 1 of 36
Chapter 3 Combinational Circuits Page of 36 Contents Combinational Circuits...2 3. Analysis of Combinational Circuits...3 3.. Using a Truth Table...3 3..2 Using a Boolean Function...6 3.2 Synthesis of
More informationCPE100: Digital Logic Design I
Professor Brendan Morris, SEB 3216, brendan.morris@unlv.edu CPE100: Digital Logic Design I Final Review http://www.ee.unlv.edu/~b1morris/cpe100/ 2 Logistics Tuesday Dec 12 th 13:00-15:00 (1-3pm) 2 hour
More informationThe Karnaugh Map COE 202. Digital Logic Design. Dr. Muhamed Mudawar King Fahd University of Petroleum and Minerals
The Karnaugh Map COE 202 Digital Logic Design Dr. Muhamed Mudawar King Fahd University of Petroleum and Minerals Presentation Outline Boolean Function Minimization The Karnaugh Map (K-Map) Two, Three,
More informationCombinational Logic Design Principles
Combinational Logic Design Principles Switching algebra Doru Todinca Department of Computers Politehnica University of Timisoara Outline Introduction Switching algebra Axioms of switching algebra Theorems
More informationfor Digital Systems Simplification of logic functions Tajana Simunic Rosing Sources: TSR, Katz, Boriello & Vahid
SE140: omponents and Design Techniques for Digital Systems Simplification of logic functions Tajana Simunic Rosing 1 What we covered thus far: Number representations Where we are now inary, Octal, Hex,
More informationCS 121 Digital Logic Design. Chapter 2. Teacher Assistant. Hanin Abdulrahman
CS 121 Digital Logic Design Chapter 2 Teacher Assistant Hanin Abdulrahman 1 2 Outline 2.2 Basic Definitions 2.3 Axiomatic Definition of Boolean Algebra. 2.4 Basic Theorems and Properties 2.5 Boolean Functions
More informationCPE100: Digital Logic Design I
Professor Brendan Morris, SEB 3216, brendan.morris@unlv.edu CPE100: Digital Logic Design I Midterm01 Review http://www.ee.unlv.edu/~b1morris/cpe100/ 2 Logistics Thursday Oct. 5 th In normal lecture (13:00-14:15)
More informationWhy digital? Overview. Number Systems. Binary to Decimal conversion
Why digital? Overview It has the following advantages over analog. It can be processed and transmitted efficiently and reliably. It can be stored and retrieved with greater accuracy. Noise level does not
More informationFunctions. Computers take inputs and produce outputs, just like functions in math! Mathematical functions can be expressed in two ways:
Boolean Algebra (1) Functions Computers take inputs and produce outputs, just like functions in math! Mathematical functions can be expressed in two ways: An expression is finite but not unique f(x,y)
More informationReview: Additional Boolean operations
Review: Additional Boolean operations Operation: NAND (NOT-AND) NOR (NOT-OR) XOR (exclusive OR) Expressions: (xy) = x + y (x + y) = x y x y = x y + xy Truth table: x y (xy) x y (x+y) x y x y 0 0 1 0 1
More informationDigital Circuit And Logic Design I. Lecture 3
Digital Circuit And Logic Design I Lecture 3 Outline Combinational Logic Design Principles (). Introduction 2. Switching algebra 3. Combinational-circuit analysis 4. Combinational-circuit synthesis Panupong
More informationMinimization techniques
Pune Vidyarthi Griha s COLLEGE OF ENGINEERING, NSIK - 4 Minimization techniques By Prof. nand N. Gharu ssistant Professor Computer Department Combinational Logic Circuits Introduction Standard representation
More informationShow that the dual of the exclusive-or is equal to its compliment. 7
Darshan Institute of ngineering and Technology, Rajkot, Subject: Digital lectronics (2300) GTU Question ank Unit Group Questions Do as directed : I. Given that (6)0 = (00)x, find the value of x. II. dd
More informationChapter 5. Digital systems. 5.1 Boolean algebra Negation, conjunction and disjunction
Chapter 5 igital systems digital system is any machine that processes information encoded in the form of digits. Modern digital systems use binary digits, encoded as voltage levels. Two voltage levels,
More informationSimplifying Logic Circuits with Karnaugh Maps
Simplifying Logic Circuits with Karnaugh Maps The circuit at the top right is the logic equivalent of the Boolean expression: f = abc + abc + abc Now, as we have seen, this expression can be simplified
More informationLecture 2 Review on Digital Logic (Part 1)
Lecture 2 Review on Digital Logic (Part 1) Xuan Silvia Zhang Washington University in St. Louis http://classes.engineering.wustl.edu/ese461/ Grading Engagement 5% Review Quiz 10% Homework 10% Labs 40%
More informationChapter 7 Combinational Logic Networks
Overview Design Example Design Example 2 Universal Gates NND-NND Networks NND Chips Chapter 7 Combinational Logic Networks SKEE223 Digital Electronics Mun im/rif/izam KE, Universiti Teknologi Malaysia
More informationPart 5: Digital Circuits
Characteristics of any number system are: Part 5: Digital Circuits 5.: Number Systems & Code Conversions. ase or radix is equal to the number of possible symbols in the system 2. The largest value of digit
More informationTextbook: Digital Design, 3 rd. Edition M. Morris Mano
: 25/5/ P-/70 Tetbook: Digital Design, 3 rd. Edition M. Morris Mano Prentice-Hall, Inc. : INSTRUCTOR : CHING-LUNG SU E-mail: kevinsu@yuntech.edu.tw Chapter 3 25/5/ P-2/70 Chapter 3 Gate-Level Minimization
More informationSimplification of Boolean Functions. Dept. of CSE, IEM, Kolkata
Simplification of Boolean Functions Dept. of CSE, IEM, Kolkata 1 Simplification of Boolean Functions: An implementation of a Boolean Function requires the use of logic gates. A smaller number of gates,
More informationChapter 7 Logic Circuits
Chapter 7 Logic Circuits Goal. Advantages of digital technology compared to analog technology. 2. Terminology of Digital Circuits. 3. Convert Numbers between Decimal, Binary and Other forms. 5. Binary
More informationT02 Tutorial Slides for Week 6
T02 Tutorial Slides for Week 6 ENEL 353: Digital Circuits Fall 2017 Term Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary 17 October, 2017
More informationEvery time has a value associated with it, not just some times. A variable can take on any value within a range
Digital Logic Circuits Binary Logic and Gates Logic Simulation Boolean Algebra NAND/NOR and XOR gates Decoder fundamentals Half Adder, Full Adder, Ripple Carry Adder Analog vs Digital Analog Continuous»
More informationLecture 6: Manipulation of Algebraic Functions, Boolean Algebra, Karnaugh Maps
EE210: Switching Systems Lecture 6: Manipulation of Algebraic Functions, Boolean Algebra, Karnaugh Maps Prof. YingLi Tian Feb. 21/26, 2019 Department of Electrical Engineering The City College of New York
More informationComputer Organization I
Computer Organization I Lecture 6: Boolean Algebra /2/29 Wei Lu CS283 Overview Two Principles in Boolean Algebra () Duality Principle (2) Complement Principle Standard Form of Logic Expression () Sum of
More informationCS470: Computer Architecture. AMD Quad Core
CS470: Computer Architecture Yashwant K. Malaiya, Professor malaiya@cs.colostate.edu AMD Quad Core 1 Architecture Layers Building blocks Gates, flip-flops Functional bocks: Combinational, Sequential Instruction
More informationBoolean Algebra, Gates and Circuits
Boolean Algebra, Gates and Circuits Kasper Brink November 21, 2017 (Images taken from Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc.) Outline Last week: Von
More informationLogic. Combinational. inputs. outputs. the result. system can
Digital Electronics Combinational Logic Functions Digital logic circuits can be classified as either combinational or sequential circuits. A combinational circuit is one where the output at any time depends
More information2009 Spring CS211 Digital Systems & Lab CHAPTER 2: INTRODUCTION TO LOGIC CIRCUITS
CHAPTER 2: INTRODUCTION TO LOGIC CIRCUITS What will we learn? 2 Logic functions and circuits Boolean Algebra Logic gates and Synthesis CAD tools and VHDL Read Section 2.9 and 2.0 Terminology 3 Digital
More informationECE 2300 Digital Logic & Computer Organization
ECE 23 Digital Logic & Computer Organization Spring 28 Combinational Building Blocks Lecture 5: Announcements Lab 2 prelab due tomorrow HW due Friday HW 2 to be posted on Thursday Lecture 4 to be replayed
More informationEE40 Lec 15. Logic Synthesis and Sequential Logic Circuits
EE40 Lec 15 Logic Synthesis and Sequential Logic Circuits Prof. Nathan Cheung 10/20/2009 Reading: Hambley Chapters 7.4-7.6 Karnaugh Maps: Read following before reading textbook http://www.facstaff.bucknell.edu/mastascu/elessonshtml/logic/logic3.html
More informationEECS Variable Logic Functions
EECS150 Section 1 Introduction to Combinational Logic Fall 2001 2-Variable Logic Functions There are 16 possible functions of 2 input variables: in general, there are 2**(2**n) functions of n inputs X
More informationBoolean Algebra and Logic Simplification
S302 Digital Logic Design Boolean Algebra and Logic Simplification Boolean Analysis of Logic ircuits, evaluating of Boolean expressions, representing the operation of Logic circuits and Boolean expressions
More informationBoolean Algebra and Digital Logic 2009, University of Colombo School of Computing
IT 204 Section 3.0 Boolean Algebra and Digital Logic Boolean Algebra 2 Logic Equations to Truth Tables X = A. B + A. B + AB A B X 0 0 0 0 3 Sum of Products The OR operation performed on the products of
More informationEx: Boolean expression for majority function F = A'BC + AB'C + ABC ' + ABC.
Boolean Expression Forms: Sum-of-products (SOP) Write an AND term for each input combination that produces a 1 output. Write the input variable if its value is 1; write its complement otherwise. OR the
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal
More informationBasic Gate Repertoire
asic Gate Repertoire re we sure we have all the gates we need? Just how many two-input gates are there? ND OR NND NOR SURGE Hmmmm all of these have 2-inputs (no surprise) each with 4 combinations, giving
More informationCombinational Logic Fundamentals
Topic 3: Combinational Logic Fundamentals In this note we will study combinational logic, which is the part of digital logic that uses Boolean algebra. All the concepts presented in combinational logic
More informationDigital Logic Design. Combinational Logic
Digital Logic Design Combinational Logic Minterms A product term is a term where literals are ANDed. Example: x y, xz, xyz, A minterm is a product term in which all variables appear exactly once, in normal
More informationChapter 2 Boolean Algebra and Logic Gates
Ch1: Digital Systems and Binary Numbers Ch2: Ch3: Gate-Level Minimization Ch4: Combinational Logic Ch5: Synchronous Sequential Logic Ch6: Registers and Counters Switching Theory & Logic Design Prof. Adnan
More informationComputer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: Digital Logic
Computer Science 324 Computer Architecture Mount Holyoke College Fall 2007 Topic Notes: Digital Logic Our goal for the next few weeks is to paint a a reasonably complete picture of how we can go from transistor
More informationMC9211 Computer Organization
MC92 Computer Organization Unit : Digital Fundamentals Lesson2 : Boolean Algebra and Simplification (KSB) (MCA) (29-2/ODD) (29 - / A&B) Coverage Lesson2 Introduces the basic postulates of Boolean Algebra
More informationL2: Combinational Logic Design (Construction and Boolean Algebra)
L2: Combinational Logic Design (Construction and Boolean Algebra) Acknowledgements: Lecture material adapted from Chapter 2 of R. Katz, G. Borriello, Contemporary Logic Design (second edition), Pearson
More informationﻮﻧﺭﺎﮐ ﺔﺸﻘﻧ ﺎﺑ ﻱﺯﺎﺳ ﻪﻨﻴﻬﺑ
بهينه سازي با نقشة کارنو Karnaugh Map Karnaugh Map Method of graphically representing the truth table that helps visualize adjacencies 2-variable K-map 3-variable K-map 2 3 2 3 6 7 4 5 D 3 2 4 5 7 6 2
More informationChapter 2 : Boolean Algebra and Logic Gates
Chapter 2 : Boolean Algebra and Logic Gates By Electrical Engineering Department College of Engineering King Saud University 1431-1432 2.1. Basic Definitions 2.2. Basic Theorems and Properties of Boolean
More informationStandard Expression Forms
ThisLecture will cover the following points: Canonical and Standard Forms MinTerms and MaxTerms Digital Logic Families 24 March 2010 Standard Expression Forms Two standard (canonical) expression forms
More informationLogic. Basic Logic Functions. Switches in series (AND) Truth Tables. Switches in Parallel (OR) Alternative view for OR
TOPIS: Logic Logic Expressions Logic Gates Simplifying Logic Expressions Sequential Logic (Logic with a Memory) George oole (85-864), English mathematician, oolean logic used in digital computers since
More informationLecture A: Logic Design and Gates
Lecture A: Logic Design and Gates Syllabus My office hours 9.15-10.35am T,Th or gchoi@ece.tamu.edu 333G WERC Text: Brown and Vranesic Fundamentals of Digital Logic,» Buy it.. Or borrow it» Other book:
More informationBoolean Logic Continued Prof. James L. Frankel Harvard University
Boolean Logic Continued Prof. James L. Frankel Harvard University Version of 10:18 PM 5-Sep-2017 Copyright 2017, 2016 James L. Frankel. All rights reserved. D Latch D R S Clk D Clk R S X 0 ~S 0 = R 0 ~R
More informationSystems I: Computer Organization and Architecture
Systems I: Computer Organization and Architecture Lecture 6 - Combinational Logic Introduction A combinational circuit consists of input variables, logic gates, and output variables. The logic gates accept
More information