Electronics II. Midterm #2


 Loraine Strickland
 2 years ago
 Views:
Transcription
1 The University of Toledo EECS:3400 Electronics I Section sums_elct7.fm  StudentName Electronics II Midterm # Problems Points Total 0 Was the exam fair? yes no
2 The University of Toledo sums_elct7.fm  Problem 8 points Given is the operational amplifier circuit model shown in Figure.. R v v  R v d  r d Av d  r o R L R kω R 30kΩ R L 0kΩ A8dB r d 40kΩ r o 3kΩ Figure. An operational circuit amplifier model. Parameter values of circuit elements in the given operational circuit amplifier are finite, and are given in Figure.. For the operational circuit model of Figure., demonstrate an ability to:. recognize the type of the feedback amplifier that it implements,. derive an expression for the amplifier s loop gain T in terms of the given circuit element parameters, 3. work with logarithmic units of gain/amplification. Solution Hint # For full credit: all equations, all answers to questions, all circuit models and other graphical representations are expected to be entered into the space designated for them; all shown numerical results must be preceded by the symbolic and numeric expressions whose evaluation produces the shown results. An explicit demonstration of understanding the following solution steps is expected.. Recognize the type of the operational circuit whose model is shown in Figure., and mark below the name by which it is referred to in professional literature. For full credit, mark your answers yes, no, or not applicable for all offered answers! yes no not applicable x transresistance operational amplifier x inverting operational amplifier, x noninverting operational amplifier, x transconductance operational amplifier.. In the circuit model of Figure., show the positive reference direction for voltage v d. 7/6/
3 The University of Toledo sums_elct7.fm Calculate the value of the differential amplifier s magnitudescale voltage gain A. Show your calculation in the space reserved for equation (). A[dB] 0 A[dB] lga A Construct an auxiliary circuit for determining the loop gain of the feedback amplifier circuit shown in Figure.. Show the constructed circuit, with indicated positive reference directions of all relevant voltages, in the space reserved for Figure.. () R R r Av d d r b a v o d v v 0V  v i R a v v a b R L Figure. Auxiliary circuit for determining the loop gain T of the amplifier whose circuit model is shown in Figure... Using the auxiliary circuit model of Figure., derive an expression for the loop gain T of the amplifier shown in Figure.. Show your calculation in the space reserved for equation (). R d R r d v i R d R R d v a R a R L (R R d ) R L (R R d ) R L R R d ) v d v i v b Av d R a r o R a T v b v i v d v v b a v a v i v d R a R d ()A R R d ro R a R R d L (R R d ) ()(A) R R d r o R L (R R d ) A R d R L r o (R L R R d )R L (R R d ) 7/6/
4 The University of Toledo sums_elct7.fm Calculate the numerical value of the loop gain T of the amplifier whose circuit model is shown in Figure.. Show your calculation in the space reserved for equation (3). R d R r d R r d R r d 40 kω 40 (3) T A R d R L r o (R L R R d )R L (R R d ) ( ) 0 4 ( ) ( ) 0 4 ( ) /6/
5 The University of Toledo sums_elct7.fm  Problem points Figure. shows the electric circuit model of a multiple current sorce circuit, which is a part of the analog voltage amplifier circuit that was built on an Integrated Circuit that was manufactured on a CMOS tecnology processing line. V DD V DD I REF I O I O I O3 I O4 V DD V M M 0 v GS M3 M4 60 M V DD 0V I REF 0µA V SS, Figure. Multiple current source circuit. Problem Statement For the given electric circuit model of Figure., demonstrate an ability to:. recognize its two constituent parts:  the the reference voltage transistor, and  the current sources transistors,. determine the current sources currents of four current sources in the circuit model of Figure... Hint # For full credit, give answers to all questions, prepare all required circuit diagrams and all equations in the space reserved for them; include in due succession all symbolic and numerical expressions whose evaluation produces shown results. Problem Solution An explicit demonstration of understanding the following solution steps is expected.. In the list of transistor designations shown in the space reserved for equation (), circle the transistor designation of the reference voltage transistor in the circuit of Figure.. M M M3 M4 M () 7/6/
6 The University of Toledo sums_elct7.fm  6. Determine the value of the current source current I O in the circuit model of Figure.. Show the the necessary calculations in the space reserved for equation (). The following relation is indicated in Figure.: v GS v GS v GS3 v GS4 v GS v GS Therefore, for all X x, 3, 4, : I O(X) I REF k nx (v GSX  V TN ) k n (v GS  V TN ) k nx k n k n k n Therefore, for calculating thecurrent I O, X x applies: W X L X W L () I O I REF W 0 k n L I REF 0 0 k 6 n W L A.3 Determine the value of the current source current I O in the circuit model of Figure.. Show the the necessary calculations in the space reserved for equation (3). I O I REF W 3 k n3 L I 3 REF 0 0 k 6 n W L A (3).4 Determine the value of the current source current I O3 in the circuit model of Figure.. Show the the necessary calculations in the space reserved for equation (4). I O3 I REF W 4 60 k n4 L I 4 REF 0 0 k 6 n W L A. Determine the value of the current source current I O4 in the circuit model of Figure.. Show the the necessary calculations in the space reserved for equation (). I O4 I REF W k n L I REF 0 0 k 6 n W L A (4) () 7/6/
7 The University of Toledo sums_elct7.fm  7 Problem 3 7 points Given is the electric circuit model of a BJT differential amplifier shown in Figure 3.(a). V CC R C v o v o R C I C I C Q I E I E Q  V  BE V BE vi I EE R EE v I R C kω R EE 0kΩ I EE ma β o 90 I S fa V A 9V V CC V V EE V V CC R C v o v o R C I C I C Q I EE I E I E Q  V  BE V BE vi 0V R EE v I 0V (a) (b) Figure 3. A MOSFET differential amplifier circuit model. (a) The circuit model with connected signal sources. (b) equivalent DC circuit model. for determining the quiscent operaring points of the transistors in the circuit of Figure 3.(a). Problem Statement For the given amplifier s circuit model of Figure 3.(a), demonstrate an ability to determine:. operating point of the matched transistors in the circuit of a differential amplifier,. small signal parameters of the transistors, Hint # For full credit, give answers to all questions, prepare all required circuit diagrams and all equations in the space reserved for them; include in due succession all symbolic and numerical expressions whose evaluation produces shown results. Problem Solution An explicit demonstration of understanding the following solution steps is expected. 3. In the space reserved for Figure 3.(b), prepare the DC equivalent circuit model for determining the quiscent operaring points of the transistors in the circuit of Figure 3.(a). 7/6/
8 The University of Toledo sums_elct7.fm Calculate the collector current values of the transistors in the amplifier s circuit miodel of Figure 3.(b). Show your calculation in the space reserved for equation (3). Since R EE >> R C, the component of I EE that flows through R EE can be neglected in this calculation. I EE (I E I E ) I I E I E EE I I E I E } C I E I EE A (3) 3.3 Calculate the indicated base to emitter voltage, V BE, of the transistors in the amplifier s circuit miodel of Figure 3.. Show your calculation in the space reserved for equation (3). V BE V T ln I C I S 03 ln V (3) 3.4 Calculate the the common value of the collector to emitter voltages, V CE and V CE, of the transistors in the amplifier s circuit miodel of Figure 3.. Show your calculation in the space reserved for equation (33). V CE R C I C V CC  V B V BE V (33)./. 3. In the space reserved for Figure 3., show the unilateral lowfrequency hybridπ smallsignal circuit model of the BJT transistor. B i i i o C v i r π β o i i r o v o E Figure 3. Unilateral small signal lowfrequency hybridπ circuit model of the BJT transistor. 7/6/
9 The University of Toledo sums_elct7.fm Using the known values of circuit element parameters and currents, determine the value of the small signal transconductance, g m, of the transistors in the given amplifier circuit. Show your calculation in the space reserved for equation (34). g m I C V T mA/V (34) 3.7 Using the known values of circuit element parameters and currents, determine the value of the input resistance r π of the transistors in the given amplifier circuit. Show your calculation in the space reserved for equation (3). r π β o g m kω (3) 7/6/
Electronics II. Midterm #2
The University of Toledo EECS:3400 Electronics I su4ms_elct7.fm Section Electronics II Midterm # Problems Points. 8. 7 3. 5 Total 0 Was the exam fair? yes no The University of Toledo su4ms_elct7.fm Problem
More informationElectronics II. Midterm #1
The University of Toledo EECS:3400 Electronics I su3ms_elct7.fm Section Electronics II Midterm # Problems Points. 5. 6 3. 9 Total 0 Was the exam fair? yes no The University of Toledo su3ms_elct7.fm Problem
More informationElectronics II. Midterm II
The University of Toledo su7ms_elct7.fm  Electronics II Midterm II Problems Points. 7. 7 3. 6 Total 0 Was the exam fair? yes no The University of Toledo su7ms_elct7.fm  Problem 7 points Equation ()
More informationElectronics II. Final Examination
The University of Toledo f17fs_elct27.fm 1 Electronics II Final Examination Problems Points 1. 11 2. 14 3. 15 Total 40 Was the exam fair? yes no The University of Toledo f17fs_elct27.fm 2 Problem 1 11
More informationElectronics II. Final Examination
f3fs_elct7.fm  The University of Toledo EECS:3400 Electronics I Section Student Name Electronics II Final Examination Problems Points.. 3 3. 5 Total 40 Was the exam fair? yes no Analog Electronics f3fs_elct7.fm
More informationElectronics II. Midterm II
The University of Toledo f4ms_elct7.fm  Section Electronics II Midterm II Problems Points. 7. 7 3. 6 Total 0 Was the exam fair? yes no The University of Toledo f4ms_elct7.fm  Problem 7 points Given in
More informationElectronics II. Final Examination
The University of Toledo f6fs_elct7.fm  Electronics II Final Examination Problems Points. 5. 0 3. 5 Total 40 Was the exam fair? yes no The University of Toledo f6fs_elct7.fm  Problem 5 points Given is
More informationBiasing the CE Amplifier
Biasing the CE Amplifier Graphical approach: plot I C as a function of the DC baseemitter voltage (note: normally plot vs. base current, so we must return to EbersMoll): I C I S e V BE V th I S e V th
More informationCircle the one best answer for each question. Five points per question.
ID # NAME EE255 EXAM 3 November 8, 2001 Instructor (circle one) Talavage Gray This exam consists of 16 multiple choice questions and one workout problem. Record all answers to the multiple choice questions
More information55:041 Electronic Circuits The University of Iowa Fall Final Exam
Final Exam Name: Score Max: 135 Question 1 (1 point unless otherwise noted) a. What is the maximum theoretical efficiency for a classb amplifier? Answer: 78% b. The abbreviation/term ESR is often encountered
More informationEE 321 Analog Electronics, Fall 2013 Homework #8 solution
EE 321 Analog Electronics, Fall 2013 Homework #8 solution 5.110. The following table summarizes some of the basic attributes of a number of BJTs of different types, operating as amplifiers under various
More informationEE105 Fall 2014 Microelectronic Devices and Circuits
EE05 Fall 204 Microelectronic Devices and Circuits Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH) Terminal Gain and I/O Resistances of BJT Amplifiers Emitter (CE) Collector (CC) Base (CB)
More informationElectric Circuits I. Midterm #1 Examination
EECS:2300, Electric Circuits I s8ms_elci7.fm  Electric Circuits I Midterm # Examination Problems Points. 4 2. 6 3. 5 Total 5 Was the exam fair? yes no EECS:2300, Electric Circuits I s8ms_elci7.fm  2
More informationID # NAME. EE255 EXAM 3 April 7, Instructor (circle one) Ogborn Lundstrom
ID # NAME EE255 EXAM 3 April 7, 1998 Instructor (circle one) Ogborn Lundstrom This exam consists of 20 multiple choice questions. Record all answers on this page, but you must turn in the entire exam.
More informationBipolar junction transistors
Bipolar junction transistors Find parameters of te BJT in CE configuration at BQ 40 µa and CBQ V. nput caracteristic B / µa 40 0 00 80 60 40 0 0 0, 0,5 0,3 0,35 0,4 BE / V Output caracteristics C / ma
More informationHomework Assignment 09
Homework Assignment 09 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. What is the 3dB bandwidth of the amplifier shown below if r π = 2.5K, r o = 100K, g m = 40 ms, and C L =
More informationHomework Assignment 08
Homework Assignment 08 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. Give one phrase/sentence that describes the primary advantage of an active load. Answer: Large effective resistance
More informationChapter 13 SmallSignal Modeling and Linear Amplification
Chapter 13 SmallSignal Modeling and Linear Amplification Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 1/4/12 Chap 131 Chapter Goals Understanding of concepts related to: Transistors
More informationBJT Biasing Cont. & Small Signal Model
BJT Biasing Cont. & Small Signal Model Conservative Bias Design (1/3, 1/3, 1/3 Rule) Bias Design Example SmallSignal BJT Models SmallSignal Analysis 1 Emitter Feedback Bias Design R B R C V CC R 1 R
More informationECE343 Test 1: Feb 10, :008:00pm, Closed Book. Name : SOLUTION
ECE343 Test : Feb 0, 00 6:008:00pm, Closed Book Name : SOLUTION C Depl = C J0 + V R /V o ) m C Diff = τ F g m ω T = g m C µ + C π ω T = g m I / D C GD + C or V OV GS b = τ i τ i = R i C i ω H b Z = Z
More informationFinal Exam. 55:041 Electronic Circuits. The University of Iowa. Fall 2013.
Final Exam Name: Max: 130 Points Question 1 In the circuit shown, the opamp is ideal, except for an input bias current I b = 1 na. Further, R F = 10K, R 1 = 100 Ω and C = 1 μf. The switch is opened at
More informationBipolar Junction Transistor (BJT)  Introduction
Bipolar Junction Transistor (BJT)  Introduction It was found in 1948 at the Bell Telephone Laboratories. It is a three terminal device and has three semiconductor regions. It can be used in signal amplification
More informationAssignment 3 ELEC 312/Winter 12 R.Raut, Ph.D.
Page 1 of 3 ELEC 312: ELECTRONICS II : ASSIGNMENT3 Department of Electrical and Computer Engineering Winter 2012 1. A commonemitter amplifier that can be represented by the following equivalent circuit,
More informationEECS 105: FALL 06 FINAL
University of California College of Engineering Department of Electrical Engineering and Computer Sciences Jan M. Rabaey TuTh 23:30 Wednesday December 13, 12:303:30pm EECS 105: FALL 06 FINAL NAME Last
More information6.012 Electronic Devices and Circuits Spring 2005
6.012 Electronic Devices and Circuits Spring 2005 May 16, 2005 Final Exam (200 points) OPEN BOOK Problem NAME RECITATION TIME 1 2 3 4 5 Total General guidelines (please read carefully before starting):
More informationFYSE400 ANALOG ELECTRONICS
YSE400 ANALOG ELECTONCS LECTUE 3 Bipolar Sub Circuits 1 BPOLA SUB CCUTS Bipolar Current Sinks and Sources Transistor operates in forwardactive region. < < sat CE CN max CE < < + BN CN BN max CE N N N
More informationESE319 Introduction to Microelectronics. BJT Biasing Cont.
BJT Biasing Cont. Biasing for DC Operating Point Stability BJT Bias Using Emitter Negative Feedback Single Supply BJT Bias Scheme Constant Current BJT Bias Scheme Rule of Thumb BJT Bias Design 1 Simple
More informationUNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences
UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE 105: Microelectronic Devices and Circuits Spring 2008 MIDTERM EXAMINATION #1 Time
More informationUniversity of Toronto. Final Exam
University of Toronto Final Exam Date  Dec 16, 013 Duration:.5 hrs ECE331 Electronic Circuits Lecturer  D. Johns ANSWER QUESTIONS ON THESE SHEETS USING BACKS IF NECESSARY 1. Equation sheet is on last
More informationDigital VLSI Design I
The University of Toledo Section f04ms  EES:460/560 Digital VLSI Design I: Basic Subsystems Digital VLSI Design I MIDTERM EXAMINATION Problems Points. 4. 3. 5 Total Was the exam fair? yes no The University
More informationDigital Logic Design. Midterm #2
EECS: igital Logic esign r. nthony. Johnson s7m2s_dild7.fm  igital Logic esign Midterm #2 Problems Points. 5 2. 4 3. 6 Total 5 Was the exam fair? yes no EECS: igital Logic esign r. nthony. Johnson s7m2s_dild7.fm
More informationand V DS V GS V T (the saturation region) I DS = k 2 (V GS V T )2 (1+ V DS )
ECE 4420 Spring 2005 Page 1 FINAL EXAMINATION NAME SCORE /100 Problem 1O 2 3 4 5 6 7 Sum Points INSTRUCTIONS: This exam is closed book. You are permitted four sheets of notes (three of which are your sheets
More informationfigure shows a pnp transistor biased to operate in the active mode
Lecture 10b EE215 Electronic Devices and Circuits Asst Prof Muhammad Anis Chaudhary BJT: Device Structure and Physical Operation The pnp Transistor figure shows a pnp transistor biased to operate in the
More information6.012 Electronic Devices and Circuits
Page 1 of 10 YOUR NAME Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology 6.012 Electronic Devices and Circuits Exam No. 2 Thursday, November 5, 2009 7:30 to
More information55:041 Electronic Circuits The University of Iowa Fall Exam 2
Exam 2 Name: Score /60 Question 1 One point unless indicated otherwise. 1. An engineer measures the (step response) rise time of an amplifier as t r = 0.35 μs. Estimate the 3 db bandwidth of the amplifier.
More informationECE 6412, Spring Final Exam Page 1 FINAL EXAMINATION NAME SCORE /120
ECE 6412, Spring 2002 Final Exam Page 1 FINAL EXAMINATION NAME SCORE /120 Problem 1O 2O 3 4 5 6 7 8 Score INSTRUCTIONS: This exam is closed book with four sheets of notes permitted. The exam consists of
More informationThe equivalent model of a certain op amp is shown in the figure given below, where R 1 = 2.8 MΩ, R 2 = 39 Ω, and A =
The equivalent model of a certain op amp is shown in the figure given below, where R 1 = 2.8 MΩ, R 2 = 39 Ω, and A = 10 10 4. Section Break Difficulty: Easy Learning Objective: Understand how real operational
More informationor Op Amps for short
or Op Amps for short Objective of Lecture Describe how an ideal operational amplifier (op amp) behaves. Define voltage gain, current gain, transresistance gain, and transconductance gain. Explain the operation
More informationAt point G V = = = = = = RB B B. IN RB f
Common Emitter At point G CE RC 0. 4 12 0. 4 116. I C RC 116. R 1k C 116. ma I IC 116. ma β 100 F 116µ A I R ( 116µ A)( 20kΩ) 2. 3 R + 2. 3 + 0. 7 30. IN R f Gain in Constant Current Region I I I C F
More informationElectronics I. Midterm 2
The University of Toledo Section s5m2s_elct7.fm  S:3400 lectronics I r. nthony. Johnson lectronics I Midterm 2 Problems Points. 4 2. 5 3. 6 Total 5 Was the exam fair? yes no The University of Toledo s5m2s_elct7.fm
More informationKOM2751 Analog Electronics :: Dr. Muharrem Mercimek :: YTU  Control and Automation Dept. 1 4 DC BIASING BJTS (CONT D II )
KOM2751 Analog Electronics :: Dr. Muharrem Mercimek :: YTU  Control and Automation Dept. 1 4 DC BIASING BJTS (CONT D II ) Most of the content is from the textbook: Electronic devices and circuit theory,
More informationMicroelectronic Circuit Design 4th Edition Errata  Updated 4/4/14
Chapter Text # Inside back cover: Triode region equation should not be squared! i D = K n v GS "V TN " v & DS % ( v DS $ 2 ' Page 49, first exercise, second answer: 1.35 x 10 6 cm/s Page 58, last exercise,
More informationThe CommonEmitter Amplifier
c Copyright 2009. W. Marshall Leach, Jr., Professor, Georgia Institute of Technology, School of Electrical and Computer Engineering. The CommonEmitter Amplifier Basic Circuit Fig. shows the circuit diagram
More informationLecture 24 Multistage Amplifiers (I) MULTISTAGE AMPLIFIER
Lecture 24 Multistage Amplifiers (I) MULTISTAGE AMPLIFIER Outline. Introduction 2. CMOS multistage voltage amplifier 3. BiCMOS multistage voltage amplifier 4. BiCMOS current buffer 5. Coupling amplifier
More informationECE343 Test 2: Mar 21, :008:00, Closed Book. Name : SOLUTION
ECE343 Test 2: Mar 21, 2012 6:008:00, Closed Book Name : SOLUTION 1. (25 pts) (a) Draw a circuit diagram for a differential amplifier designed under the following constraints: Use only BJTs. (You may
More informationEE 330 Lecture 25. Amplifier Biasing (precursor) TwoPort Amplifier Model
EE 330 Lecture 25 Amplifier Biasing (precursor) TwoPort Amplifier Model Review from Last Lecture Exam Schedule Exam 2 Friday March 24 Review from Last Lecture Graphical Analysis and Interpretation 2 OX
More informationElectronic Circuits Summary
Electronic Circuits Summary Andreas Biri, DITET 6.06.4 Constants (@300K) ε 0 = 8.854 0 F m m 0 = 9. 0 3 kg k =.38 0 3 J K = 8.67 0 5 ev/k kt q = 0.059 V, q kt = 38.6, kt = 5.9 mev V Small Signal Equivalent
More informationEE 230 Lecture 31. THE MOS TRANSISTOR Model Simplifcations THE Bipolar Junction TRANSISTOR
EE 23 Lecture 3 THE MOS TRANSISTOR Model Simplifcations THE Bipolar Junction TRANSISTOR Quiz 3 Determine I X. Assume W=u, L=2u, V T =V, uc OX =  4 A/V 2, λ= And the number is? 3 8 5 2? 6 4 9 7 Quiz 3
More informationBJT Biasing Cont. & Small Signal Model
BJT Biasing Cont. & Small Signal Model Conservative Bias Design Bias Design Example Small Signal BJT Models Small Signal Analysis 1 Emitter Feedback Bias Design Voltage bias circuit Single power supply
More informationCHAPTER.4: Transistor at low frequencies
CHAPTER.4: Transistor at low frequencies Introduction Amplification in the AC domain BJT transistor modeling The re Transistor Model The Hybrid equivalent Model Introduction There are three models commonly
More informationECE 3050A, Spring 2004 Page 1. FINAL EXAMINATION  SOLUTIONS (Average score = 78/100) R 2 = R 1 =
ECE 3050A, Spring 2004 Page Problem (20 points This problem must be attempted) The simplified schematic of a feedback amplifier is shown. Assume that all transistors are matched and g m ma/v and r ds.
More informationCE/CS Amplifier Response at High Frequencies
.. CE/CS Amplifier Response at High Frequencies INEL 4202  Manuel Toledo August 20, 2012 INEL 4202  Manuel Toledo CE/CS High Frequency Analysis 1/ 24 Outline.1 High Frequency Models.2 Simplified Method.3
More informationECE 342 Electronic Circuits. 3. MOS Transistors
ECE 342 Electronic Circuits 3. MOS Transistors Jose E. SchuttAine Electrical & Computer Engineering University of Illinois jschutt@emlab.uiuc.edu 1 NMOS Transistor Typically L = 0.1 to 3 m, W = 0.2 to
More informationCARLETON UNIVERSITY. FINAL EXAMINATION December DURATION 3 HOURS No. of Students 130
ALETON UNIVESITY FINAL EXAMINATION December 005 DUATION 3 HOUS No. of Students 130 Department Name & ourse Number: Electronics ELE 3509 ourse Instructor(s): Prof. John W. M. ogers and alvin Plett AUTHOIZED
More informationUniversity of Pittsburgh
University of Pittsburgh Experiment #8 Lab Report The Bipolar Junction Transistor: Characteristics and Models Submission Date: 11/6/2017 Instructors: Dr. Minhee Yun John Erickson Yanhao Du Submitted By:
More informationElectric Circuits I Final Examination
EECS:300 Electric Circuits I ffs_elci.fm  Electric Circuits I Final Examination Problems Points. 4. 3. Total 38 Was the exam fair? yes no //3 EECS:300 Electric Circuits I ffs_elci.fm  Problem 4 points
More informationECE 523/421  Analog Electronics University of New Mexico Solutions Homework 3
ECE 523/42  Analog Electronics University of New Mexico Solutions Homework 3 Problem 7.90 Show that when ro is taken into account, the voltage gain of the source follower becomes G v v o v sig R L r o
More informationElectronic Circuits 1. Transistor Devices. Contents BJT and FET Characteristics Operations. Prof. C.K. Tse: Transistor devices
Electronic Circuits 1 Transistor Devices Contents BJT and FET Characteristics Operations 1 What is a transistor? Threeterminal device whose voltagecurrent relationship is controlled by a third voltage
More informationGEORGIA INSTITUTE OF TECHNOLOGY School of Electrical and Computer Engineering
NAME: GEORGIA INSTITUTE OF TECHNOLOGY School of Electrical and Computer Engineering ECE 4430 Third Exam Closed Book and Notes Fall 2002 November 27, 2002 General Instructions: 1. Write on one side of the
More informationECE342 Test 3: Nov 30, :008:00, Closed Book. Name : Solution
ECE342 Test 3: Nov 30, 2010 6:008:00, Closed Book Name : Solution All solutions must provide units as appropriate. Unless otherwise stated, assume T = 300 K. 1. (25 pts) Consider the amplifier shown
More informationMidterm Exam (closed book/notes) Tuesday, February 23, 2010
University of California, Berkeley Spring 2010 EE 42/100 Prof. A. Niknejad Midterm Exam (closed book/notes) Tuesday, February 23, 2010 Guidelines: Closed book. You may use a calculator. Do not unstaple
More informationElectronic Circuits. Transistor Bias Circuits. Manar Mohaisen Office: F208 Department of EECE
lectronic ircuits Transistor Bias ircuits Manar Mohaisen Office: F208 mail: manar.subhi@kut.ac.kr Department of Review of the Precedent Lecture Bipolar Junction Transistor (BJT) BJT haracteristics and
More informationECE2262 Electric Circuits. Chapter 4: Operational Amplifier (OPAMP) Circuits
ECE2262 Electric Circuits Chapter 4: Operational Amplifier (OPAMP) Circuits 1 4.1 Operational Amplifiers 2 4. Voltages and currents in electrical circuits may represent signals and circuits can perform
More informationMICROELECTRONIC CIRCUIT DESIGN Second Edition
MICROELECTRONIC CIRCUIT DESIGN Second Edition Richard C. Jaeger and Travis N. Blalock Answers to Selected Problems Updated 10/23/06 Chapter 1 1.3 1.52 years, 5.06 years 1.5 2.00 years, 6.65 years 1.8 113
More informationElectric Circuits I. Midterm #1
The University of Toledo Section number s5ms_elci7.fm  Electric Circuits I Midterm # Problems Points. 3 2. 7 3. 5 Total 5 Was the exam fair? yes no The University of Toledo Section number s5ms_elci7.fm
More informationName: Answers. Grade: Q1 Q2 Q3 Q4 Q5 Total. ESE370 Fall 2015
University of Pennsylvania Department of Electrical and System Engineering CircuitLevel Modeling, Design, and Optimization for Digital Systems ESE370, Fall 2015 Midterm 1 Monday, September 28 5 problems
More informationLecture 7: Transistors and Amplifiers
Lecture 7: Transistors and Amplifiers Hybrid Transistor Model for small AC : The previous model for a transistor used one parameter (β, the current gain) to describe the transistor. doesn't explain many
More information3. Basic building blocks. Analog Design for CMOS VLSI Systems Franco Maloberti
Inverter with active load It is the simplest gain stage. The dc gain is given by the slope of the transfer characteristics. Small signal analysis C = C gs + C gs,ov C 2 = C gd + C gd,ov + C 3 = C db +
More informationECE 342 Electronic Circuits. Lecture 6 MOS Transistors
ECE 342 Electronic Circuits Lecture 6 MOS Transistors Jose E. SchuttAine Electrical & Computer Engineering University of Illinois jesa@illinois.edu 1 NMOS Transistor Typically L = 0.1 to 3 m, W = 0.2
More informationECE 6412, Spring Final Exam Page 1
ECE 64, Spring 005 Final Exam Page FINAL EXAMINATION SOLUTIONS (Average score = 89/00) Problem (0 points This problem is required) A comparator consists of an amplifier cascaded with a latch as shown below.
More informationEECS 312: Digital Integrated Circuits Midterm Exam 2 December 2010
Signature: EECS 312: Digital Integrated Circuits Midterm Exam 2 December 2010 obert Dick Show your work. Derivations are required for credit; end results are insufficient. Closed book. No electronic mental
More informationKOM2751 Analog Electronics :: Dr. Muharrem Mercimek :: YTU  Control and Automation Dept. 1 7 DC BIASING FETS (CONT D)
KOM751 Analog Electronics :: Dr. Muharrem Mercimek :: YTU Control and Automation Dept. 1 7 DC BIASING FETS (CONT D) Most of the content is from the textbook: Electronic devices and circuit theory, Robert
More informationFinal Examination EE 130 December 16, 1997 Time allotted: 180 minutes
Final Examination EE 130 December 16, 1997 Time allotted: 180 minutes Problem 1: Semiconductor Fundamentals [30 points] A uniformly doped silicon sample of length 100µm and crosssectional area 100µm 2
More informationLecture 37: Frequency response. Context
EECS 05 Spring 004, Lecture 37 Lecture 37: Frequency response Prof J. S. Smith EECS 05 Spring 004, Lecture 37 Context We will figure out more of the design parameters for the amplifier we looked at in
More informationElectric Circuits I FINAL EXAMINATION
EECS:300, Electric Circuits I s6fs_elci7.fm  Electric Circuits I FINAL EXAMINATION Problems Points.. 3. 0 Total 34 Was the exam fair? yes no 5//6 EECS:300, Electric Circuits I s6fs_elci7.fm  Problem
More informationChapter 5. BJT AC Analysis
Chapter 5. Outline: The r e transistor model CB, CE & CC AC analysis through r e model commonemitter fixedbias voltagedivider bias emitterbias & emitterfollower commonbase configuration Transistor
More informationEE 230 Lecture 20. Nonlinear Op Amp Applications. The Comparator Nonlinear Analysis Methods
EE 230 Lecture 20 Nonlinear Op Amp Applications The Comparator Nonlinear Analysis Methods Quiz 14 What is the major purpose of compensation when designing an operatinal amplifier? And the number is? 1
More informationEECS 141: FALL 05 MIDTERM 1
University of California College of Engineering Department of Electrical Engineering and Computer Sciences D. Markovic TuTh 111:3 Thursday, October 6, 6:38:pm EECS 141: FALL 5 MIDTERM 1 NAME Last SOLUTION
More informationTransistor Characteristics and A simple BJT Current Mirror
Transistor Characteristics and A simple BJT Current Mirror Currentoltage (I) Characteristics Device Under Test DUT i v T T 1 R X R X T for test Independent variable on horizontal axis Could force current
More informationChapter 2  DC Biasing  BJTs
Objectives Chapter 2  DC Biasing  BJTs To Understand: Concept of Operating point and stability Analyzing Various biasing circuits and their comparison with respect to stability BJT A Review Invented
More information6.012 Electronic Devices and Circuits
Page 1 of 12 YOUR NAME Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology 6.012 Electronic Devices and Circuits FINAL EXAMINATION Open book. Notes: 1. Unless
More informationElectronic Circuits. Bipolar Junction Transistors. Manar Mohaisen Office: F208 Department of EECE
Electronic Circuits Bipolar Junction Transistors Manar Mohaisen Office: F208 Email: manar.subhi@kut.ac.kr Department of EECE Review of Precedent Class Explain the Operation of the Zener Diode Explain Applications
More informationEE 330 Lecture 33. Cascaded Amplifiers HighGain Amplifiers Current Source Biasing
EE 330 Lecture 33 Cascaded Amplifiers HighGain Amplifiers Current Source Biasing Review from Last Time Can use these equations only when small signal circuit is EXACTLY like that shown!! Review from Last
More informationEECS 312: Digital Integrated Circuits Midterm Exam 2 December 2010
Signature: EECS 312: Digital Integrated Circuits Midterm Exam 2 December 2010 Robert Dick Show your work. Derivations are required for credit; end results are insufficient. Closed book. No electronic mental
More informationFig. 1 Simple BJT (NPN) current mirror and its test circuit
1 Lab 01: Current Mirrors Total 30 points: 20 points for lab, 5 points for wellorganized report, 5 points for immaculate circuit on breadboard Note: There are two parts for this lab. You must answer the
More informationESE319 Introduction to Microelectronics. Output Stages
Output Stages Power amplifier classification Class A amplifier circuits Class A Power conversion efficiency Class B amplifier circuits Class B Power conversion efficiency Class AB amplifier circuits Class
More informationEE 330 Lecture 22. Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits
EE 330 Lecture 22 Small Signal Modelling Operating Points for Amplifier Applications Amplification with Transistor Circuits Exam 2 Friday March 9 Exam 3 Friday April 13 Review Session for Exam 2: 6:00
More informationChapter 4 FieldEffect Transistors
Chapter 4 FieldEffect Transistors Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 5/5/11 Chap 41 Chapter Goals Describe operation of MOSFETs. Define FET characteristics in operation
More informationLecture 050 Followers (1/11/04) Page ECE Analog Integrated Circuits and Systems II P.E. Allen
Lecture 5 Followers (1/11/4) Page 51 LECTURE 5 FOLLOWERS (READING: GHLM 344362, AH 221226) Objective The objective of this presentation is: Show how to design stages that 1.) Provide sufficient output
More informationSolid State Electronics. Final Examination
The University of Toledo EECS:4400/5400/7400 Solid State Electronic Section elssf08fs.fm  1 Solid State Electronics Final Examination Problems Points 1. 1. 14 3. 14 Total 40 Was the exam fair? yes no
More informationVI. Transistor amplifiers: Biasing and Small Signal Model
VI. Transistor amplifiers: iasing and Small Signal Model 6.1 Introduction Transistor amplifiers utilizing JT or FET are similar in design and analysis. Accordingly we will discuss JT amplifiers thoroughly.
More informationTutorial #4: Bias Point Analysis in Multisim
SCHOOL OF ENGINEERING AND APPLIED SCIENCE DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING ECE 2115: ENGINEERING ELECTRONICS LABORATORY Tutorial #4: Bias Point Analysis in Multisim INTRODUCTION When BJTs
More informationEE 230 Lecture 33. Nonlinear Circuits and Nonlinear Devices. Diode BJT MOSFET
EE 230 Lecture 33 Nonlinear Circuits and Nonlinear Devices Diode BJT MOSFET Review from Last Time: nchannel MOSFET Source Gate L Drain W L EFF Poly Gate oxide nactive psub depletion region (electrically
More informationSection 1: Common Emitter CE Amplifier Design
ECE 3274 BJT amplifier design CE, CE with Ref, and CC. Richard Cooper Section 1: CE amp Re completely bypassed (open Loop) Section 2: CE amp Re partially bypassed (gain controlled). Section 3: CC amp (open
More informationVidyalankar S.E. Sem. III [EXTC] Analog Electronics  I Prelim Question Paper Solution
. (a) S.E. Sem. [EXTC] Analog Electronics  Prelim Question Paper Solution Comparison between BJT and JFET BJT JFET ) BJT is a bipolar device, both majority JFET is an unipolar device, electron and minority
More informationFigure 1 Basic epitaxial planar structure of NPN. Figure 2 The 3 regions of NPN (left) and PNP (right) type of transistors
Figure 1 Basic epitaxial planar structure of NPN Figure 2 The 3 regions of NPN (left) and PNP (right) type of transistors Lecture Notes: 2304154 Physics and Electronics Lecture 6 (2 nd Half), Year: 2007
More informationRIB. ELECTRICAL ENGINEERING Analog Electronics. 8 Electrical Engineering RIBR T7. Detailed Explanations. Rank Improvement Batch ANSWERS.
8 Electrical Engineering RIBR T7 Session 089 S.No. : 9078_LS RIB Rank Improvement Batch ELECTRICL ENGINEERING nalog Electronics NSWERS. (d) 7. (a) 3. (c) 9. (a) 5. (d). (d) 8. (c) 4. (c) 0. (c) 6. (b)
More informationChapter7. FET Biasing
Chapter7. J configurations Fixed biasing Self biasing & Common Gate Voltage divider MOS configurations Depletiontype Enhancementtype JFET: Fixed Biasing Example 7.1: As shown in the figure, it is the
More informationUNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences
UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences E. Alon Final EECS 240 Monday, May 19, 2008 SPRING 2008 You should write your results on the exam
More informationClass AB Output Stage
Class AB Output Stage Class AB amplifier Operation Multisim Simulation  VTC Class AB amplifier biasing Widlar current source Multisim Simulation  Biasing 1 Class AB Operation v I V B (set by V B ) Basic
More information