EEE Lecture 1 -1-
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1 EEE Lecture 1-1-
2 1. PC -> Address Move content of the Program Counter to Address Bus 2. Mem(Add) -> ID Move the Data at Location Add from main memory to Instruction Decoder (ID) 3. Acc s -> ALU Move data from registers Acc A and Acc B to the Input of ALU 4. Select ALU function 5. ALU -> Acc A Store the output of ALU to Acc A -2-
3 EEE Lecture 2 EEE3410 Microcontroller Applications d n d n-1 d 2 d 1 d 0 2 n 2 n
4 Classwork 1 Convert the following binary numbers into decimal: (a) (2) ; (b) (2) Solution (a) (2) = 1 x x x x x x x 2 0 = 76 (10) (b) (2) = 1 x x x x x x x 2 0 = 107 (10) Classwork 2 Convert the following octal numbers to decimal equivalent: (a) (8) ; (b) (8) Solution (a) (8) = 7 x x x x x 8 0 = (10) (b) (8) = 6 x x x x x x 8 0 = (10) Classwork 3 A=10, B = 11, C = 12, D = 13, E = 14, F = 15 Convert the following hexadecimal numbers to decimal: (a) ABCD (16) ; (b) F4240 (16) Solution (a) ABCD (16) = 10 x x x x 16 0 = (10) (b) F4240 (16) = 15 x x x x x 16 0 = (10) -4-
5 12345 (10) = 1x x x x x (10) / 10 = 1x x x x / 10 Divided by 10 Quotient Remainder Divided by Example 1 (With the Aids of Calculator) 1234 (10) Hex 1234 / 16 Quotient, Remainder? Using Calculator 1234 / 16 = Quotient = 77, Remainder = x 16 = = 77 x / 16 = Quotient = 4, Remainder = x16=13= D 1234 (10) = 4D2 (16) = 4 x x x
6 N (R) = d n R n + d n-1 R n d 2 R 2 + d 1 R 1 + d 0 R 0 Step 1 N (R) / R ={ d n R n + d n-1 R n d 2 R 2 + d 1 R 1 + d 0 R 0 } /R N (R) / R = d n R n-1 + d n-1 R n d 2 R 1 + d 1 R 0 + d 0 /R Since d n, d n-1,.., d 2, d 1, d 0 are all less than R 1 d 0 is the REMAINDER of the operation in Step 1 Step 2 - Repeat the step again { d n R n-1 + d n-1 R n d 2 R 1 + d 1 R 0 }/ R d n R n-2 + d n-1 R n d 2 R 0 + d 1 /R d 1 is the REMAINDER of the operation in Step 2 Classwork 4 Convert the following decimal numbers to binary: (a) 100 (10) ; (b) 1357 (10) Solution 2 )100 2 ) ) ) ) ) (10) = (2) 2 ) ) ) ) ) ) ) ) ) ) (10) = (2) Convert 100 (10) to Hex first Step Q Remainder Symbol 100 / / (10) = 64 (16) (10) = 64 (16) = (2) -6-
7 Step Q Remainder Symbol 100 / / / / / / / (b) 1357 (10) = 54D (16) =? Classwork 5 (a) Convert (10) to octal 8 ) ) ) ) ) (10) = (8) 8 ) ) ) ) ) ) Since 3 < 8 last row (10) = (8) Step Q Remainder Symbol / / / / / / (10) = (8) Classwork 6 Convert the following decimal numbers to hexadecimal: (a) (10) ; (b) (10) -7-
8 Solution (A=10, B=11, C=12, D=13, E=14, F=15) 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F 16 )63440 No. Lab 16 ) No. Lab 16 ) ) F 16 ) D 16 ) ) (F) (10) = F7D0 (16) (F) (10) = F423F (16) (a) Step Ans. Q Remainder Symbol / / x16=13 D 247 / x16= / F (10) = F7D0 (16) (a) Step Ans. Q Remainder Symbol / F 62499/ / / / F (10) = F423F (16) -8-
9 Classwork 8 - Convert the following binary numbers to octal: (a) (2) ; (b) (2) Solution (a) (2) ; (8) (b) (2) (8) Classwork 9 - Convert the following octal numbers to binary: (a) 7654 (8) ; (b) (8) Solution (a) (8) (2) (b) (8) (2) Classwork 10 - Convert the following binary numbers to hexadecimal: (a) (2) ; (b) (2) (a) Solution (2) A B 0 (16) (b) (2) 6 E C 5 (16) Classwork 11 - Convert the following hexadecimal numbers to binary: (a) CDEF (16) ; (b) (16) Soln. (a) C D E F (16) (2) (b) (16) (2) -9-
10 Decimal 0 : Decimal 255 Binary Arithmetic (Lecture 3) 1 2 x x 34 = 12 x (30 + 4) = 12 x x 4 = =408 Decimal System 100 x 10 = (Add ten times)=1000 Binary System 0100 x 010 = (Add two times)= x 110 = 0100 x ( ) = 0100 x x 010 = = x Multiplier: Use Adder and Shift Register -10-
11 Example 1 Perform the following calculation with binary arithmetic. (a) (2) (2) (b) (2) (2) (c) (2) x (2) (a) 0+0=0 0+1=1 1+0=1 1+1=0 carry= = (b)0-0=0 0-1=1 borrow=1 1-0=1 1-1= = (c) x =
12 Classwork 1 (a) 34 (10) + 75 (10) (b) 23 (16) + 53 (10) (b) 112 (10) 49 (10) (c )71 (16) 71 (10) (d)28 (10) x 6 (10) (a) 34 (10) + 75 (10) = (2) (2) = (b) 23 (16) + 53 (10) = (2) (2) = (c) 112 (10) 49 (10) = (2) (2) = (d) 71 (16) 71 (10) = (2) (2) = (e) 28 (10) x 6 (10) = (2) x110 (2) x
13 2 7 =128 Signed bit representation : : patterns 128 patterns 1 s complement representation Sign Magnitude : : patterns 128 patterns -13-
14 2 s complement representation Sign Magnitude : : : : s complement = s complement = = Invert all bits find the magnitude = (dec) = (2) 1 s complement -1 = s complement -1 = 1 s complement+1= (-126)= = Signed Magnitude: s Complement: s Complement: bit Number Representation Unsigned No Signed Magnitude No s complement s complement
15 Classwork 2 Determine the value of the following 6-bit Signed Magnitude numbers: (a) ; (b) (a) Sign bit 0 Positive Magnitude = (bin) = 21 (dec) +21 (dec) (b) Sign bit 1 Negative Magnitude = (bin) = 10 (dec) -10 (dec) Classwork 3 Convert the following numbers into 8-bit Signed Magnitude form: (a) 48; (b) 100 (a) +48, Sign bit = 0, Magnitude = 48(dec)= (bin) (7 bits for magnitude) (b) -100, Sign bit = 1 Magnitude = 100 (dec)= (7 bit for magnitude) Signed Magnitude No. Signed Magnitude No. Binary Addition Invalid Signed Magnitude No. -15-
16 Classwork 4 Represent the following numbers with 8-bit 1 s complement form: (a) 78 ; (b) (dec) = (dec) = (dec) = (dec) = (1) Convert the magnitude into normal binary form (2) If the no. is positive, no change is needed! (3) If the no. is negative, invert all bits! Classwork 5 What is the value of the following binary numbers if they are 8-bit 1 s complement form: (a) ; (b) (a) = +42(dec) (b) Negative No., invert all bits (0 1, 1 0) Magnitude = =44 No. = -44 Let X be a 8 bits Positive binary No. X + (1 s Complement of X) = = 255 = X + (-X in 1 s complement)=255=
17 Classwork 6 Represent the following numbers with 8-bit 2 s complement form: (a) 78 ; (b) 100 (a) 78 : Positive No (b) -100 : Negative No. bit 7 = 1 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 D7 D6 D5 D4 D3 D2 D1 D0 Magnitude = 100(dec)= (bin), +100 = (Invert all bits) 1 s complement = s complement = 1 s complement + 1 = Classwork 7 What is the value of the following binary numbers if they are in 8- bit 2 s complement form: (a) ; (b) (a) = +42 (b) = 2 s complement = 1 s complement s complement = = Invert all bits Magnitude is =45 No. is
18 Classwork 8 Perform the following binary arithmetic using 2 s complement calculation (10) 69 (10) (10) 109 (10) (10) + 67 (10) (10) 67 (10) Classwork 8 Solution 1 s Complement 2 s complement 109 (10) = (10) = = (10) = (10) = = (1) = 40 (10) = = (2) = -40 (10) Result in 2 s complement form = Result in 1 s complement= = Invert all bits of 1 s complement result Magnitude = = 40 2 s complement = = (3) Since 79+67=146 > 127 and (4) = -146 < -128, this method cannot be used. Example 9 2 s complement = s complement = = Invert all bits, magnitude = = 27 No = s complement =
19 1 s complement = = Invert all bits, magnitude = =113, No. =
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23 PUSH 6 ;SP=SP+1, [SP] = [6] ;Move data from location 6 to location pointed by SP, top of stack MOV R6, #25H ;R6=25H MOV R1, #12H ;R1=12H MOV R4, #0F3H ;R4=F3H PUSH 6 ;SP=SP+1, Push data from location 6 to location pointed by SP PUSH 1 ;SP=SP+1, Push data from location 1 to location pointed by SP PUSH 4 ;SP=SP+1, Push data from location 4 to location pointed by SP POP 3 ;POP data from location pointed by SP into location 3, SP=SP-1 POP 5 ;POP data from location pointed by SP into location 5, SP=SP-1 POP 2 ;POP data from location pointed by SP into location 2, SP=SP-1 MOV A, #55H ;A = 55H= b BACK: MOV P0, A ;Move A to Port 0 ACALL DELAY ;Call Delay routine (sub-program) CPL A ;Complement A, b b ;Complement 55H AAH ;Complement AAH 55H SJMP BACK ;Jump to label BACK Port 0, bit 0-23-
24 MOV A, #0FFH ;Write 1 to Port 0 ;F F H = b MOV P0, A ;Set Port 0 as input BACK: MOV A, P0 ;Read Port 0, move data to A MOV P1, A ;Move data from A to Port 1 SJMP BACK ;Jump to label BACK MOV A, #0FFH ;Set Port 1 MOV P1, A ;as input MOV A, P1 ;Read P1, A = P1 MOV R7, A ;R7 = A = P1 ACALL DELAY ;Call Delay MOV A, P1 ;A=P1 MOV R6, A ;R6 = A = P1 ACALL DELAY ;Call Delay MOV A, P1 ;A = P1 MOV R5, A ;R5 = A = P1 MOV A, #55H ;A= BACK: MOV P1, A ;P1 = A ACALL DELAY ;Delay CPL A ;Complement A SJMP BACK ;Jump Back MOV A, #0FFH ;Set Port 2 MOV P2, A ;as Input Port BACK: MOV A, P2 ;Read Port 2, A=P2 MOV P1, A ;Move P2 data to P1, P1=A SJMP BACK ;Jump Back Port Main Other Functions Port 0 I/O Address or Data (External) Port 1 I/O NIL Port 2 I/O Address (External) Port 3 I/O Special Functions RxD Receive (Com port) TxD Transmit (Com port) INT0 Interrupt 0 INT1 Interrupt 1 T0 Timer 0 T1 Timer 1 WR Write (external memory) RD Read (external memory) Exclusive OR OR -24-
25 X Y XOR X Y OR MOV P1, #55H ;P1 = AGAIN: XRL P1, #0FFH ;XRL : exclusive OR ; XOR Result = ; XOR Result = ACALL DELAY SJMP AGAIN BACK: CPL P1.2 ;Complement Port 1 Bit 2 ACALL DELAY SJMP BACK SETB P1.2 ;Set Port 1 Bit 2 to 1 MOV A, #45H ;A = 45H AGAIN: JNB P1.2, AGAIN ;JNB Jump, if bit equal to 0 ;If Bit 2 of Port 1 is 0 (NOT BIT), jump back to again ;Wait if Bit 2 of Port 1 is 0 MOV P0,A ;If P1.2 is 1, P0 = A=45H SETB P2.3 ;Set bit 3 of port 2 CLR P2.3 ;Clear bit 3 of Port 2-25-
26 MOV 81h, #30h ; Copy the immediate data 30h to SP -26-
27 MOV R0, #0ACh ; Copy the immediate data ACh to R0 ; (i.e. 00h) PUSH 00h ; SP=31h, address 31h contains the ; number Ach ;SP = SP + 1, [00] [SP], ;push data at location 00 to stack location pointed by SP PUSH 00h ; SP=32h, address 32h contains the ; number ACh POP 01h ; SP=31h, address R1 (i.e. 01h) ; contains the number ACh ;POP data from stack location pointed by SP to ;memory location 01, then SP=SP-1 POP 80h ; SP=30h, port 0 latch (i.e. 80h) ; contains the number Ach ;POP data from stack location pointed by SP to ;memory location 80, then SP=SP-1 ADDITION SUBTRACTION
28 R7 7D 40h EB 41h + C5 42h A MOV A, 40h ; set A = RAM location 40h MOV R7, #0 ; set R7 = 0, set high byte of sum=0 ADD A, 41h ; add A with RAM location 41h ;A=A+[41h] JNC NEXT ; if CY = 0 don t accumulate carry ;Jump to NEXT if NO CARRY INC R7 ; keep track of carry, R7=R7+1, Increment NEXT: ADD A, 42h ; add A with RAM location 42h ;A=A+[42h] JNC NEXT1 ; if CY = 0 don t accumulate carry INC R7 ; keep track of carry NEXT1: END 3C E7 + 3B ADDC + 8D ADD High Byte R7 Low Byte R6 CLR C ; make C=0, Clear CARRY MOV A, #0E7h ; load the low byte now A=E7h ;0E7 = Hex No. (not variable / label name) ADD A, #8Dh ; add the low byte now A=74h and C=1, A=A+ constant 8Dh MOV R6, A ; save the low byte of the sum in R6 MOV A, #3Ch ; load the high byte ADDC A, #3Bh ; add with the carry ; 3B + 3C + 1 = 78 (all in hex) MOV R7, A ; save the high byte of the sum -28-
29 A B A XOR B If you perform the following operation: A XOR #FF, if bit = 0 1, bit = 1 0 A7 A6 A5 A4 A3 A2 A1 A
30 Lecture 5 MOV A, #47h ; A=47h first BCD operand MOV B, #25h ; B=25h second BCD operand Decimal Addition 47 decimal + 25 decimal = 72 ADD A, B ; hex (binary) addition (A=6Ch) Binary Addition: 47h + 25h=6Ch Convert 6Ch to corresponding BCD DA A ; adjust for BCD addition (A=72h) BCD data 1+BCD data 2 => Binary Addition =>Result IS NOT in BCD form, Convert the result into BCD (Decimal Adjust) Remarks: 6Ch, C = 12 is not a BCD digit C / 10 decimal (1) => Remainder -> Lower Nipple -> Upper Nipple 6 + Quotient from (1) If we interpret 72h as a binary number then 72h 6Ch = 6 => Add 6 after binary addition -30-
31 Lecture 6 3C E7 + 3B 8D Y X DA A The action is to decimal adjust the register A Used after the addition of two BCD numbers Example 6.4 : MOV A, #47h ; A=47h first BCD operand MOV B, #25h ; B=25h second BCD operand ADD A, B ; hex (binary) addition (A=6Ch) DA A ;adjust for BCD addition (A=72h) X(BCD) + Y(BCD) BCD Result! (but a Binary result) (Binary Addition) If we ADD 6 to the above result, the final result will be a correct BCD number MUL AB Uses registers A and B as both source and destination registers Numbers in A and B are multiplied, then put the lower-order byte of the product in A and the high-order byte in B The OV flag is set to 1 if the product > FFh Note that the C flag is 0 at all times -31-
32 A7 A6 A5 A4 A3 A2 A1 A0 X B7 B6 B5 B4 B3 B2 B1 B0 (8 bits number) x (8 bits number) = result (with 16 bits) A x B = Result B A High byte Low byte DIV AB The number in A is divided by B. The quotient is put in A and the remainder (if any) is put in B A B = Quotient & Remainder A B Format Addressing mode # Constant Immediate Register Name Register R?, A, B Hexadecimal Direct No. without only Register Address in and + A+DPTR=Address Jump Relative Instruction ACALL, Absolute AJUMP LCALL Long LJUMP -32-
33 Lecture 7 ORG 800H DELAY: MOV R1, #200 1 { 1+ LOOP: MOV R2,#255 1 [ 1+ HERE: DJNZ R2, HERE 2 (2)x255+ DJNZ R1, LOOP 2 2 ]x200+ RET 2 2 } END {1+[1+(2x255)+2]x200+2} Cycle Calculation DELAY: MOV R2, #200 1 {1+ HERE1: MOV R3,#250 1 [ 1 + HERE2: DJNZ R3, HERE2 2 (2)x250 + DJNZ R2, HERE1 2 2 ]x200+ RET 2 2} END = [1 + (2) x ] x = RL A
34 VAR1 EQU 1 VAR2 EQU 2 MOV R1,#6 MOV R2,#8 MOV A,VAR1 ; get VAR1 to A IFTEST: CJNE A, #5, NOT_EQ1 ; if VAR1 = 5 skip the THEN part SJMP ELSE1 ; and do ELSE part NOT_EQ1: JC ELSE1 ; if VAR1 < 5 do ELSE part too MOV A,VAR2 ; now the && part of conditional, CJNE A, #10, NOT_EQ2 ; i.e. checking VAR2 JMP ELSE1 ; if equal do ELSE part NOT_EQ2: JNC ELSE1 ; if VAR2 > 10 do ELSE part THEN: INC R7 ; finally, if (VAR1 > 0) && (VAR2 < 10) SJMP CONTINUE ELSE1: DEC R7 ; perform ELSE part i.e. SUM = SUM V 1 CONTINUE: SJMP CONTINUE END MAX EQU 1 NEW EQU 2 MOV R1,#20 MOV R2,#30 MOV A, NEW ; get NEW IFTEST: CJNE A, MAX, NOT_EQ ; condition testing SJMP CONTINUE ;If EQUAL EXIT NOT_EQ: JC CONTINUE ; jump if NEW < MAX THEN: MOV MAX, A ; do then part since NEW > MAX CONTINUE: SJMP CONTINUE ;; the rest of the program END SUM EQU 0 COUNT EQU 1 ORG 0H MOV SUM,#0 ; initialize SUM MOV A,SUM ; use A as the temporary storage ; for SUM MOV COUNT,#10 ; initialize COUNT FOR_LP: ADD A, COUNT ;A=A+Count DJNZ COUNT,FOR_LP ;COUNT=COUNT-1 END_FOR: SJMP CONTINUE CONTINUE: SJMP CONTINUE ;; the rest of the program END -34-
35 Lecture 8 1. Timer Counter Counter Value increment at each cycle 0000H FFFFH (16 bits), TH, TL 2. Timer Control Timer ON/OFF, TCON 3. Timer Mode Mode settings of timer, TMOD GATE=ON, Timer 0 Enable when TR0=High AND INT0=High GATE=OFF, Timer 0 Enable when TR0=High GATE Use External INT0 signal as ON/OFF control? C/T Timer or Counter? M1,M0 Mode Bit -35-
36 INTERRUPT AND TIMER Example 8.7 : (a) Program the IP register to assign the highest priority to INT1, (b) Discuss what happens if INT0, INT1 and TF0 are activated at the same time. (Ans: Same as the priority after RESET) Original INT0 TF0 INT1 TF1 RI+TI INT0 > TF0 > INT1 > TF1 > RI+TI After INT1 INT0 TF0 TF1 RI+TI INT1 > INT0 > TF0 > TF1 > RI+TI Example 8.8 : The IP register is set by the instruction MOV IP, # B after reset. Discuss the sequence in which the interrupts are serviced. MOV IP, # B instruction sets INT1 & TF1 to a higher priority level compared with the rest of the interrupts Original INT0 TF0 INT1 TF1 RI+TI INT0 > TF0 > INT1 > TF1 > RI+TI After INT1 TF1 INT0 TF0 RI+TI INT1 > TF1 > INT0 > TF0 > Serial -36-
37 ORG 0000H START: MOV R0, #OK DATA+1 ;R0 = No. of byte in table MOV DPTR, #DATA ;DPTR = table start address MOV R1, #00H ;R1 = Index to row of the table LOOP: MOV A, R1 MOVC ;Move [R1+DPTR] to A MOV P1, A ACALL DELAY INC R1 ;Move to next row, R1=R1+1 DJNZ R0, LOOP ;No. of bytes remain=0? AJMP START ; DELAY: MOV R5, #2 DL1: MOV R6, #250 DL2: MOV R7, #200 DL3: DJNZ R7, DL3 DJNZ R6, DL2 DJNZ R5, DL1 ; DATA: OK: END RET DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B DB B -37-
38 ORG 0000H MOV R1, # B ; LED ON/OFF Patterns MOV R2, # B MOV R3, # B MOV R4, # B TEST: ORL P3, #0FFH ; Set all bits in P3 to 1, input port JNB P3.7, CASE1 ; Jump Not bit, if P3.7 is low, jump to CASE1 JNB P3.6, CASE2 JNB P3.5, CASE3 JNB P3.4, CASE4 AJMP TEST CASE1: MOV A, R1 ;A= MOV P1, A ACALL DELAY XRL A, # B ;A= MOV P1, A AJMP TEST CASE2 MOV A, R2 ;A= MOV P1, A ACALL DELAY XRL A, # B ;A= Turn OFF led MOV P1, A AJMP TEST CASE3 MOV A, R3 ;A= MOV P1, A ACALL DELAY XRL A, # B ;A= MOV P1, A AJMP TEST CASE4 MOV A, R4 ; A= MOV P1, A ACALL DELAY XRL A, # B ;A= MOV P1, A AJMP TEST DELAY:.. END -38-
39 ORG 0000H MOV R3, #00H ;R3 Data to be displayed LOOP: MOV DPTR, #TABLE ;DPTR = Table Start Address MOV A, R3 ; MOVC ;Look up [DPTR+R3] entry at data table ; Display numbers on 7-segment display MOV P1, A ;Move ON/OFF pattern to Port 1 ACALL DELAY ; Increase R3 by 1 and loop back MOV A, R3 ADD A, #1 ;R3 = R3 + 1 DA A ;Decimal Adjust ;A= = 10 decimal after DA ANL A, #0FH ;A=???????? AND ???? ;A reset to H after ANL A,#0FH MOV R3, A ;Version 2 INC R3 CJNE R3,#10,CONT1 MOV R3,#0H CONT1: AJMP LOOP ; DELAY:.. TABLE: DB B ; 0 ;7-Segment LED Patterns DB B ; 1 DB B ; 2 DB B ; 3 DB B ; 4 DB B ; 5 DB B ; 6 DB B ; 7 DB B ; 8 DB B ; 9 ; END -39-
40 Lecture 9 CS (Chip Select) Active low input used to activate the ADC0804 chip. [CS=LOW, turn ON ADC0804] RD (data enable) Active low input used to get converted data out of the ADC0804 chip. When CS = 0, if a high-tolow pulse is applied to the RD pin, the 8-bit digital output shows up at the D0-D7 data pins. [CS=0, HIGH-TO-LOW pulse to RD, Read Data at D0-D7] WR (start conversion) [CS=0, LOW-TO-HIGH pulse to WR (Write), ADC start converting data] Active low input used to inform the ADC0804 to start the conversion process. If CS = 0 when WR makes a low-to-high transition, the ADC0804 starts converting the analog input value of Vin to an 8-bit digital number. When the data conversion is complete, the INTR pin is forced low by the ADC0804. (Conversion completed=> INTR=0) CLK IN and CLK R Connect to external capacitor and resistor for self-clocking, f = 1/(1.1RC). The clock affect the conversion time and this time cannot be faster than 110µs. INTR (end of conversion) This is an active low output pin. When the conversion is finished, it goes low to signal the CPU that the converted data is ready to be picked up. After INTR goes low, we make CS = 0 and send a high-to-low pulse to the RD pin to get the data out of the ADC0804 chip. Vin (+) and Vin ( ) These are the differential analog inputs where Vin = Vin (+) Vin ( ). Often the Vin ( ) pin is connected to ground and the Vin (+) pin is used as the analog input to be converted to digital. D 7 D6 D5 D 4 D3 D 2 D1 D0 I out = I ref D7 64 D6 32 D5 16 D4 8 D3 4 D2 2D1 D0 I out = I ref Iout = Iref (128 D D D D4 + 8 D3 + 4 D2 + D0) / 256 I out = I ref (2 7 D D D D D D D D 0 ) / 256 I out = I ref (Convert D0-D7 from binary to Decimal)/ is full scale Iout is proportional to the decimal value of D0-D7 D 7 D6 D5 D 4 D3 D 2 D1 D0 I out = I ref I out = I ref (2 7 D D D D D D D D 0 ) / 256 I out = I ref (Convert D0-D7 from binary to Decimal)/256 I out = (D0-D7 in decimal form) / 256 x I ref 256 is full scale, I out is proportional to the decimal value of D0-D7-40-
41 Lecture
42 Step # Winding A Winding B Winding A Winding B Step # Winding A Winding B Winding A Winding B Step # Winding Winding Winding Winding Winding Winding Winding Winding A B A B A B A B Step # Winding Winding Winding Winding Winding Winding Winding Winding A B A B A B A B
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