Two-Port Noise Analysis

Transcription

1 Berkeley Two-Port Noise Analysis Prof. Ali M. Niknejad U.C. Berkeley Copyright c 2015 by Ali M. Niknejad 1/26

2 Equivalent Noise Generators v 2 n Noisy Two-Port i 2 n Noiseless Two-Port Any noisy two port can be replaced with a noiseless two-port and equivalent input noise sources In general, these noise sources are correlated. For now let s neglect the correlation. 2/26

3 Equivalent Noise Generators (cont) The equivalent sources are found by opening and shorting the input. i 2 n short input v 2 n Noisy Two-Port Noiseless Two-Port observe output noise noise only f(vn) 2 equate noise open input v 2 n i 2 n Noisy Two-Port Noiseless Two-Port observe output noise noise only f(i 2 n) equate noise 3/26

4 Example: BJT Noise Sources v 2 rb r b C µ i 2 b r C + v g m v r o i 2 c If we leave the base of a BJT open, then the total output noise is given by i 2 o = i 2 c + 2 i 2 b = i 2 n 2 or i 2 n = i 2 c 2 + i 2 b i 2 b 4/26

5 BJT (cont) If we short the input of the BJT, we have i 2 o g 2 mv 2 n Z Z + r b 2 = 2 v 2 n (Z + r b ) 2 = 2 v 2 r b (Z + r b ) 2 + i 2 c Solving for the equivalent BJT noise voltage v 2 n = v 2 r b + i 2 c (Z + r b ) 2 2 v 2 n v 2 r b + i 2 c Z 2 2 5/26

6 BJT Generators at Low Freq at low frequencies... v 2 n v 2 r b + i 2 c g 2 m v 2 n =4kTBr b + 2qI C B g 2 m i 2 n = 2qI c 6/26

7 Role of Source Resistance v 2 n V s i 2 n Noiseless Two-Port If = 0, only the voltage noise v 2 n is important. Likewise, if = 1, only the current noise i 2 n is important. Amplifier Selection: If is large, then select an amp with low (MOS). If is low, pick an amp with low vn 2 (BJT) i 2 i For a given, there is an optimal v 2 n /i 2 n ratio. Alternatively, for a given amp, there is an optimal 7/26

8 Equivalent Input Noise Voltage v 2 n V s i 2 n Noiseless Two-Port Let s find the total output noise voltage vo 2 =(vn 2 A 2 v + vr 2 s A 2 v ) Rin R in + =(vn 2 + in 2 Rs 2 + vr 2 s ) 2 + Rin R in + Rin R in + 2 A 2 v 2 R 2 s i 2 n A 2 v 8/26

9 Noise Figure v 2 eq V s Noiseless Two-Port We see that all the noise can be represented by a single equivalent source v 2 eq = v 2 n + i 2 n R 2 s Applying the definition of noise figure F =1+ N amp,i N s =1+ v 2 eq v 2 s 9/26

10 Optimal Source Impedance Let v 2 n =4kTR n B and i 2 n =4kTG n B.Then F =1+ R n + G n R 2 s =1+G n + R n Let s find the optimum df d = G n R n Rs 2 =0 We see that the noise figure is minimized for r s Rn vn R opt = = 2 G n in 2 10 / 26

11 Optimal Source Impedance (cont) The major assumption we made was that v 2 n and i 2 n are not correlated. The resulting minimum noise figure is thus F min =1+G n + R n r r Rn Gn =1+G n + R n G n R n =1+2 p R n G n 11 / 26

12 F min Consider the di erence between F and F min F F min = G n + R n 2 p R n G n = R n (1 + G nr 2 s = R n 1+ = R n R n Rs R opt 2 R p s Rn G n ) R n! 2 2 R opt 2 1 R opt = R n G opt G s 2 12 / 26

13 Noise Sensitivity Parameter Sometimes R n is called the noise sensitivity parameter since F = F min + R n G opt G s 2 This is clear since the rate of deviation from optimal noise figure is determined by R n. If a two-port has a small value of R n, then we can be sloppy and sacrifice the noise match for gain. If R n is large, though, we have to pay careful attention to the noise match. Most software packages (Spectre, ADS) will plot Y opt and F min as a function of frequency, allowing the designer to choose the right match for a given bias point. 13 / 26

14 BJT Noise Figure We found the equivalent noise generators for a BJT vn 2 = vr 2 b + i c 2 gm 2 =4kTBr b + 2qI C B gm 2 in 2 = ib 2 The noise figure is F =1+ 4kTr b + 2qI C gm 2 4kT + 2qI C Rs 2 =1+ r b g m 4kT 2g m 2 According to the above expression, we can choose an optimal value of g m to minimize the noise. But the second term r b / is fixed for a given transistor dimension 14 / 26

15 BJT Cross Section collector emitter base scalable length C E B r c r b The device can be scaled to lower the net current density in order to delay the onset of the Kirk E ect The base resistance also drops when the device is made larger 15 / 26

16 BJT Device Sizing We can thus see that BJT transistor sizing involves a compromise: The transconductance depends only on I C and not the size (first order) The charge storage e ects and f T only depend on the base transit time, a fixed vertical dimension. A smaller device has smaller junction area but can only handle a given current density before Kirk e ect reduces performance A larger device has smaller base resistance r b but larger junction capacitance 16 / 26

17 Correlated Noise Sources Let s partition the input noise current into two components, a component correlated ( parallel ) to the noise voltage and a component uncorrelated ( perpendicular ) of the noise voltage i n = i c + i u where we assume that < i u, v n >=0and We can therefore write i c = Y C v n v eq = v n (1 + Y C Z S )+Z S i u 17 / 26

18 Noise Figure of Two-Port Which is a sum of uncorrelated random variables. The variance is thus the sum of the variances v 2 eq = v 2 n 1+Y C Z S 2 + Z s 2 i 2 u This allows us to immediately write the noise figure as F =1+ v 2 n 1+Y C Z S 2 + Z s 2 i 2 u v 2 s Let v 2 n =4kTBR n, i 2 u =4kTBG u,andv 2 s =4kTB.Then F =1+ R n 1+Y C Z S 2 + Z s 2 G u 18 / 26

19 Optimum Source Impedance If we let Y c = G c + jb c, Y s = Zs 1 = G s + jb s, it s not to di cult to show that the optimum source impedance to minize F is given by B opt = B s = B c G opt = G s = r Gu R n + G 2 c The minimum acheivable noise figure is q F min =1+2G c R n +2 R n G u + Gc 2 Rn 2 For G c = 0, this reduces to our previously derived expression. 19 / 26

20 Minimum Noise F min Very similar to the uncorrelated case, we have F = F min + R n G s Y s Y opt 2 This equation stats that if the source impedance Y s 6= Y opt, the noise figure will be larger by a factor of the distance squared times the factor R n /G s. A good device should have a low R n so that the noise match is not too sensitive. 20 / 26

21 FET Common Source Amplifier v C R gd R 2 Rg s g + V s C gs g m v gs r o v gs i d R L Consider the following noise sources: v 2 s =4kTB R g vg 2 =4kTBR g R ch id 2 =4kTBg d0 B R L i 2 L =4kTBG L 21 / 26

22 Total FET Drain Noise Summing all the noise at the output (assume low frequency) i 2 o = i 2 d + i 2 L +(v 2 g + v 2 s )g 2 m Which results in the noise figure F =1+ v 2 g v 2 s + i 2 d + i 2 L g 2 mv 2 s =1+ R g + g d0 + G L gm 2 22 / 26

23 FET Noise Figure (low freq) Assume g m = g d0 (long channel) =1+ R g + gm + G LG S g 2 m If we make g m su ciently large, the gate resistance will dominate the noise. The gate resistance has two components, the physical gate resistance and the induced channel resistance R G = R poly + R ch = 1 W 3 L R The factors 1/3 and 1/5 come from a distributed analysis (EECS 117). They are valid for single-sided gate contacts. 1 g m 23 / 26

24 FET Layout To reduce the gate resistance, a multi-finger layout approach is commonly adopted. As a bonus, the junction capacitance is reduced due to the junction sharing. 24 / 26

25 CS Noise at Medium Frequencies v 2 R g R g V s + C gs v gs g m v gs r o i d R L If we repeat the calculation at medium frequencies, ignoring C gd, we simply need to input refer the drain noise taking into account the frequency dependence of G m G m = g m 1/(j!C gs ) 1/(j!C gs )+ + R g = g m 1+j!C gs ( + R g ) 25 / 26

26 CS Noise (cont) The drain noise is input referred by the magnitude squared G m 2 = g 2 m (1 +! 2 C 2 gs( + R g ) 2 ) So the noise figure is simply given by (neglect the noise of R L ) Assume that noise is given by F =1+ R g + 1+! 2 C 2 gs(r S + R g ) 2 F 1 =1+! 2 C 2 gsr 2 s g m R S R g (good layout). The high frequency =1+!! T 2 g m 26 / 26