EEE 184 Project: Option 1

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1 EEE 184 Project: Option 1 Date: November 16th 2012 Due: December 3rd 2012 Work Alone, show your work, and comment your results. Comments, clarity, and organization are important. Same wrong result or same correct result expressed in a very similar way a new project within three days. 1 Transfer function and state space model 1. Consider the circuit of figure 1. This transfer function is denoted by G 1. (a) Find the transfer function for the circuit. (b) Suggest values for R 1 and C 1 so that the settling time is 5s. (c) Use KCL and KVL to write the state space model when the output is v c1. (d) Obtain the state space model directly from the transfer function and compare with the previous question. Comment your result. (e) Build the Simulink model for the open loop system, simulate the system and obtain the time response for the previous values of R 1 and C 1. The input is a unit step. (f) Graphically deduce the time constant and the settling time (show T s and the time constant on the graph). 2. Now we combine the RC circuit of figure 1 with another RC circuit as shown in figure 2. (a) Find the transfer function of the entire circuit (v in /v c2 ). We call this transfer function G(s). (b) With references to figure 2, is G(s) = G 1 (s)g 2 (s)? Explain. (c) Suggest values for the circuit elements so that the settling time is 5s. (d) Use KCL and KVL to write the state space model. The output is v c2. 3. Now we combine the RC circuit with an op amp circuit as shown in figure 3. We call the open loop transfer function for this system L(s). (a) Find the transfer function L(s). What is the type of the system? (b) Use KCL and KVL to write the state space model as a function of the circuit elements. 1

2 Figure 1: Figure 2: Figure 3: 2

3 Figure 4: 2 Integral, derivative, and proportional circuits 1. Suggest op-amp based circuits to realize the following: (a) Pure integral. The transfer function and the gain of the integrator are denoted by G i and K i, respectively. (b) Pure gain: Should not invert the signal. The transfer function and the gain are denoted by G p and K p, respectively. (c) Pure derivative. The transfer function and the gain for the derivative are denoted by G d and K d, respectively. (d) Comparator: A circuit allowing to close the loop and realize negative feedback. The comparator should have a unity gain. 2. For the integrator, gain and derivative circuits of the previous questions, write the gains as a function of the circuit s elements. 3 Analysis Now we take the transfer function of figure 2 with R 1 = 2, R 2 = 1, C 1 = 1/5, C 2 = 1/2, and we close the loop as shown in figure Analytically find the closed loop transfer function. We call it T (s). 2. Write the steady state error as a function of T (s). 3. Write the steady state error as a function of G(s). What is the type of the system? 4. Use the Routh-Hurwitz test to check the stability of the system and deduce the range of the gain for which the system is stable. 5. Plot the root locus of the system and deduce the gain range for stability. Compare with the previous question. 6. Find K p then suggest values for the resistors so that: (a) The percent overshoot is 10%. Calculate the corresponding settling time. The gain allowing for 10% percent overshoot is denoted by K p1. 3

4 i. For K p1, find analytically the steady state error for a unit step input. ii. For K p1, use Matlab or Simulink to show the step response and confirm the numerical values for the percent overshoot, the steady state error, and the settling time. (b) The settling time is 3s. Calculate the corresponding percent overshoot. The gain allowing for 3s settling time is denoted by K p2. i. For this value of the gain (K p2 ), find analytically the steady state error for a unit step input. ii. Use Matlab or Simulink (for K p2 ) to show the step response and confirm the numerical values for the percent overshoot, the steady state error, and the settling time.. (c) The steady state error is zero. denoted by K p3. The gain allowing to obtain a zero steady state error is i. Use Matlab or Simulink to show the step response and confirm the numerical value the steady state error (for K p3 ). 7. Is it possible to specify the settling time and percent overshot, and the steady state error for the same value of gain? Explain. 8. Now we consider the circuit of figures 2 in cascade with a pure gain circuit, and unity feedback. For gain K p1, build the circuit (on a breadboard) or simulate the circuit (use circuit, not block diagram) using pspice (or similar tools). Show your results (oscilloscope or computer screen shot). 4 Improving steady state errors Now the goal is to improve the steady state errors. We suggest to use three different approaches: pure gain (proportional), ideal integral and lag compensator 1. Write the transfer functions for these compensators and explain their working principles. 2. Improving steady state for G 1 (s) (Use appropriate test signal depending on the type of the system) (a) Simulate the closed loop system for G 1 without controller and show the time response. What is the steady state error? (b) Analytically, design a proportional controller so that the steady state error is less than 0.1 (c) Simulate the proportional controller effect, show the time response and discuss your results. (d) Analytically, design an ideal integral compensator so that the steady state error is less than 0.1 (e) Simulate the ideal integral compensator effect, show the time response and discuss your results. (f) Analytically, design a lag compensator so that the steady state error is less than 0.1 (g) Simulate the lag compensator effect, show the time response and discuss your results. (h) Compare between the transients obtain for the different compensators. 3. Improving steady state for G(s) (Use appropriate test signal depending on the type of the system) (a) Simulate the closed loop system for G without controller and show the time response. What is the steady state error? 4

5 (b) Analytically, design a proportional controller so that the steady state error is less than 0.1 (c) Simulate the proportional controller effect, show the time response and discuss your results. (d) Analytically, design an ideal integral compensator so that the steady state error is less than 0.1 (e) Simulate the ideal integral compensator effect, show the time response and discuss your results. (f) Analytically, design a lag compensator so that the steady state error is less than 0.1 (g) Simulate the lag compensator effect, show the time response and discuss your results. (h) Compare between the transients obtain for the different compensators. 4. Improving steady state for L(s) (Use appropriate test signal depending on the type of the system) (a) Simulate the closed loop system for L without controller and show the time response. What is the steady state error? (b) Analytically, design a proportional controller so that the steady state error is less than 0.1 (c) Simulate the proportional controller effect, show the time response and discuss your results. (d) Analytically, design an ideal integral compensator so that the steady state error is less than 0.1 (e) Simulate the ideal integral compensator effect, show the time response and discuss your results. (f) Analytically, design a lag compensator so that the steady state error is less than 0.1 (g) Simulate the lag compensator effect, show the time response and discuss your results. (h) Compare between the transients obtain for the different compensators. (i) For the lag compensator, complete the table below e ss ( ) z c p c T s %OS is of type 1. Use ramp input if the system (j) Plot the settling time as a function of the steady state error. Comment your results. (k) Plot the percent overshoot as a function of the steady state error. Comment your results. 5 Improving transients We suggest to use a lead compensator to improve the transient for L(s) as shown in figure Pick the values of the circuit s elements so that L(s) = 1 s(s + 5) (1) 2. Design a lead compensator to reduce the settling time by 1/3. 5

6 Figure 5: 3. Build the Simulink model and check your result. Use a unit step. 4. Design a lead compensator to reduce the percent overshoot by half. 5. Build the Simulink model and check your result. Use a unit step. 6. Discuss the effect of the lead compensator on the steady state error. 7. Use Matlab pidtool command to design PID controller for L(s) to satisfy desired response. Feel free to pick appropriate transient and steady state for the desired response. 6 Stability 8. Derive the state space model for the circuit of figure 6-(a). i R is the output. 9. Use the eigenvalues to show that the system is unstable. 10. Find the transfer function. We call it M(s). 11. For the closed loop system shown in figure 6 (b), use the Routh Hurwitz test to find the range of the gain for which the system is stable. 12. To stabilize the closed loop system we suggest to use the pure gain circuit of figure 7. Find a combination of values for the circuit of figure 7 parameters so that the system is stable. Feel free to pick an appropriate value for the gain. 13. Simulate the system in pspice (or a similar software. Use the circuit, not the block diagrams) 6

7 Figure 6: Figure 7: 7

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