AME. High PSRR, Low Noise, 300mA CMOS Regulator AME8853. n General Description. n Typical Application. n Features. n Functional Block Diagram

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1 8853 n General Description n Typical Application The 8853 family of positive, CMOS linear regulators provide low dropout voltage(220mv@300ma), low quiescent current, and low noise CMOS LDO. These rugged devices have both Thermal Shutdown, and Cur- IN IN EN 8853 GND OUT OUT rent limit to prevent device failure under the "Worst" of operating conditions. C IN 1µF C OUT 1µF n Features l Low Dropout Voltage: 220mV@300mA l Guaranteed Current: 300mA l Quiescent Current: 60µA (typ.) l Over-Temperature Shutdown l Current Limiting protection l PSRR: 60dB@10KHz l Ultra-Low-Noise: 100µV RMS at 1Hz to 100KHz l Low Temperature Coefficient l Input Voltage Range : 2.5V~5.5V l Output Voltage Range: 0.8V~ 4.3V l Green Products Meet RoHS Standards n Functional Block Diagram IN Overcurrent Shutdown Thermal Shutdown OUT EN R1 n Applications l Instrumentation l Portable Electronics - AMP + l Wireless Devices l Cordless Phones l PC Peripherals l Battery Powered Widgets Vref R2 GND 1

2 8853 n Pin Configuration SOT-23/TSOT-23A Top View SOT-25/TSOT-25A Top View AETxxx 1. GND 2. OUT 3. IN AEVxxxx 1. IN 2. GND 3. EN 4. NC 1 2 * Die Attach: Non-Conductive Epoxy OUT * Die Attach: Conductive Epoxy DFN-6D (2mmx2mmx0.75mm) Top View AVYxxx 1. OUT SC-70-4 (SC-82) Top View AIUxxx 1. EN NC 3. GND 4. EN GND 3. OUT 4. IN NC 6. IN 1 2 * Die Attach: Conductive Epoxy * Die Attach: Conductive Epoxy 2

3 8853 n Pin Description SOT-25 TSOT-25A Pin Number SOT-23 TSOT-23A Pin Name 1 3 IN Pin Description Input voltage pin; should be decoupled with 1F or greater capacitor. 2 1 GND Ground connection pin. 3 N/A EN Enable pin, Active high". When pulled low, the PMOS pass transistor turns off, current consuming less than 1A. When EN pin float outside, it s weakly pulled high form internal MOS. 4 N/A NC No connection. 5 2 OUT LDO voltage regulator output pin; should be decoupled with a 1.0F or greater value low ESR ceramic capacitor. N/A N/A NC No connection. SC-70-4 (SC-82) Pin Number DFN-6 Pin Name Pin Description 1 4 EN Enable pin, Active high". When pulled low, the PMOS pass transistor turns off, current consuming less than 1A. When EN pin float outside, it s weakly pulled high. 2 3 GND Ground connection pin. 3 1 OUT 4 6 IN LDO voltage regulator output pin; should be decoupled with a 1.0F or greater value low ESR ceramic capacitor. Input voltage pin; should be decoupled with 1F or greater capacitor. N/A 2 5 NC No connection. 3

4 8853 n Ordering Information x x x xxx x Special Feature Output Voltage Number of Pins Package Type Pin Configuration Pin Configuration Package Type Number of Pins Output Voltage Special Feature A 1. IN E: SOT-2X T: 3 080: 0.8V N/A: SOT-2X (SOT-25) 2. GND I: SC-70 (SC-82) U: 4 090: 0.9V K: 0.9mm max height (TSOT-25A) 3. EN V: DFN-6 V: 5 100: 1.0V (for TSOT-2XA Only) 4. NC Y: 6 110: 1.1V 5. OUT 120: 1.2V 130: 1.3V A 1. EN 140: 1.4V 2. GND 150: 1.5V 3. OUT : : 4. IN 180: 1.8V : : A 1. GND 250: 2.5V (SC-70-4/ SC-82) (SOT-23) 2. OUT : : (TSOT-23A) 3. IN 280: 2.8V : : A 1. OUT : : (DFN-6D) 2. NC 420: 4.2V 3. GND 430: 4.3V 4. EN 5. NC 6. IN 4

5 8853 n Absolute Maximum Ratings Parameter Maximum Unit Input Voltage EN Voltage -0.3 to 6 V -0.3 to 6 V Output Current Output Voltage P D /(V IN -V OUT ) GND-0.3 to V IN +0.3 ma V ESD Classification HBM 2 kv MM 200 V n Recommended Operating Conditions Parameter Symbol Rating Unit Ambient Temperature Range T A -40 to +85 Junction Temperature Range T J -40 to +125 o C Storage Temperature Range T STG -65 to

6 8853 n Thermal Information Parameter Package Die Attach Symbol Maximum Unit SC-70-4(SC-82) 224 Thermal Resistance* (Junction to Case) Thermal Resistance (Junction to Ambient) SOT-25 Conductive Epoxy 81 TSOT-25A 81 DFN-6D 61 SOT-23 TSOT-23A Non-Conductive Epoxy 140 SC-70-4(SC-82) 331 SOT-25 Conductive Epoxy 260 TSOT-25A 230 DFN-6D 130 SOT-23 TSOT-23A Non-Conductive Epoxy 280 SC-70-4(SC-82) 300 θ JC θ JA o C / W o C / W Internal Power Dissipation Maximum Junction Temperature SOT-25 Conductive Epoxy 400 TSOT-25A 455 DFN-6D 769 SOT-23 TSOT-23A Lead Temperature (Soldering, 10Sec.)** * Measure θ JC on backside center of molding compound if IC has no tab. ** MIL-STD-202G 210F P D Non-Conductive Epoxy 400 mw 150 o C 260 o C 6

7 8853 n Electrical Specifications V IN =V OUT(NOM) +1V, (for V OUT <2V, V IN =2.5V), I OUT =1mA, and C OUT =1µF, C IN =1µF unless otherwise noted. Typical values are at T A =25 o C. Parameter Symbol Test Condition Min Typ Max Units Input Voltage V IN V Output Accuracy V OUT,ACC I OUT =1mA % Output Voltage Range V OUT V Dropout Voltage (Note 1) V DROP I OUT =300mA, 0.8V V OUT(NOM) 2.0V I OUT =300mA, 2.0V<V OUT(NOM) 2.4V I OUT =300mA, 2.4V<V OUT(NOM) 2.8V I OUT =300mA, 2.8V<V OUT(NOM) Note Output Current I OUT 300 ma Quiescent Current I Q I OUT =0mA µa mv Line Regulation I OUT =1mA, 0.8V V OUT 1.2V, 2.5V V IN 3.5V V V OUT IN V 100% OUT REG LINE I OUT =1mA, 1.2V<V OUT 2.0V, 2.5V V IN 3.5V I OUT =1mA, 2.0V<V OUT 4.2V, V IN(MIN) V IN V IN(MIN) +1V %/V I OUT =1mA, 4.2V<V OUT 4.5V, V IN(MIN) V IN 5.5V (Note2) Load Regulation VOUT 100% VOUT I OUT REG LOAD 1mA I OUT 300mA 0.8V V OUT(NOM) 1.2V 1mA I OUT 300mA 1.2V<V OUT(NOM) 2.0V 1mA I OUT 300mA 2.0V<V OUT(NOM) %/A 7

8 8853 n Electrical Specifications (Contd.) Parameter Symbol Test Condition Min Typ Max Units Power Supply Rejection Ration PSRR C OUT =1uF, V OUT =0.8V I OUT =10mA V IN =2.8V F=100Hz 60 F=1KHz 60 F=10KHz 60 I OUT =10mA, V OUT =0.8V, Output Voltage Noise en 100 µv f=1hz to 100KHz RMS db Enable High (enabled) V EN,HI V IN(MIN) V IN 5.5V 1.4 V IN Enable Low (shutdown) V EN,LO V IN(MIN) V IN 5.5V V Enable Input Bias Current I EN,HI V EN =V IN 1 I EN,LO V EN =0V 2 µa Shutdown Current I SHDN V IN =5.0V, V EN =0V µa Shutdown Output Voltage V OUT,SD I OUT =0.4mA, V EN =0 0.4 V Protection Output Current Limit I LIM V OUT =0.9 x V OUT(NOM) 400 ma Thermal Shutdown Temperature Thermal Shutdown Hysteresis T SHDN Shutdown, temperature increasing 150 T SHDN(HYS) 20 Note1: Dropout Voltage is measured at V OUT =V OUT(NOM) x98% Note2: For V OUT below 2.0V, Dropout Voltage is the input (MIN) to output differential. o C 8

9 8853 n Detailed Description The 8853 family of CMOS regulators contain a PMOS pass transistor, voltage reference, error amplifier, over-current protection thermal shutdown, and Power Good detection circuitry. The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal protection circuits. During normal operation, the error amplifier compares the output voltage to a precision reference. Over-current and Thermal shutdown circuits become active when the junction temperature exceeds 150 o C, or the current exceeds 300mA. During thermal shutdown, the output voltage remains low. Normal operation is restored when the junction temperature drops more 20 o C. Capacitor Selection and Regulator Stability The maximum output power of the 8853 is limited by the maximum power dissipation of the package. By calculation the power dissipation of the package as a function of the input voltage, output voltage and output current, the maximum input voltage can be obtained. The maximum power dissipation should not exceed the package s maximum power rating. P MAX = (V IN(MAX) -V OUT ) x I OUT Where: V IN(MAX) = maximum input voltage P MAX = maximum power dissipation of the package Capacitor Selection and Regulator Stability The 8853 is stable with an output capacitor to ground of 1µF or greater. Ceramic capacitors have the lowest ESR, and will offer the best AC performance. Conversely, Aluminum Electrolytic capacitors exhibit the highest ESR, resulting in the poorest AC response. Unfortunately, large value ceramic capacitors are comparatively expensive. One option is to parallel a 0.1µF ceramic capacitor with a 10µF Aluminum Electrolytic. The benefit is low ESR, high capacitance, and low overall cost. A second capacitor is recommended between the input and ground to stabilize V IN. The input capacitor should be at least 0.1µF to have a beneficial effect. Enable Pin The Enable Pin is Active High. When activated pulled low, the MOS pass transistor shuts off, and all internal circuits are powered down. In this state, the stand by current is than 1µA. When EN pin float outside, It's pulled high. 9

10 8853 n Characterization Curve Output Voltage Output Voltage V IN = 2.8V V OUT = 1.0V I OUT = 1mA V IN = 5.3V V OUT = 4.3V I OUT = 1mA Output Voltage (V) Output Voltage (V) Temperature( o C) Temperature( o C) Quiescent Current Quiescent Current IQ(µA) IQ(µA) V OUT = 1.0V V OUT = 4.3V Temperature( o C) Temperature( o C) Current Limit vs. Input Voltage Current Limit vs. Input Voltage Current Limit(mA) V OUT = 1.0V Current Limit(mA) V OUT = 4.3V Input Voltage Input Voltage

11 8853 n Characterization Curve (Contd.) Output Voltage (V) Dropout Voltage V OUT = 4.3V Temperature( o C) Region of Stable C OUT ESR(Ω) Stability vs. ESR vs. Load Current V IN = 5V C IN = C OUT= 1µF / X7R Unstable Range Stable Range Unstable Range Load Current (ma) PSRR vs. Frequency V OUT = 1V, I OUT = 10mA PSRR vs. Frequency V OUT = 1V, I OUT = 150mA PSRR (db) PSRR (db) K 10K 100K 1M Frequency (Hz) K 10K 100 K 1M Frequency (Hz) 100 PSRR vs. Frequency 100 PSRR vs. Frequency V OUT = 4.3V, I OUT = 10mA V OUT = 4.3V, I OUT = 150mA PSRR (db) PSRR (db) K 10K 100K 1M K 10K 100 K 1M Frequency (Hz) Frequency (Hz) 11

OUT (20mV/Div) V IN (1V/Div) 20µS/Div Line Transient

(20mV/Div) V IN (1V/Div) V OUT (20mV/Div) V IN

Line Transient Response V OUT (1V/Div) V OUT

12 8853 n Characterization Curve (Contd.) Line Transient Response Line Transient Response V OUT (20mV/Div) V IN (1V/Div) 20µS/Div Line Transient Response 20µS/Div Line Transient Response V OUT (20mV/Div) V IN (1V/Div) V OUT (20mV/Div) V IN (1V/Div) 20µS/Div 20µS/Div Line Transient Response Line Transient Response V OUT (20mV/Div) V IN (1V/Div) V OUT (20mV/Div) V IN (1V/Div) V OUT (20mV/Div) V IN (1V/Div) 20µS/Div 20µS/Div 12

IN (1V/Div) V OUT (20mV/Div) V IN (1V/Div) 20µS/Div 20µS/Div Line

13 8853 n Characterization Curve (Contd.) Line Transient Response Line Transient Response V OUT (20mV/Div) V IN (1V/Div) V OUT (20mV/Div) V IN (1V/Div) 20µS/Div 20µS/Div Line Transient Response Line Transient Response 20µS/Div Line Transient Response Line Transient Response V OUT (20mV/Div) V IN (1V/Div) V OUT (20mV/Div) V IN (1V/Div) V OUT (20mV/Div) V IN (1V/Div) V OUT (20mV/Div) V IN (1V/Div) 20µS/Div 20µS/Div 20µS/Div 13

(20µSec/Div) Time (20µSec/Div) Load Transient Response Load

(100mA/Div) V OUT (20mA/Div) I OUT (100mA/Div) V OUT

Response I OUT (100mA/Div) V OUT (20mA/Div) Time (20µSec/Div)

14 8853 n Characterization Curve (Contd.) Load Transient Response Load Transient Response Time (20µSec/Div) Time (20µSec/Div) Load Transient Response Load Transient Response I OUT (100mA/Div) V OUT (20mA/Div) I OUT (100mA/Div) V OUT (20mA/Div) I OUT (100mA/Div) V OUT (20mA/Div) I OUT (100mA/Div) V OUT (20mA/Div) Time (20µSec/Div) Time (20µSec/Div) Load Transient Response Load Transient Response I OUT (100mA/Div) V OUT (20mA/Div) Time (20µSec/Div) I OUT (100mA/Div) V OUT (20mA/Div) Time (20µSec/Div) 14

50µS/Div 1) EN= 1V/div 2) V OUT = 500mV/div 3) I OUT = 20mA/div

Enable Transient Response Chip Enable Transient Response 100µS/Div 1)

15 8853 n Characterization Curve (Contd.) Chip Enable Transient Response Chip Enable Transient Response 50µS/Div 1) EN= 1V/div 2) V OUT = 500mV/div 3) I OUT = 20mA/div 50µS/Div 1) EN= 1V/div 2) V OUT = 500V/div 3) I OUT = 20mA/div Chip Enable Transient Response Chip Enable Transient Response 100µS/Div 1) EN= 2V/div 2) V OUT = 2V/div 3) I OUT = 20mA/div 50µS/Div 1) EN= 2V/div 2) V OUT = 2V/div 3) I OUT = 20mA/div 15

50µS/Div 1) EN= 1V/div 2) V OUT = 500mV/div 3) I OUT = 100mA/div

16 8853 n Characterization Curve (Contd.) Chip Enable Transient Response Chip Enable Transient Response 50µS/Div 1) EN= 1V/div 2) V OUT = 500mV/div 3) I OUT = 100mA/div 10µS/Div 1) EN= 1V/div 2) V OUT = 500mV/div 3) I OUT = 100mA/div Chip Enable Transient Response Chip Enable Transient Response 50µS/Div 1) EN= 2V/div 2) V OUT = 2V/div 3) I OUT = 100mA/div 20µS/Div 1) EN= 2V/div 2) V OUT = 2V/div 3) I OUT = 100mA/div 16

17 8853 n Tape and Reel Dimension SOT-23 P0 W PIN 1 P Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Pitch (P0) Part Per Full Reel Reel Size SOT ±0.1 mm 4.0±0.1 mm 4.0±0.1 mm 3000pcs 180±1 mm TSOT-23A P0 W PIN 1 P Carrier Tape, Number of Components Per Reel and Reel Size 17

18 8853 n Tape and Reel Dimension (Contd.) SOT-25 P0 W PIN 1 P Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Pitch (P0) Part Per Full Reel Reel Size SOT ±0.1 mm 4.0±0.1 mm 4.0±0.1 mm 3000pcs 180±1 mm TSOT-25A P0 W PIN 1 P Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Pitch (P0) Part Per Full Reel Reel Size TSOT-25A 8.0±0.1 mm 4.0±0.1 mm 4.0±0.1 mm 3000pcs 180±1 mm 18

19 8853 n Tape and Reel Dimension (Contd.) SC-70-4 (SC-82) P0 W PIN 1 P Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Pitch (P0) Part Per Full Reel Reel Size SC ±0.1 mm 4.0±0.1 mm 4.0±0.1 mm 3000pcs 180±1 mm DFN-6D (2mmx2mmx0.75mm) P0 PIN 1 W P Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Pitch (P0) Part Per Full Reel Reel Size DFN-6D (2x2x0.75mm) 8.0±0.1 mm 4.0±0.1 mm 4.0±0.1 mm 3000pcs 180±1 mm 19

20 8853 n Package Dimension SOT-23 Top View Side View D E H PIN 1 e L Front View A b A1 n Lead Pattern 0.80 BSC 1.00 BSC 1.90 BSC 2.40 BSC Note: 1. Lead pattern unit description: BSC: Basic. Represents theoretical exact dimension or dimension target. 2. Dimensions in Millimeters. 3. General tolerance +0.05mm unless otherwise specified. 20

21 8853 n Package Dimension (Contd.) TSOT-23A b D L MILLIMETERS INCHES SYMBOLS MIN MAX MIN MAX A A E1 E A b PIN 1 e e1 TOP VIEW REAR VIEW A1 A2 A c SIDE VIEW c D E E e e BSC 1.90 BSC BSC BSC L θ 0 o 8 o 0 o 8 o n Lead Pattern 0.80 BSC 1.00 BSC 1.90 BSC 2.40 BSC Note: 1. Lead pattern unit description: BSC: Basic. Represents theoretical exact dimension or dimension target. 2. Dimensions in Millimeters. 3. General tolerance +0.05mm unless otherwise specified. 21

22 8853 n Package Dimension (Contd.) SOT-25 Top View Side View D H E PIN 1 S1 e L Front View A b A1 n Lead Pattern 0.70 BSC 1.00 BSC 0.95 BSC 0.95 BSC 2.40 BSC Note: 1. Lead pattern unit description: BSC: Basic. Represents theoretical exact dimension or dimension target. 2. Dimensions in Millimeters. 3. General tolerance +0.05mm unless otherwise specified BSC 22

23 8853 n Package Dimension (Contd.) TSOT-25A D b L 0.25 E1 E PIN 1 e e1 TOP VIEW c SIDE VIEW A1 A A2 REAR VIEW n Lead Pattern 0.70 BSC 2.40 BSC 1.00 BSC 0.95 BSC 0.95 BSC 1.90 BSC Note: 1. Lead pattern unit description: BSC: Basic. Represents theoretical exact dimension or dimension target. 2. Dimensions in Millimeters. 3. General tolerance +0.05mm unless otherwise specified. 23

24 8853 n Package Dimension (Contd.) SC-70-4 (SC-82) D e1 e L MILLIMETERS INCHES SYMBOLS MIN MAX MIN MAX A A E1 E A b PIN 1 b d b1 L1 c 0.20 b c d TYP TYP TOP VIEW SIDE VIEW D E E e TYP 0.026TYP e A2 A L REF REF L FRONT VIEW A1 θ 0 o 8 o 0 o 8 o n Lead Pattern SC-70-4/SC BSC 0.8 BSC 0.45 BSC 0.35 BSC 1.94 BSC 0.05REF Note: 1. Lead pattern unit description: BSC: Basic. Represents theoretical exact dimension or dimension target. 2. Dimensions in Millimeters. 3. General tolerance +0.05mm unless otherwise specified. 24

25 8853 n Package Dimension (Contd.) DFN-6D (2mmx2mmx0.75mm) D b e L E E1 PIN 1 IDENTIFICATION D1 TOP VIEW BOTTOM VIEW A G1 G REAR VIEW SYMBOLS MILLIMETERS INCHES MIN MAX MIN MAX A D E e TYP TYP D E b L G G

26 Life Support Policy: These products of, Inc. are not authorized for use as critical components in life-support devices or systems, without the express written approval of the president of, Inc., Inc. reserves the right to make changes in the circuitry and specifications of its devices and advises its customers to obtain the latest version of relevant information., Inc., April 2016 Document: TM001-DS8853-E.01 Corporate Headquarter, Inc. 8F, 12, WenHu St., Nei Hu Taipei, Taiwan. 114 Tel: Fax:

AME. High PSRR, Low Noise, 600mA CMOS Regulator AME8855. n General Description. n Typical Application. n Features. n Functional Block Diagram

AME. High PSRR, Low Noise, 600mA CMOS Regulator AME8855. n General Description. n Typical Application. n Features. n Functional Block Diagram 8855 n General Description n Typical Application The 8855 family of positive, CMOS linear regulators provide low dropout voltage(42mv@6ma), low quiescent current, and low noise CMOS LDO. These rugged devices