Advanced Computational Methods for VLSI Systems. Lecture 5 Statistical VLSI modeling and analysis. Zhuo Feng

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1 Advanced Computational Methods for VLSI Systems Lecture 5 Statistical VLSI modeling and analysis Zhuo Feng 5.1

2 Example of Static Timing Analysis 7/4/-3 5/3/ /6/ /17/ /20/-3 4/7/ /18/0 2 8/8/0 3 11/11/0 Arrival time: input -> output, take max Required arrival time: output -> input, take min Slack = required arrival time arrival time 5.2

3 SSTA and Infrastructure Variability Process Characterization Interconnect Gate Models Delay Calculators SSTA Statistical Opt. 5.3

4 Basic SSTA Research Issues Corner-based analysis is too pessimistic Process variation modeling PCA, Quad-tree, Distance based, Gridless Arrival time (AT)/required arrival time (RAT) propagation Path based, block based Accuracy/efficiency tradeoff First order, quadratic Flexibility and extensibility Gaussian vs. non-gaussian Don t forget the characterization underpins Interconnects and gates 5.4

5 SSTA Literatures H. Chang and S. Sapatnekar, Statistical timing analysis considering spatial correlation using a single PERT-like traversal, ICCAD 03. C. Visweswariah et al, First-order incremental block-based statistical timing analysis, DAC 04. [Reading assignment] Y. Zhan, A. Strojwas, X. Li, and L. Pileggi, Correlation-aware statistical timing analysis with non-guassian delay distributions, DAC 05. L. Zhang, W. Chen, Y. Hu, J. Gubner and C. Chen, Correlationpreserved non-gaussian statistical timing analysis with quadratic timing model, DAC 05. S. Onaissi and F. Najm, A linear-time approach for static timing analysis covering all process corners, ICCAD 06. Z. Feng, P. Li, Y. Zhan, Fast second-order statistical static timing analysis using parameter dimension reduction, DAC 07. And many more 5.5

6 Principle Component Analysis (PCA) Equiprobable contours of a Gaussian vector Ellipsoids The axes of the ellipsoids are not parallel to the coordinate axes if the covariance matrix is not diagonal x2 x2 x1 x1 PCA in parameter space PCA can rotate the ellipsoids to make the axes parallel to the coordiate axes Decorrelate 5.6

7 Principle Component Analysis (PCA) Compute the normalized eigenvectors of the covariance matrix : V [ v, v2,, v 1 N ] V 1 are called the first principle component (PC1), V 2 the second principle component (PC2) These are the axes of the ellipsoid Perform coordinate transform for a data point x (in the original coordinate), but with the mean subtracted z = x - m 5.7

8 Principle Component Analysis (PCA) Find the new coordinates for z via projection: c = V T z Further scale c by the square roots of eigenvalues: c = diag (sqrt(lambda1), sqrt(lambda2) ) V T z x = diag (sqrt(lambda 1 ), sqrt(lambda 2 ) ) Vc + m Mean of c = Covariance of c = From now on, we assume x = [x 1, x 2,, ] are a set of PCs i.e., PCA has been already applied 5.8

9 Assumptions behind PCA PCA assumes normality For Gaussian random variables, uncorrelatedness implies independence Breaks down for non-gaussian distributions PCA does not achieve independence for non-gaussian parameters More general ICA (independent component analysis) can be applied to non-gaussian variables 5.9

10 PCA based Process & Delay Model Partition the entire chip into several bins Transistors/interconnects in each bin are impacted by several variability sources Variations coming from different bins are correlated (spatial correlations) captured by a covariance matrix Decorrelate via PCA 5.10

11 PCA based Process & Delay Model Express all gate/wire delays in terms of linear functions of PCs, possibly with a local random component canonical form: N A a 0 aixi an xn 1, a i1 Local normal variation: N(0,1) Block-based first-order SSTA Need to propagate ATs/RATs in the canonical form Two key atomic operations: ADD & MAX 5.11

12 Atomic Operation: ADD Where do I see ADD? ADD is relatively simple How to process an ADD?

13 Atomic Operation: MAX Where do I see MAX? Handling of a MAX gets more involved Need to play statistics tricks

14 Atomic Operation: MAX Covariance between A & B: N A a 0 aixi an xn 1, a i1 N B b 0 bi xi bn xn 1, b i1 5.14

15 Atomic Operation: MAX Tightness probability T A = Pr(A >B) Clark s formulae 5.15

16 Atomic Operation: MAX Mean and variance can be computed for the max Match the mean and variance in the canonical form of the max Use T A to weight between each coefficients of the PCs Adjust the coefficient for the local random component to match the variance 5.16

17 Statistical Optimization In addition to the timing yield, statistical sensitivities/criticality can be computed to guide statistical circuit optimization (i.e., gate/wire sizing) Delay pdf Timing spec However, modeling statistical leakage power variation requires non-gaussian models e.g. lognormal distributions delay

18 Issues with First-order SSTA Gate/wire delays can be nonlinear functions of process parameters large process variability MAX operations are intrinsically nonlinear Linear assumptions in first-order SSTA can incur error Quadratic SSTA may significantly improve the accuracy at the cost of higher runtime curse of dimensionality [Zhan et al DAC 05]. Parameter dimension reduction technique can alleviate the cost of quadratic SSTA [Feng et al DAC 07] 5.18

19 Issues with First-order SSTA There exist works which attempt to relax the Gaussian assumption. This boils down to some sort of parameterized SSTA approach. Question: what does the max of two parametric functions look like in 1D? 5.19

20 SSTA Modeling Infrastructure Variational Gate delay models Variational Interconnect models 5.20

21 Current Source Gate Model (CSM) Efficient and accurate gate delay modeling is essential for timing analysis Traditional waveform dependent gate models can not handle complex input signals due to the increasing crosstalk noise or inductive coupling effects Voltage (V) Buffer Input SPICE Ramp Input Ramp Model Voltage (V) AOI Input SPICE Ramp Input Ramp Model Time (S) x Time (S) x Four-stage buffer Two-input AOI Waveform Independent Models (WIM) are needed to better capture the nonlinear dynamic effects Waveform Independent Model: P. Li ( ICCD 05 ), C. Amin (DAC 06 ) Parameterized WIM is essential to capture the PVT variations 5.21

22 Motivation Waveform based models encode the dynamics in the waveforms Waveform Based Model WIM Limited to simple signal shapes Waveform Independent Model (WIM ) is able to model dynamics directly Can handle complex waveforms 5.22

23 Model Composition Input stage (2 nd order RC stage) + the nonlinear input/output current/charge LUTs H(S) V c V c Static/dynamic nonlinearites V o Internal delay internal control Node voltage Output DC/capacitive nonlinearites R 1 R 2 C 1 C 2 V c V c V o I n (V C, V out ) Qnc( Vc, Vout) 5.23

24 Nonlinear DC Current Characterize the DC characteristics of the gate Sweep both the input and output from 0 to Vdd Measure the output currents and build the 2D current look up table DC Current LUT IN OUT DC Current Vdd 0 DC voltage sweeps Vin: 0~Vdd at IN and OUT nodes Vout: 0~Vdd 5.24

25 Input-Stage Characterization The 2 nd order RC stage can be characterized by its poles: V in R 1 R 2 C 1 C 2 + V a k k s p 2 p 1 1 p 1 k k s, k 2 p 2 p p Apply a training input waveform to find the output current Test input voltage waveform IN OUT Measured current Fixed DC output voltage 5.25

26 Input-Stage Characterization Arbitrary PWL input can be decomposed to ramp inputs: For the ramp input u(t)=a t, the response due to the input stage transfer function is: All the n ramp inputs lead to the response: Use nonlinear least square to optimize p1 and p2 5.26

27 Input-Stage Characterization The internal control voltage can be expressed as: The error function in terms of p1 and p2 is given by: DC LUT Spice measurement p p p Let 2 1, NL least square is applied to minimize the above error The above optimal poles p1 and p2 are used to characterize the NL output capacitance 5.27

28 Nonlinear Output Capacitance Nonlinear charge w. r. t. the control voltage and output voltage is to be extracted 2D nonlinear charge LUT can be built based on the previously extracted 2D current LUT and the input RC stage: DC Input IN OUT Measured current DC (Ramp) Input (Measured current - DC current) Integration Iterations may be required to improve the accuracy Iterations may not be needed in practice 2D charge LUT 5.28

29 Overall Extraction Flow Post tuning DC current LUT Not yet Accurate? Yes End Update NL charge LUT Update Input stage 5.29

30 Delay errors Better delay: a pure delay element in front of the input stage is included Worse delay: two poles have to be changed to match the delay while the nonlinear charge LUT is updated based on these poles Slew errors Post Tuning Faster output transition: increase a portion of the nonlinear charges in the LUT Slower output transition: decrease a portion of the nonlinear charges in the LUT 5.30

31 Post Tuning Characterize DC LUT Optimize p1 and p2 of the input stage Characterize input NL capacitor. Characterize output NL capacitor Increase p2 Add a Delay element Better delay? Verify the model accuracy No Accurate? No Reduce NL output cap Slower rising? Increase NL output cap Worse delay? Yes Faster rising? End 5.31

32 Parameterized Waveform Independent Model Build parameterizable WiM models to capture the processvoltage-temperature (PVT) variations The response surface modeling technique adopting the two-level composite design plan is applied Parameter Set Composite Design Plan WiM Model Extraction Nonlinear Least Square PWiM (RSM) Model Second order parameterized WiM is accurate for typical process variation ranges 5.32

33 Experimental Results ( 3-input OR ) A complex input drives a four-stage buffer with a pi-model load Out Voltage (v) Input Spice WiM Ramp In Ramp Out Time (s) x

34 Experimental Results ( 4-stage buffer ) 4-stage buffer gate is driven by a complex input Out Voltage (v) Input Spice WiM Time (s) x

35 Experimental Results ( XOR ) An XOR gate is driven by a complex input Input Spice WiM Voltage (v) Time (s) x

36 5.36 Experimental Results OR3X4 OR3X AND3X4 AND3X OR3X1 OR3X AND3X1 AND3X AOI2X2 AOI2X AND2X8 AND2X AOI2X1 AOI2X AND2X4 AND2X NAND4X4 NAND4X AND2X1 AND2X NAND4X1 NAND4X BUF4 BUF NAND2X4 NAND2X BUF2X4 BUF2X NAND2X1 NAND2X BUF2X1 BUF2X AND4X4 AND4X INVX4 INVX AND4X1 AND4X INVX1 INVX1 S.Err S.Err. D.Err D.Err. S.Err S.Err. D.Err D.Err. S.Err S.Err. D.Err D.Err. S.Err S.Err. D.Err D.Err. Sp. Sp. Up Up Input 2 Input 2 Input 1 Input 1 Design Design Sp. Sp. Up Up Input 2 Input 2 Input 1 Input 1 Design Design OR3X4 OR3X AND3X4 AND3X OR3X1 OR3X AND3X1 AND3X AOI2X2 AOI2X AND2X8 AND2X AOI2X1 AOI2X AND2X4 AND2X NAND4X4 NAND4X AND2X1 AND2X NAND4X1 NAND4X BUF4 BUF NAND2X4 NAND2X BUF2X4 BUF2X NAND2X1 NAND2X BUF2X1 BUF2X AND4X4 AND4X INVX4 INVX AND4X1 AND4X INVX1 INVX1 S.Err S.Err. D.Err D.Err. S.Err S.Err. D.Err D.Err. S.Err S.Err. D.Err D.Err. S.Err S.Err. D.Err D.Err. Sp. Sp. Up Up Input 2 Input 2 Input 1 Input 1 Design Design Sp. Sp. Up Up Input 2 Input 2 Input 1 Input 1 Design Design Delay/slew errors (%) and speedups for two non-ramp inputs

37 Post Tuning A large 4-stage buffer via post tuning Out Voltage (V) Input WiM (original) Spice WiM (tuned) Time (s) x

38 Experimental Results ( Coupling Noise ) A 4-bit coupled bus driven by buffers B1 B2 B3 B4 Voltage (v) Input B2 Spice B2 WiM B3 Spice B3 WiM Time (s) x

39 Experimental Results ( Coupling Noise ) Two coupled nets driven by an AOI and a NAND Inputs Voltage (v) Net1 Spice/WiM Net1 w/o coup. Net2 w/o coup. Net2 Spice/WiM Time (s) x 10 9

40 Experimental Results (Variational Analysis) Variational analysis of an OR3 Out Voltage (v) Input Spice 40% L 15% Vt PWiM 40% L 15% Vt Spice 40% L 15% Vt Nominal Spice/PWiM PWiM 40% L 15% Vt Time (s) x

41 Experimental Results (Variational Analysis ) PWiM results under a non-ramp input Design Delay % Slew % Sp. Var. Ave. Max Var. Ave. Max Up. INVX BUF2X BUF AOI2X OR3X

42 Parameterized Interconnect MOR Geometrical variations can be captured in MOR via moment matching Gˆ( p G( p1, p2,, pm ) 1, p2,, pm ) C p, p,, p ) Cˆ( p1, p2,, pm ) ( 1 2 M ROM High dimensional parameter space is still a problem Complex models and high analysis cost 5.42

43 Parameter Dimension Reduction Reduction in both circuit size and parameter dimension is desired Most of available techniques only address size reduction H(P, S) Parametric Network H (s) H ˆ ( s ) Nominal MOR S H ˆ ( s ) Reduce Ckt Size p 1 Parameterized MOR in P ˆ H ( P, s) p 2 Reduce Ckt Size & Parameter Dimension Parameterized MOR in Z z 1 Hˆ ( Z, s) 5.43

44 Principle Component Analysis Widely used as a dimension reduction technique Limitation: neglect the structural info of a given design x2 x2 x1 Y = f(x) y2 x1 y1 PCA in parameter space Parameter Space X Performance Space Y 5.44

45 Performance Oriented Parameter Reduction Idea: find a new (smaller) set of parameters that are most statistically significant to the performances of interest Consider: distributions of parameters + correlation with performances X [ x, x2,, x 1 N ] pdf Network pdf Full parameter set Performance Variation Z z, z,, zr], R [ 1 2 N z i f ( x, x2,, x 1 N ) [Feng & Li, ICCAD 06] Reduced parameter set 5.45

46 Linear Reduced Rank Regression (RRR) Linear regression model Y CX X: N underlying process parameters Y: M performances of interest C: M x N: regression matrix : error Linear reduced rank regression model Y CX A B X ~ R R Objectives Find A R and B R to minimize the error in a statistical sense Compose a new set of R input variables Z = B R X (R << N) 5.46 M x R R x N

47 Linear Reduced Rank Regression (RRR) Optimal RRR model Y A R B R X ~ A R 1/ 2 U, B R U T 1/ 2 YX 1 XX For any SPD U [ u 1,, u r ] Eigenvectors corresponding to the R largest eigenvalues of D 1/ 2 YX 1 XX XY 1/ 2 Minimize E[ tr{ 1/ 2 ( Y A R B R X )( Y A R B R X ) T 1/ 2 } 5.47 Weighted Variances of Model Error

48 PCA vs RRR Reduced rank regression (RRR) PCA RRR Maximize input variance Get input data X Covariance Matrix SVD on xx xx Data reduction Get output data Y Covariance Matrix SVD on yx yx Parameter reduction 1 2 xx Minimize errors in Y 5.48

49 RRR for Statistical Circuit Modeling Standard RRR offers parameter reduction under a linear regression model framework Limited for modeling large range process variations Performance oriented parameter reduction requires statistical information of performances (Y) Expensive to obtain via Monte-Carlo sampling Approach: Extend the standard RRR to nonlinear regression based RRR Use easily computed performance metrics as cheap surrogates 5.49

50 Nonlinear RRR Quadratic regression Y C1X C2 X X Parameter reduction X X [ x, x x,, x x, x ] N 1 N 2 N T Y A B X A B X B X ~ R1 R1 R2 R1 R1 New parameters Z Difficult to find an optimal B R1 that minimizes the model error variances Reformulate the problem instead 5.50

51 Nonlinear RRR Define an augmented parameter set X X X Build a reduced-rank linear regression model based on Y A B B R [ R1 R2] Construct the new parameter set X X X X, XX XY Z B 1 X BR2X X B R R1 X 5.51

52 Computation of Covariance Matrices Choose transfer function moments as performance metrics (Y) in RRR Strongly connected with the interconnect (timing) performance Select moments at input/output terminals Quadratic parametric forms of moments can be computed efficiently m k m N N N i1 2 k 0 k, ixi k, i, ixi k, i, j i1 i1 i1 j1 Closed-form expressions available for covariance matrices (e.g. for Gaussian interconnect geometrical variations ) x i x j 5.52

53 Coupled RC lines Two coupled RC lines RC values computed using closed-formulas based on geometry Divide the two lines into five regions For each region, we consider the geometrical variations: wire width (W), wire thickness (T), wire spacing (S) and dielectric layer thickness (H) Total number of variations: 20 Region 1 Region 5 (2) (1) 5.53

54 Coupled RC lines Full 20-parameter model: 5000 LHS samples RRR based 3-parameter reduced-parameter model: 800 LHS samples LHS with 3 paras 5k LHS with 20 paras 1 Probability Delay(ns) Probability Delay variations LHS with 3 paras 5k LHS with 20 paras Delay(ns) 5.54

55 Results Coupled RC lines Errors of delay mean and standard deviation set Occurrence W H T S 1 para. 4K LHS Samp. 20 Para. Mean/Std. Occurrence LHS Samp. 1 Para. 2 Para. 3 Para. 1 5% 10% 10% 10% 0.00%/1.11% 0.94%/3.96% 0.54%/2.78% 0.01%/0.16% 2 10% 5% 10% 10% 0.00%/0.78% 1.50%/5.44% 0.74%/1.68% 0.00%/1.86% 3 10% 10% 5% 10% 0.00%/2.07% 0.88%/3.32% 0.49%/0.95% 0.21%/0.29% 4 10% 10% 10% 5% 0.09%/0.56% 1.40%/5.67% 0.64%/2.05% 0.73%/2.55% Reduced-parameter model errors: 1000 random samples 3 Paras Relative Error 1-Parameter Model Relative Error 3-Parameter Model

56 Coupled RC lines Composition of the new variation parameters Z=[Z1 Z2 Z3] Magnitude (log10(*)) Z = BR X Z1 Z2 Z3 Most important factors! W1 W2 W3 W4 W5 H1 H2 H3 H4 H5 T1 T2 T3 T4 T5 S1 S2 S3 S4 S5 Parameters for each region 5.56

57 Results Coupled RC lines Reduced-order reduced-parameter model Parameters: 20 1 Order: x parameter dimension reduction leads to a compact passive parameterized reduced order model Full Model with 20 Para. Mod. with 1 Para. Redu.Mod. with 1Para. Magnitude T.F. at node (2) T.F. at node (1) Frequency (Hz)

58 Results An RC Mesh Divide into nine regions and assign 27 geometrical variations 10 Compute a twoparameter 0 Mean of TF. at each frequency point model 10 1 Rel.Err.of Mean Rel.Err.of Std. Magnitude 10 1 Std. of TF. at each frequency point 15% sigma of H Relative Error % sigma of T 15% sigma of W Frequency(Hz) Frequency(Hz) 5.58

59 Results An RLC Line 30 geometrical variations Reduced-order reduced-parameter model Parameters: 1 Order: Full model with 30 paras. Model with 1 para. Redu.model with 1 para Magnitude Magnitude (log10(*)) Frequency Frequency Response x W1 W6 H1 H6 T1 T6 T10 Parameters for each region Composition of New Parameters 5.59

60 Fast Quadratic SSTA using Parameter Reduction Recall: quadratic SSTA is much more expensive than first-order SSTA The runtime grows quadratically in the number of process parameters Can bring parameter reduction up to the timing analysis level to alleviate the curse of dimensionality 5.60

61 Process Variation Model Global & local variation sources Global variations (inter-die variations): impact the whole chip ( introduce few variables) Local variations (intra-die variations): may impact smaller area (introduce many variables) Local variables: X1, X2, X3, X1 X2 X3 X7 X8 X9 X4 X5 X6 G1 G2 G3 Global variables: G1, G2, G3, 5.61

62 Motivations: SSTA via Moment Matching Runtime of Quadratic SSTA via Moment Matching increases quickly with the number of parameters Very limited number of variation sources can be considered Taking local variations into account is too expensive [Zhan et al, DAC 05] 10 2 runtime(seconds) number of parameters Moment matching based quadratic SSTA runtime (ISCAS85 C880) 5.62

63 Theoretic framework: conceptual Reduced rank regression (RRR) in quadratic SSTA Transform local parameters to reduced parameters using RRR Perform quadratic SSTA on new parameter space Including global variables and reduced local variables Local Variables Two-reg. RRR Global Variables Reduced Variables Quad. SSTA Sum & Max operations Global Global Variables Global Variables Global Variables Global Reduced Variables Reduced Variables Variables Reduced Variables Reduced Variables Reduced Variables Variables 5.63

64 Theoretic framework: actual Propagate global parameters and reduce local ones Local Variables RRR Reduced Variables RRR Reduced Variables RRR Reduced Variables Quad. SSTA Quad. SSTA Quad. SSTA Global Variables 5.64

65 Formulation: reduced rank regression Linear regression model Y CX DG Linear reduced rank regression approximate C by lower rank matrices Objectives YCXDG ABXDG Find A R and B R to minimize the error in a statistical sense Compose a new set of R input variables Z = B R X (R << N) R X, G: underlying local/global parameters R n / n Y: M performances of interest (signal arrival times) C, D : regression matrices : model error l g 5.65

66 RRR with two regressors: general form Optimal RRR model Y A B X DG R R 1 YX YG GG GY A U, B U D T 1 R R YX. G XX. G A B 1 1 YG GG R R XG GG 1 XX XG GG GX U [ u 1,, u r ] Eigenvectors correspond to the R largest eigenvalues of Q 1 YX. G XX. G XY. G Minimize the variances of model error Etr [ {( YAB XDG)( Y AB XDG) T } R R R R A new set of variable Z is obtained by: How to use them in SSTA? Z B X R 5.66

67 Implement RRR in SSTA Implementing RRR in SSTA: No correlation between the global (G) and local (X) variables: XG 0 Formulas are simplified: A U, B U T 1 R R YX XX U [ u 1,, u r ] Eigenvectors correspond to the R largest eigenvalues of Q 1 YX XX XY How to compute? RRR is used to identify the redundancy in the local variables 5.67

68 Implement RRR in SSTA Partition circuit into building blocks (divide and conquer) For partition i, the signal arrival time ATk is written as: T T T T X ATk Mk kgg AG k ck Xi Xi BkXi X i where i global local loc _ i n l Z 1 Use all the signal arrival times in partition i to compute Q :,,, T YX c1 ck cm Q 1 YX XX XY Form Br using the few dominant eigenvectors of Q Compute the new parameter set Z=Br X and the inverse transform Express the signal arrival time using Z and G global local Xi TZ T T T T T ATk Mk kgg AG k cktzi Zi T BkTZi Recover parameters 5.68

69 Propagation of reduced parameters The signal arrival time ATk can be converted to: T T T T ATk Mk kgg AG k c k Zi Zi B kzi global Moment matching based Max operation can be performed for G and Z local Parameter reduction between partitions Propagation partition n partition n

70 Example: partitioned by logic level Input Level 1 Level 2 Level 3 G1 1 G10 6 G22 G7 3 G16 G3 G6 2 G11 5 G23 G2 4 G19 AT 2 lev lev1 AT lev 2 G, Xloc, Zredu lev1 lev1 G, Xloc,0 RRR RRR AT 3 G, X, Z lev3 lev2 lev loc redu RRR 5.70

71 Results: impact of local process variations ISCAS85-c880 ckt # of Part. # of local # of total variables variables c x MC. w/ All Vars. MC. w/o Loc.Vars. SSTA. via RRR 3 PDF Delay (ps) of c880. PDFs of ISCAS c880: errors by neglecting local variation sources 5.71

72 Results: impact of local process variations c5315 ckt # of Part. # of local # of total variables variables c x 10 3 MC. w/ All Vars. MC. w/o Loc.Vars. SSTA. via RRR PDF Delay (ps) of c5315. PDFs of ISCAS c5315: errors by neglecting local variation sources

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