II/IV B.Tech. DEGREE EXAMINATIONS, NOV/DEC-2017

Size: px

Start display at page:

Download "II/IV B.Tech. DEGREE EXAMINATIONS, NOV/DEC-2017"

Milo Baldwin
6 years ago
Views:

1 CSE/IT 213 (CR) Total No. of Questions :09] [Total No. of Pages : 03 II/IV B.Tech. DEGREE EXAMINATIONS, NOV/DEC-2017 First Semester CSE/IT BASIC ELECTRICAL AND ELECTRONICS ENGINEERING Time: Three Hours Maximum marks:70 Answer Question No.1 Compulsory 7X2=14 M Answer ONE Question from each Unit 4X14=56 M 1. a) State Ohm s Law and Kirchoff s voltage law. b) What is a Zener diode. c) Efficiency of transformer d) Early effect w.r.to transistor e) Peak inverse voltage, maximum power rating with reference to pn junction diode. f) What is the ratio of current for a forward bias of 0.05 V to the current for the same magnitude, reverse bias? g) Open loop gain UNIT-I 2. a) In the network shown in figure, find all branch currents and voltage drops across all resistors. b) Determine the voltage V AB in the circuit shown in the figure: P.T.O 1

2 3. a) Explain about series circuits and parallel circuits with examples. b) Write down the KVL for the given circuits. UNIT-II 4. a) State and explain Norton s theorem. b) For the circuit shown in the following figure, find the value of current through I ohm in the arm PQ using Thevenin s theorem. 5. a) Explain clearly about Star-Delta Transformation. b) State and explain reciprocity theorem. UNIT-III 6. a) Compare the merits and drawbacks of FET and BJT. b) Sketch the basic structure of an n-channel JFET. c) Define the pinch off voltage VP and sketch the depletion region before and after pinch-off and explain the reason. 2 P.T.O

3 7. a) Draw the circuit diagram of a fixed bias circuit and derive the expression for stability factor S. Why this circuit is thermally not stable? Explain. b) An n-p-n transistor with =50 is used in a CE circuit with V CC =10 V, R C =2K. The bias is obtained by connecting a 100K resistance from collector to base. Assume V BE =0V. Find i) the Quiescent point. ii) the Stability factor S. UNIT-IV 8. a) With the help of neat circuit diagram, explain the following applications of OP- AMP. i) Multiplier ii) Differentiator iii) Subtractor. b) Which configuration is called Emitter follower? Explain with a suitable circuit diagram. Explain how the input and output characteristics are obtained? 9. a) Draw the circuit diagram for R-C phase shift oscillator and identify the important blocks of an oscillator from the circuit. what type of positive feedback is incorporated in the circuit? Give the expression for frequecy of oscillations. b) Design a scaling adder circuit using OP-AMP, to give the output voltage V 0 =-(3V 1 +4V 2 +5V 3 ), where V 1,V 2 and V 3 are the input voltages given to the circuit. 3

4 CSE/IT 213 (R-15) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, NOV/DEC-2017 First Semester CSE/IT OPERATING SYSTEMS Time: Three Hours Answer Question No.1 Compulsory Answer ONE Question from each Unit Maximum marks:60 6X2=12 M 4X12=48 M 1. a) Features of time sharing systems b) System Boot. c) Threading issues d) Purpose of memory swapping e) Atomic transaction f) File sharing UNIT-I 2. a) Explain various operations on threads and discuss about threads synchronization. b) Write a brief on communication in client server systems. 3. a) What is a process? Explain different process states and how state transition happens. b) Give a brief on types of system calls. UNIT-II 4. What is Semaphore? Define the Binary Semaphore primitives and explain Semaphore mechanism with an example. 5. What are the different process scheduling criteria and explain any of the two scheduling algorithms with suitable example for each. UNIT-III 6. How the problem among dining philosophers can be resolved? Suggest a suitable algorithm and explain the same. 1 P.T.O

5 7. Define paging and its purpose. Consider the reference string. 7,0,1,2,0,3,0,4,2,3,0,3, 2,1,2,0,1,7,0,1 for a memory with three frames. Give a trace of FIFO, Optimal, and LRU page replacement algorithms. UNIT-IV 8. a) Explain File Free Space management approaches. b) Write a brief on Application I/O interface and Kernel I/O interface. 9. a) Explain various file access methods with suitable examples. b) Explain any two of the disk scheduling algorithms with suitable example for each. 2

6 CSE / IT 213 Total No. of Questions : 09 ] [ Total No.of Pages : 02 II/IV B. Tech. DEGREE EXAMINATIONS, JUNE / JULY 2017 First Semester CSE / IT OPERATING SYSTEMS Time : Three Hours Maximum Marks : Explain the following : a) Threads. b) Thrashing. c) Page fault. d) Copy on write. e) Spoofing. f) Atomic transaction. 2. Explain a) Virtual machines. b) Types of system calls. 3. a) Explain shared memory. b) Describe RPC. Answer Question No. 1 Compulsory. 6x2=12 M Answer ONE question from each Unit. 4x12=48 M UNIT - I UNIT - II 4. a) Discuss about FCFS scheduling algorithm with an example. b) Describe multithreading models. P.T.O.

7 5. a) Describe the critical section problem. CSE / IT 213 b) Discuss Peterson's solutions for synchronization. UNIT - III 6. Explain Banker's algorithm with an example. 7. Explain a) Demand Paging. b) Segmentation. UNIT - IV 8. a) Explain file system mounting. b) Discuss any one file allocation method. 9. a) Explain about magnetic disks. b) Discuss about RAID. 2

8 CS/IT 213 (CR) Total No. of Questions : 09 ] [ Total No.of Pages : 03 II/IV B. Tech. DEGREE EXAMINATIONS, JUNE / JULY 2017 First Semester CS / IT BASIC ELECTRICAL AND ELECTRONICS ENGINEERING Time : Three Hours Maximum Marks : 70 Answer Question No. 1 Compulsory. 7x2=14 M Answer ONE question from each Unit. 4x14=56 M 1. a) Compare the commonly used three phase connections. b) Active and passive circuit elements. c) Define slip. d) Maximum forward current w.r. to pn junction diode. e) Transistor operations. f) Define feedback factor. g) How does negative feedback reduce the distortion in amplifiers? UNIT - I 2. a) What are the different types of elements that constitute an electric circuit? Explain. b) Three resistors R1, R2 and R3 are connected in series with a constant voltage source of 0V volts. The voltage across R1 is 4V, power loss in R2 is 16W and the value of R3 is 6. If the current flowing through the circuit is 2A, Find the voltage V. 3. State Ohm's law and Kirchoff's voltage law. Find the potential difference V AB in the circuit shown in figure using Kirchoff's laws. P.T.O.

9 CS/IT 213 (CR) UNIT - II 4. a) Write a brief on series and parallel resonance circuits and give example diagrams for each. b) What are the dependent, Independent source. Explain. 5. For the trapezoidal waveform shown in the following figure, determine Average and rms values, Form factor, Peak factor. UNIT - III 6. a) Compare half wave. Center tapped full wave and bridge rectifiers. b) A HWR has a load of 3.5 kw. If the diode resistance and secondary coil resistance together have a resistance of 800 and the input voltage has a signal voltage of peak value 240 V, Calculate (i) Peak, average and RMS value of current flowing. (ii) DC power output. (iii) Ac power unit. (iv) Efficiency of the rectifier. 2

10 CS/IT 213 (CR) 7. a) Draw the circuit of a transistor (n-p-n) in the CB configuration. Sketch the input & output characteristics and explain the shape of the curves qualitatively. b) Draw the circuit diagram of full wave rectifier having two diodes and explain its operation. UNIT - IV 8. a) Compare the differences between voltage amplifiers and power amplifiers. b) Show that the maximum theoretical efficiency of class B push-pull amplifiers is 78.5%. c) Explain in brief the applications of OP-AMP. 9. a) Draw the circuit diagram of Wien bridge oscillator using BJT. Show that the gain of the amplifier must be at least 3 for the oscillations to occur. b) Draw the circuit of a transformer coupled power amplifier and explain its operations with help of load-line analysis. 3

11 CS/IT 213 (RR) Total No. of Questions : 09 ] [ Total No.of Pages : 02 II/IV B. Tech. DEGREE EXAMINATIONS, JUNE / JULY 2017 First Semester CS / IT DIGITAL LOGIC DESIGN Time : Three Hours Maximum Marks : 70 Answer Question No. 1 Compulsory. 7x2=14 M Answer ONE question from each Unit. 4x14=56 M 1. a) Truth table of NAND and NOR gates. b) Convert (157) 8 to binary. c) Hamming distance. d) Design of SR latch. e) Perform the BCD arithmetic f) Characteristics of EEPROM. g) Purpose of registers. UNIT - I 2. a) Write a brief on fixed and floating point representation and explain their representation with suitable example. b) Simplify the following Boolean expression to a minimum number of literals and draw the circuit diagram. (i) F = (B C + A D) (A B + C D) (ii) F = WYZ + XY + XZ + YZ 3. a) Convert the following number with indicated bases to decimal (i) ( ) 2 (ii) (A 3 B) 16 (iii) (2 3 7) 8 (iv) (4 3) 5 b) A 12-bit Hamming code word containing 8-bits of data and 4 parity bits is read from memory. What was the original 8-bit data word that was written in to memory if 12-bit words read out is as follows : (i) (ii) P.T.O.

12 CS/IT 213 (RR) UNIT - II 4. Give the design of a full adder and design a 4-bit parallel adder and explain its functioning. 5. a) Give the design of a 3X8 decoder and explain its functioning. b) Explain the functioning of a full subtractor with its truth table and circuit diagram. 6. Convert the following : UNIT - III (i) J-K flip-flop to T-flip-flop (iii) J-K flip-flop to D-flip-flop (ii) R-S flip-flop to J-K-flip-flop. (iv) R-S flip-flop to D-flip-flop. 7. A sequential circuit with 3 D-flip-flops A, B and C has only one input 'X' and one output 'X' with following relationship D A = B XOR C XOR X, D B = A, D C = B. a) Draw the logic diagram of the circuit. b) Obtain logic diagram, state table and state diagram. UNIT - IV 8. a) Explain the construction of a basic memory cell and also explain with diagram the construction of a 4 X 4 RAM. b) Design a 4-bit ring counter using T - flip flops and draw the circuit diagram and timing diagrams. 9. a) Draw the block diagram and explain the operation of serial transfer between two shift registers and draw its timing diagram. b) Write a brief on PLA and PAL. 2

EC/EE DIGITAL ELECTRONICS

EC/EE 214(R-15) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, DECEMBER- 2016 First Semester EC/EE DIGITAL ELECTRONICS Time: Three Hours 1. a) Define Encoder Answer