CMPE12  Notes chapter 1. Digital Logic. (Textbook Chapter 3)


 Terence Clarke
 11 months ago
 Views:
Transcription
1 CMPE12  Notes chapter 1 Digital Logic (Textbook Chapter 3)
2 Transistor: Building Block of Computers Microprocessors contain TONS of transistors Intel Montecito (2005): 1.72 billion Intel Pentium 4 (2000): 48 million IBM PowerPC 750FX (2002): 38 million IBM/Apple PowerPC G5 (2003): 58 million Intel 8080 (1974): 6000 Intel 4004 (1971): 2500 CMPE12 Winter 2008 J. Ferguson 22
3 Moore s Law The number of active components per chip will double every 18 months CMPE12 Winter 2008 J. Ferguson 23
4 MetalOxideSemiconductor (MOS) transistor CMPE12 Winter 2008 J. Ferguson 24
5 How big is a transistor? If a CPU die was as big as this whole classroom, a transistor would be CMPE12 Winter 2008 J. Ferguson 25
6 Transistors = switches Logically, each transistor is used as a switch Combined to implement logic functions AND, OR, NOT Combined to build higherlevel structures Adder, multiplexer, decoder, register, memory Combined to build processor LC3 CMPE12 Winter 2008 J. Ferguson 26
7 Nature of Digital Signals/Information Our world is analog: real number values of energy, mass, time. However a computer signal can only have one of two values: 0 voltage and high voltage. We will call these 0 and 1. This simplification leads to tremendous advantages for computation: detection, selfrestoration, etc. CMPE12 Winter 2008 J. Ferguson 27
8 Combinational logic is used to create a digital function CMPE12 Winter 2008 J. Ferguson 28
9 Basic one and twoinput logic gates and functions CMPE12 Winter 2008 J. Ferguson 29
10 Use transistors to make combinational logic or Simplification: one output for now CMPE12 Winter 2008 J. Ferguson 210
11 Each signal is connected to either a 0 or a 1 1 or Vcc 1 or Vcc Or But never both! 0 or Ground 0 or Ground Transistors make those paths depending the inputs to the gate! CMPE12 Winter 2008 J. Ferguson 211
12 ntype MOS transistor ntype MOS (nmos) makes path towards 0 when gate is 1. when Gate has positive voltage, short circuit between #1 and #2 (switch closed) when Gate has zero voltage (0), open circuit between #1 and #2 (switch open) Gate = 1 Gate = 0 CMPE12 Winter 2008 J. Ferguson 212
13 ptype MOS transistor ptype is complementary to ntype makes path to 1 when gate is 0 when Gate has positive voltage, open circuit between #1 and #2 (switch open) when Gate has zero voltage, short circuit between #1 and #2 (switch closed) Gate = 1 Gate = 0 CMPE12 Winter 2008 J. Ferguson 213
14 CMOS circuit Complementary MOS Uses both ntype and ptype MOS transistors ptype Connects path towards 1 when gate input is 0 ntype Connects path towards 0 when gate input is 1 CMPE12 Winter 2008 J. Ferguson 214
15 Inverter (NOT gate) In Out In Out 0 V 2.9 V V 0 V 1 0 Truth Table CMPE12 Winter 2008 J. Ferguson 215
16 Truth Table The most basic representation of a logic function. Brute force representation listing the output for all possible input combinations. CMPE12 Winter 2008 J. Ferguson 216
17 Truth table Example Inputs A B Outputs X Y 2 #inputs CMPE12 Winter 2008 J. Ferguson 217
18 Static CMOS gate rules All potential paths to Vcc (1) must go up through pmos transistors. All potential paths to Gnd (0) must go down through nmos transistors. Implication: all 1s on inputs must put 0 on output and all 0s on inputs must put 1 on output. CMPE12 Winter 2008 J. Ferguson 218
19 NAND gate (NOTAND) Note: Parallel structure on top, serial on bottom. A B C CMPE12 Winter 2008 J. Ferguson 219
20 AND gate A B 0 C Add an inverter to a NAND. CMPE12 Winter 2008 J. Ferguson 220
21 NOR gate Note: Serial structure on top, parallel on bottom. A B CMPE12 Winter 2008 J. Ferguson C
22 OR gate A B 0 C Add an inverter to a NOR gate. CMPE12 Winter 2008 J. Ferguson 222
23 Basic logic gates CMPE12 Winter 2008 J. Ferguson 223
24 Axioms of Boolean algebra 0 * 0 = = 1 * 1 = = 0 * 1 = 1 * 0 = = = = = if x = 0 then x = if x = 1 then x = CMPE12 Winter 2008 J. Ferguson 224
25 Singlevariable theorems x * 0 = x + 1 = x * 1 = x + 0 = x * x = x + x = x * x = x + x = (x ) = CMPE12 Winter 2008 J. Ferguson 225
26 Commutative: x* y = x + y = Associative x * (y * z) = x + (y + z) = Distributive x*(y + z ) = x + Y * z = Properties CMPE12 Winter 2008 J. Ferguson 226
27 More properties Absorption: x + x * Y = x * (x + y) = Combining: x * Y + x * y = (x + y) * (x + y ) = De Morgan s (x* y) = (x + y) = Other: x + x *y = x * (x + y) = CMPE12 Winter 2008 J. Ferguson 227
28 DeMorgan's Law (1/2) (A + B) = A B conversely (AB) = A + B A B A+B A A+B A B AB CMPE12 Winter 2008 J. Ferguson 228
29 DeMorgan's Law (2/2) (A + B) = A B conversely (AB) = A + B A B AB A AB A B A+B CMPE12 Winter 2008 J. Ferguson 229
30 DeMorgan's Law and SoP Turns AND/OR into NAND/NAND: CMPE12 Winter 2008 J. Ferguson 230
31 Product of Sums A second standard way of synthesizing simple circuits. Ex: A B Z CMPE12 Winter 2008 J. Ferguson 231
32 DeMorgan's Law and PoS Turns OR/AND into NOR/NOR: CMPE12 Winter 2008 J. Ferguson 232
33 DeMorgan's Law: SoP or PoS? Can also generate NOR/NOR circuits, But we prefer NAND/NAND ones. NANDs are faster CMPE12 Winter 2008 J. Ferguson 233
34 More than 2 inputs? AND/OR can take any number of inputs. AND = 1 if all inputs are 1. OR = 1 if any input is 1. Similar for NAND/NOR Can implement with multiple twoinput gates, or with single CMOS circuit. NAND?? NOR?? CMPE12 Winter 2008 J. Ferguson 234
35 CMOS 3input NAND CMPE12 Winter 2008 J. Ferguson 235
36 Example: Logic minimization A B C Y CMPE12 Winter 2008 J. Ferguson 236
37 Building functions from logic gates Combinational Logic Circuit output depends only on the current inputs stateless Sequential Logic Circuit output depends on the sequence of inputs (past and present) stores information (state) from past inputs CMPE12 Winter 2008 J. Ferguson 237
38 Diversion: Unsigned Integers Represent Positive Integers String of digits: A n1, A n2, A 1, A 0 Contribution of A X is A X * base X Values range from 0 to A n 1 Most common bases: 10, 2 CMPE12 Winter 2008 J. Ferguson 238
39 n inputs, 2 n outputs Decoder exactly one output is asserted for each possible input pattern 2to4 decoder CMPE12 Winter 2008 J. Ferguson 239
40 About the little circle It is a logical idea stating that instead of the 1 being true, a 0 is true. When in Boolean logic it can be thought of as an inverter CMPE12 Winter 2008 J. Ferguson 240
41 Decoder block A 1 A 0 Sel CMPE12 Winter 2008 J. Ferguson 241
42 Abstraction: Decoder Lowest Level (for us): CMOS transistors Highest Level: 2 n Truth Tables or Diagram of previous slide Intermediate Level: Actual Gates making up the decoder CMPE12 Winter 2008 J. Ferguson 242
43 Multiplexer 2way multiplexer: the output is equal to one of the two inputs, based on a selector S A B Z CMPE12 Winter 2008 J. Ferguson 243
44 4way multiplexer nbit selector and 2 n inputs, one output output equals one of the inputs, depending on selector 4to1 MUX CMPE12 Winter 2008 J. Ferguson 244
45 Binary addition = = = =... CMPE12 Winter 2008 J. Ferguson 245
46 Full Adder Add two bits and carryin, produce onebit sum and carryout. A B 0 0 C in 0 S C out CMPE12 Winter 2008 J. Ferguson 246
47 Fourbit Adder CMPE12 Winter 2008 J. Ferguson 247
48 Logical completeness Can implement ANY truth table with AND, OR, NOT. A B C D AND combinations that yield a "1" in the truth table. 2. OR the results of the AND gates CMPE12 Winter 2008 J. Ferguson 248
49 Recommended exercises on combinational circuits Ex 3.5, 3.6, 3.7, 3.8, 3.9 Ex 3.12, 3.13, 3.14, 3.18 Ex 3.20, 3.22, 3.23, 3.24 with TA/Tut Ex 3.30, 3.31, 3.35 Ex 3.44 CMPE12 Winter 2008 J. Ferguson 249
50 Combinational vs. sequential Combinational circuit always gives the same output for a given set of inputs ex: adder always generates sum and carry, regardless of previous inputs CMPE12 Winter 2008 J. Ferguson 250
51 Sequential circuit stores information output depends on stored information (state) plus input so a given input might produce different outputs, depending on the stored information example: ticket counter advances when you push the button output depends on previous state useful for building memory elements and state machines CMPE12 Winter 2008 J. Ferguson 251
52 An RS Latch Static Sequential circuits require feedback to hold state. S means set to 1 R means reset to 0 CMPE12 Winter 2008 J. Ferguson 252
53 An RS Latch The input S,R = 0,0 is considered illegal or undefined. SR latch CMPE12 Winter 2008 J. Ferguson 253
54 RS Latch Summary R = S = 1 hold current value in latch S = 0, R=1 set value to 1 R = 0, S = 1 set value to 0 R = S = 0 both outputs equal one final state determined which input is 0 last, so 00>11 transition is illegal. CMPE12 Winter 2008 J. Ferguson 254
55 Not all feedback circuits form latches CMPE12 Winter 2008 J. Ferguson 255
56 DLatch Two inputs: D (data) and WE (write enable) when WE = 1, latch is set to value of D S = NOT(D), R = D when WE = 0, latch holds previous value S = R = 1 the inverter and gate RS Latch CMPE12 Winter 2008 J. Ferguson 256
57 Register A register stores a multibit value. We use a collection of Dlatches, all controlled by a common WE. When WE=1, nbit value D is written to register. CMPE12 Winter 2008 J. Ferguson 257
58 Memory Now that we know how to store bits, we can build a memory a logical k m array of stored bits. Address Space: number of locations (usually a power of 2) Addressability: number of bits per location (e.g., byteaddressable) k = 2 n locations m bits CMPE12 Winter 2008 J. Ferguson 258
59 2 2 x 3 Memory address word select word WE input bits write enable address decoder output bits CMPE12 Winter 2008 J. Ferguson 259
60 More about Memory This is a not the way actual memory is implemented. fewer transistors, much more dense, relies on electrical properties But the logical structure is very similar. address decoder word select line word write enable Many kinds of RAM (Random Access Memory) CMPE12 Winter 2008 J. Ferguson 260
61 State Machine The basic type of sequential circuit Combines combinational logic with storage Remembers state, and changes output (and state) based on inputs and current state State Machine Inputs Combinational Logic Circuit Outputs Storage Elements CMPE12 Winter 2008 J. Ferguson 261
62 Combinational vs. Sequential Two types of combination locks Combinational Success depends only on the values, not the order in which they are set. Sequential Success depends on the sequence of values (e.g, R13, L22, R3). CMPE12 Winter 2008 J. Ferguson 262
63 State The state of a system is a snapshot of all the relevant elements of the system at the moment the snapshot is taken. Examples: The state of a basketball game can be represented by the scoreboard. Number of points, time remaining, possession, etc. The state of a tictactoe game can be represented by the placement of X s and O s on the board. CMPE12 Winter 2008 J. Ferguson 263
64 State of Sequential Lock Our lock example has four different states, labelled AD: A: The lock is not open, and no relevant operations have been performed. B: The lock is not open, and the user has completed the R13 operation. C: The lock is not open, and the user has completed R13, followed by L22. D:The lock is open. CMPE12 Winter 2008 J. Ferguson 264
65 State Diagram Shows states and actions that cause a transition between states. CMPE12 Winter 2008 J. Ferguson 265
66 Finite State Machine A description of a system with the following components: 1. A finite number of states 2. A finite number of external inputs 3. A finite number of external outputs 4. An explicit specification of all state transitions 5. An explicit specification of what determines each external output value Often described by a state diagram. Inputs trigger state transitions. Outputs are associated with each state (or with each transition). CMPE12 Winter 2008 J. Ferguson 266
67 The Clock Frequently, a clock circuit triggers transition from one state to the next. 1 0 One Cycle time At the beginning of each clock cycle, state machine makes a transition, based on the current state and the external inputs. Not always required. In lock example, the input itself triggers a transition. CMPE12 Winter 2008 J. Ferguson 267
68 Implementing a Finite State Machine Combinational logic Determine outputs and next state. Storage elements Maintain state representation. State Machine Inputs Combinational Logic Circuit Outputs Clock Storage Elements CMPE12 Winter 2008 J. Ferguson 268
69 Example of sequential machine A 2bit counter that counts the number of times that an input is logic 1. When the counter gets to 3, it signals that it is full. State table: how many states? CMPE12 Winter 2008 J. Ferguson 269
70 Representing Multibit Values Number bits from right (0) to left (n1) just a convention  could be left to right, but must be consistent Use brackets to denote range: D[l:r] denotes bit l to bit r, from left to right 15 A = A[14:9] = A[2:0] = 101 May also see A<14:9>, especially in hardware block diagrams. CMPE12 Winter 2008 J. Ferguson 270
71 An LC3 architecture s sneak preview CMPE12 Winter 2008 J. Ferguson 271
72 LC3 Data Path Combinational Logic Storage State Machine CMPE12 Winter 2008 J. Ferguson 272
73 Recommended exercises on Sequential Circuits Ex 3.21, 3.34, 3.35 Ex 3.40, 3.41, 3.43 CMPE12 Winter 2008 J. Ferguson 273
Introduction to Computer Engineering. CS/ECE 252, Fall 2012 Prof. Guri Sohi Computer Sciences Department University of Wisconsin Madison
Introduction to Computer Engineering CS/ECE 252, Fall 2012 Prof. Guri Sohi Computer Sciences Department University of Wisconsin Madison Chapter 3 Digital Logic Structures Slides based on set prepared by
More informationDigital Logic: Boolean Algebra and Gates. Textbook Chapter 3
Digital Logic: Boolean Algebra and Gates Textbook Chapter 3 Basic Logic Gates XOR CMPE12 Summer 2009 022 Truth Table The most basic representation of a logic function Lists the output for all possible
More informationDigital Logic. CS211 Computer Architecture. l Topics. l Transistors (Design & Types) l Logic Gates. l Combinational Circuits.
CS211 Computer Architecture Digital Logic l Topics l Transistors (Design & Types) l Logic Gates l Combinational Circuits l KMaps Figures & Tables borrowed from:! http://www.allaboutcircuits.com/vol_4/index.html!
More informationBoolean Algebra and Digital Logic 2009, University of Colombo School of Computing
IT 204 Section 3.0 Boolean Algebra and Digital Logic Boolean Algebra 2 Logic Equations to Truth Tables X = A. B + A. B + AB A B X 0 0 0 0 3 Sum of Products The OR operation performed on the products of
More informationFloating Point Representation and Digital Logic. Lecture 11 CS301
Floating Point Representation and Digital Logic Lecture 11 CS301 Administrative Daily Review of today s lecture w Due tomorrow (10/4) at 8am Lab #3 due Friday (9/7) 1:29pm HW #5 assigned w Due Monday 10/8
More informationCombinational vs. Sequential. Summary of Combinational Logic. Combinational device/circuit: any circuit built using the basic gates Expressed as
Summary of Combinational Logic : Computer Architecture I Instructor: Prof. Bhagi Narahari Dept. of Computer Science Course URL: www.seas.gwu.edu/~bhagiweb/cs3/ Combinational device/circuit: any circuit
More informationCHAPTER1: Digital Logic Circuits Combination Circuits
CS224: Computer Organization S.KHABET CHAPTER1: Digital Logic Circuits Combination Circuits 1 PRIMITIVE LOGIC GATES Each of our basic operations can be implemented in hardware using a primitive logic gate.
More informationSwitches: basic element of physical implementations
Combinational logic Switches Basic logic and truth tables Logic functions Boolean algebra Proofs by rewriting and by perfect induction Winter 200 CSE370  II  Boolean Algebra Switches: basic element
More informationUNIVERSITY OF WISCONSIN MADISON
CS/ECE 252: INTRODUCTION TO COMPUTER ENGINEERING UNIVERSITY OF WISCONSIN MADISON Prof. Gurindar Sohi TAs: Minsub Shin, Lisa Ossian, Sujith Surendran Midterm Examination 2 In Class (50 minutes) Friday,
More informationDIGITAL LOGIC CIRCUITS
DIGITAL LOGIC CIRCUITS Introduction Logic Gates Boolean Algebra Map Specification Combinational Circuits FlipFlops Sequential Circuits Memory Components Integrated Circuits Digital Computers 2 LOGIC GATES
More informationDigital Electronics I
References Digital Electronics I Katz, R.H. (2004). Contemporary logic design. Benjamin/Cummings. Hayes, J.P. (1993). Introduction to digital logic design. AddisonWesley. Horowitz, P. & Hill, W. (1989).
More informationBoolean Algebra. Digital Logic Appendix A. Postulates, Identities in Boolean Algebra How can I manipulate expressions?
Digital Logic Appendix A Gates Combinatorial Circuits Sequential Circuits Other operations NAND A NAND B = NOT ( A ANDB) = AB NOR A NOR B = NOT ( A ORB) = A + B Truth tables What is the result of the operation
More informationChapter 2 Boolean Algebra and Logic Gates
Chapter 2 Boolean Algebra and Logic Gates The most common postulates used to formulate various algebraic structures are: 1. Closure. N={1,2,3,4 }, for any a,b N we obtain a unique c N by the operation
More informationBoolean Algebra. Digital Logic Appendix A. Boolean Algebra Other operations. Boolean Algebra. Postulates, Identities in Boolean Algebra
Digital Logic Appendix A Gates Combinatorial Circuits Sequential Circuits George Boole ideas 1854 Claude Shannon, apply to circuit design, 1938 (piirisuunnittelu) Describe digital circuitry function programming
More informationSample Test Paper  I
Scheme G Sample Test Paper  I Course Name : Computer Engineering Group Marks : 25 Hours: 1 Hrs. Q.1) Attempt any THREE: 09 Marks a) Define i) Propagation delay ii) Fanin iii) Fanout b) Convert the following:
More informationAdders, subtractors comparators, multipliers and other ALU elements
CSE4: Components and Design Techniques for Digital Systems Adders, subtractors comparators, multipliers and other ALU elements Instructor: Mohsen Imani UC San Diego Slides from: Prof.Tajana Simunic Rosing
More informationDept. of ECE, CIT, Gubbi Page 1
Verification: 1) A.B = A + B 7404 7404 7404 A B A.B A.B 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 A B A B A + B 0 0 1 1 1 0 1 1 0 1 1 0 0 1 1 1 1 0 0 0 2) A+B = A. B 7404 7404 7404 A B A+B A+B 0 0 0 1 0 1 1 0 1
More informationStatic CMOS Circuits. Example 1
Static CMOS Circuits Conventional (ratioless) static CMOS Covered so far Ratioed logic (depletion load, pseudo nmos) Pass transistor logic ECE 261 Krish Chakrabarty 1 Example 1 module mux(input s, d0,
More informationCS/COE0447: Computer Organization
Logic design? CS/COE0447: Computer Organization and Assembly Language Logic Design Review Digital hardware is implemented by way of logic design Digital circuits process and produce two discrete values:
More informationLecture A: Logic Design and Gates
Lecture A: Logic Design and Gates Syllabus My office hours 9.1510.35am T,Th or gchoi@ece.tamu.edu 333G WERC Text: Brown and Vranesic Fundamentals of Digital Logic,» Buy it.. Or borrow it» Other book:
More informationReg. No. Question Paper Code : B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER Second Semester. Computer Science and Engineering
Sp 6 Reg. No. Question Paper Code : 27156 B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2015. Second Semester Computer Science and Engineering CS 6201 DIGITAL PRINCIPLES AND SYSTEM DESIGN (Common
More informationDigital electronics form a class of circuitry where the ability of the electronics to process data is the primary focus.
Chapter 2 Digital Electronics Objectives 1. Understand the operation of basic digital electronic devices. 2. Understand how to describe circuits which can process digital data. 3. Understand how to design
More informationKUMARAGURU COLLEGE OF TECHNOLOGY COIMBATORE
Estd1984 KUMARAGURU COLLEGE OF TECHNOLOGY COIMBATORE 641 006 QUESTION BANK UNIT I PART A ISO 9001:2000 Certified 1. Convert (100001110.010) 2 to a decimal number. 2. Find the canonical SOP for the function
More informationLecture 3 Review on Digital Logic (Part 2)
Lecture 3 Review on Digital Logic (Part 2) Xuan Silvia Zhang Washington University in St. Louis http://classes.engineering.wustl.edu/ese461/ ircuit Optimization Simplest implementation ost criterion literal
More informationSIR C.R.REDDY COLLEGE OF ENGINEERING ELURU DIGITAL INTEGRATED CIRCUITS (DIC) LABORATORY MANUAL III / IV B.E. (ECE) : I  SEMESTER
SIR C.R.REDDY COLLEGE OF ENGINEERING ELURU 534 007 DIGITAL INTEGRATED CIRCUITS (DIC) LABORATORY MANUAL III / IV B.E. (ECE) : I  SEMESTER DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING DIGITAL
More informationChap 2. Combinational Logic Circuits
Overview 2 Chap 2. Combinational Logic Circuits Spring 24 Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard Forms Part 2 Circuit Optimization TwoLevel Optimization
More informationChapter 2: Boolean Algebra and Logic Gates
Chapter 2: Boolean Algebra and Logic Gates Mathematical methods that simplify binary logics or circuits rely primarily on Boolean algebra. Boolean algebra: a set of elements, a set of operators, and a
More informationUNIT 8A Computer Circuitry: Layers of Abstraction. Boolean Logic & Truth Tables
UNIT 8 Computer Circuitry: Layers of bstraction 1 oolean Logic & Truth Tables Computer circuitry works based on oolean logic: operations on true (1) and false (0) values. ( ND ) (Ruby: && ) 0 0 0 0 0 1
More informationMemory, Latches, & Registers
Memory, Latches, & Registers 1) Structured Logic Arrays 2) Memory Arrays 3) Transparent Latches 4) How to save a few bucks at toll booths 5) Edgetriggered Registers L13 Memory 1 General Table Lookup Synthesis
More informationBoolean Algebra, Gates and Circuits
Boolean Algebra, Gates and Circuits Kasper Brink November 21, 2017 (Images taken from Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc.) Outline Last week: Von
More informationLecture 14: State Tables, Diagrams, Latches, and Flip Flop
EE210: Switching Systems Lecture 14: State Tables, Diagrams, Latches, and Flip Flop Prof. YingLi Tian Nov. 6, 2017 Department of Electrical Engineering The City College of New York The City University
More informationLecture 10: Synchronous Sequential Circuits Design
Lecture 0: Synchronous Sequential Circuits Design. General Form Input Combinational Flipflops Combinational Output Circuit Circuit Clock.. Moore type has outputs dependent only on the state, e.g. ripple
More informationEE141Microelettronica. CMOS Logic
Microelettronica CMOS Logic CMOS logic Power consumption in CMOS logic gates Where Does Power Go in CMOS? Dynamic Power Consumption Charging and Discharging Capacitors Short Circuit Currents Short Circuit
More informationEECS150  Digital Design Lecture 23  FFs revisited, FIFOs, ECCs, LSFRs. Crosscoupled NOR gates
EECS150  Digital Design Lecture 23  FFs revisited, FIFOs, ECCs, LSFRs April 16, 2009 John Wawrzynek Spring 2009 EECS150  Lec24blocks Page 1 Crosscoupled NOR gates remember, If both R=0 & S=0, then
More informationComputer Science. 19. Combinational Circuits. Computer Science COMPUTER SCIENCE. Section 6.1.
COMPUTER SCIENCE S E D G E W I C K / W A Y N E PA R T I I : A L G O R I T H M S, M A C H I N E S, a n d T H E O R Y Computer Science Computer Science An Interdisciplinary Approach Section 6.1 ROBERT SEDGEWICK
More informationImplementation of Boolean Logic by Digital Circuits
Implementation of Boolean Logic by Digital Circuits We now consider the use of electronic circuits to implement Boolean functions and arithmetic functions that can be derived from these Boolean functions.
More informationLecture 2 Review on Digital Logic (Part 1)
Lecture 2 Review on Digital Logic (Part 1) Xuan Silvia Zhang Washington University in St. Louis http://classes.engineering.wustl.edu/ese461/ Grading Engagement 5% Review Quiz 10% Homework 10% Labs 40%
More informationContents. Chapter 3 Combinational Circuits Page 1 of 36
Chapter 3 Combinational Circuits Page of 36 Contents Combinational Circuits...2 3. Analysis of Combinational Circuits...3 3.. Using a Truth Table...3 3..2 Using a Boolean Function...6 3.2 Synthesis of
More informationCMPEN 411 VLSI Digital Circuits Spring Lecture 21: Shifters, Decoders, Muxes
CMPEN 411 VLSI Digital Circuits Spring 2011 Lecture 21: Shifters, Decoders, Muxes [Adapted from Rabaey s Digital Integrated Circuits, Second Edition, 2003 J. Rabaey, A. Chandrakasan, B. Nikolic] Sp11 CMPEN
More informationBoolean algebra. Examples of these individual laws of Boolean, rules and theorems for Boolean algebra are given in the following table.
The Laws of Boolean Boolean algebra As well as the logic symbols 0 and 1 being used to represent a digital input or output, we can also use them as constants for a permanently Open or Closed circuit or
More informationChapter 1. Binary Systems 11. Outline. ! Introductions. ! Number Base Conversions. ! Binary Arithmetic. ! Binary Codes. ! Binary Elements 12
Chapter 1 Binary Systems 11 Outline! Introductions! Number Base Conversions! Binary Arithmetic! Binary Codes! Binary Elements 12 3C Integration 傳輸與介面 IA Connecting 聲音與影像 Consumer Screen Phone Set Top
More informationBoolean Algebra. The Building Blocks of Digital Logic Design. Section. Section Overview. Binary Operations and Their Representation.
Section 3 Boolean Algebra The Building Blocks of Digital Logic Design Section Overview Binary Operations (AND, OR, NOT), Basic laws, Proof by Perfect Induction, De Morgan s Theorem, Canonical and Standard
More informationDigital Electronics Final Examination. Part A
Digital Electronics Final Examination Part A Spring 2009 Student Name: Date: Class Period: Total Points: /50 Converted Score: /40 Page 1 of 13 Directions: This is a CLOSED BOOK/CLOSED NOTES exam. Select
More informationFor smaller NRE cost For faster time to market For smaller highvolume manufacturing cost For higher performance
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences EECS5 J. Wawrzynek Spring 22 2/22/2. [2 pts] Short Answers. Midterm Exam I a) [2 pts]
More informationDigital Electronics Circuits 2017
JSS SCIENCE AND TECHNOLOGY UNIVERSITY Digital Electronics Circuits (EC37L) Lab incharge: Dr. Shankraiah Course outcomes: After the completion of laboratory the student will be able to, 1. Simplify, design
More informationUsing the NOT realization from the NAND, we can NOT the output of the NAND gate making it a NOT NOT AND or simply an AND gate.
CSC 216 NAND/NOR Equivalents and Flip/Flops Dr. Anthony S. Pyzdrowski 10/28/2016 The NAND gate is a NOT AND gate. It is false when all inputs are true and true otherwise. The NOR gate is a NOT OR gate.
More informationLearning Objectives 10/7/2010. CE 411 Digital System Design. Fundamental of Logic Design. Review the basic concepts of logic circuits. Dr.
/7/ CE 4 Digital ystem Design Dr. Arshad Aziz Fundamental of ogic Design earning Objectives Review the basic concepts of logic circuits Variables and functions Boolean algebra Minterms and materms ogic
More informationComputer organization
Computer organization Levels of abstraction Assembler Simulator Applications C C++ Java Highlevel language SOFTWARE add lw ori Assembly language Goal 0000 0001 0000 1001 0101 Machine instructions/data
More information1.10 (a) Function of AND, OR, NOT, NAND & NOR Logic gates and their input/output.
Chapter 1.10 Logic Gates 1.10 (a) Function of AND, OR, NOT, NAND & NOR Logic gates and their input/output. Microprocessors are the central hardware that runs computers. There are several components that
More informationof Digital Electronics
26 Digital Electronics 729 Digital Electronics 26.1 Analog and Digital Signals 26.3 Binary Number System 26.5 Decimal to Binary Conversion 26.7 Octal Number System 26.9 BinaryCoded Decimal Code (BCD Code)
More informationECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN. Week 9 Dr. Srinivas Shakkottai Dept. of Electrical and Computer Engineering
ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN Week 9 Dr. Srinivas Shakkottai Dept. of Electrical and Computer Engineering TIMING ANALYSIS Overview Circuits do not respond instantaneously to input changes
More informationLECTURE 28. Analyzing digital computation at a very low level! The Latch Pipelined Datapath Control Signals Concept of State
Today LECTURE 28 Analyzing digital computation at a very low level! The Latch Pipelined Datapath Control Signals Concept of State Time permitting, RC circuits (where we intentionally put in resistance
More informationAppendix A: Digital Logic. CPSC 352 Computer Organization
 CPSC 352 Computer Organization 2 Chapter Contents. Introduction.2 Combinational Logic.3 Truth Tables.4 Logic Gates.5 Properties of oolean lgebra.6 The SumofProducts Form, and Logic Diagrams.7 The
More informationSemiconductor Memory Classification
Semiconductor Memory Classification ReadWrite Memory NonVolatile ReadWrite Memory ReadOnly Memory Random Access NonRandom Access EPROM E 2 PROM MaskProgrammed Programmable (PROM) SRAM FIFO FLASH
More informationFunctions. Computers take inputs and produce outputs, just like functions in math! Mathematical functions can be expressed in two ways:
Boolean Algebra (1) Functions Computers take inputs and produce outputs, just like functions in math! Mathematical functions can be expressed in two ways: An expression is finite but not unique f(x,y)
More informationDesign of Sequential Circuits
Design of Sequential Circuits Seven Steps: Construct a state diagram (showing contents of flip flop and inputs with next state) Assign letter variables to each flip flop and each input and output variable
More informationDIGITAL LOGIC CIRCUITS
DIGITAL LOGIC CIRCUITS Digital logic circuits BINARY NUMBER SYSTEM electronic circuits that handle information encoded in binary form (deal with signals that have only two values, and ) Digital. computers,
More informationChapter 5. Digital systems. 5.1 Boolean algebra Negation, conjunction and disjunction
Chapter 5 igital systems digital system is any machine that processes information encoded in the form of digits. Modern digital systems use binary digits, encoded as voltage levels. Two voltage levels,
More informationcontrol in out in out Figure 1. Binary switch: (a) opened or off; (b) closed or on.
Chapter 2 Digital Circuits Page 1 of 18 2. Digital Circuits Our world is an analog world. Measurements that we make of the physical objects around us are never in discrete units but rather in a continuous
More informationDigital Integrated Circuits A Design Perspective
Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic Designing Sequential Logic Circuits November 2002 Sequential Logic Inputs Current State COMBINATIONAL
More informationPart 1: Digital Logic and Gates. Analog vs. Digital waveforms. The digital advantage. In real life...
Part 1: Digital Logic and Gates Analog vs Digital waveforms An analog signal assumes a continuous range of values: v(t) ANALOG A digital signal assumes discrete (isolated, separate) values Usually there
More informationKINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK
KINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK SUBJECT CODE: EC 1354 SUB.NAME : VLSI DESIGN YEAR / SEMESTER: III / VI UNIT I MOS TRANSISTOR THEORY AND
More informationENGG 1203 Tutorial_9  Review. Boolean Algebra. Simplifying Logic Circuits. Combinational Logic. 1. Combinational & Sequential Logic
ENGG 1203 Tutorial_9  Review Boolean Algebra 1. Combinational & Sequential Logic 2. Computer Systems 3. Electronic Circuits 4. Signals, Systems, and Control Remark : Multiple Choice Questions : ** Check
More informationStandard Expression Forms
ThisLecture will cover the following points: Canonical and Standard Forms MinTerms and MaxTerms Digital Logic Families 24 March 2010 Standard Expression Forms Two standard (canonical) expression forms
More informationGates and FlipFlops
Gates and FlipFlops Chris Kervick (11355511) With Evan Sheridan and Tom Power December 2012 On a scale of 1 to 10, how likely is it that this question is using binary?...4? What s a 4? Abstract The operation
More informationDecoding A Counter. svbitec.wordpress.com 1
ecoding A ounter ecoding a counter involves determining which state in the sequence the counter is in. ifferentiate between activehigh and activelow decoding. ActiveHIGH decoding: output HIGH if the
More informationL2: Combinational Logic Design (Construction and Boolean Algebra)
L2: Combinational Logic Design (Construction and Boolean Algebra) Acknowledgements: Lecture material adapted from Chapter 2 of R. Katz, G. Borriello, Contemporary Logic Design (second edition), Pearson
More informationBoolean Algebra. Philipp Koehn. 9 September 2016
Boolean Algebra Philipp Koehn 9 September 2016 Core Boolean Operators 1 AND OR NOT A B A and B 0 0 0 0 1 0 1 0 0 1 1 1 A B A or B 0 0 0 0 1 1 1 0 1 1 1 1 A not A 0 1 1 0 AND OR NOT 2 Boolean algebra Boolean
More informationDigital Electronics Sequential Logic
/5/27 igital Electronics Sequential Logic r. I. J. Wassell Sequential Logic The logic circuits discussed previously are known as combinational, in that the output depends only on the condition of the latest
More informationAppendix A: Digital Logic. Principles of Computer Architecture. Principles of Computer Architecture by M. Murdocca and V. Heuring
 Principles of Computer rchitecture Miles Murdocca and Vincent Heuring 999 M. Murdocca and V. Heuring 2 Chapter Contents. Introduction.2 Combinational Logic.3 Truth Tables.4 Logic Gates.5 Properties
More informationComputer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: Digital Logic
Computer Science 324 Computer Architecture Mount Holyoke College Fall 2007 Topic Notes: Digital Logic Our goal for the next few weeks is to paint a a reasonably complete picture of how we can go from transistor
More informationShift Register Counters
Shift Register Counters Shift register counter: a shift register with the serial output connected back to the serial input. They are classified as counters because they give a specified sequence of states.
More informationCombinational Logic Design Principles
Combinational Logic Design Principles Switching algebra Doru Todinca Department of Computers Politehnica University of Timisoara Outline Introduction Switching algebra Axioms of switching algebra Theorems
More informationOutcomes. Spiral 1 / Unit 5. Logic Function Synthesis KARNAUGH MAPS. Karnaugh Maps
. . Spiral / Unit Mark Redekopp Outcomes I know the difference between combinational and sequential logic and can name examples of each. I understand latency, throughput, and at least technique to improve
More informationBoolean Algebra & Logic Gates. By : Ali Mustafa
Boolean Algebra & Logic Gates By : Ali Mustafa Digital Logic Gates There are three fundamental logical operations, from which all other functions, no matter how complex, can be derived. These Basic functions
More informationUC Berkeley College of Engineering, EECS Department CS61C: Representations of Combinational Logic Circuits
2 Wawrzynek, Garcia 2004 c UCB UC Berkeley College of Engineering, EECS Department CS61C: Representations of Combinational Logic Circuits 1 Introduction Original document by J. Wawrzynek (20031115) Revised
More informationENGG 1203 Tutorial _03 Laboratory 3 Build a ball counter. Lab 3. Lab 3 Gate Timing. Lab 3 Steps in designing a State Machine. Timing diagram of a DFF
ENGG 1203 Tutorial _03 Laboratory 3 Build a ball counter Timing diagram of a DFF Lab 3 Gate Timing difference timing for difference kind of gate, cost dependence (1) Setup Time = t2t1 (2) Propagation
More informationSpiral 1 / Unit 5. Karnaugh Maps
. Spiral / Unit Karnaugh Maps . Outcomes I know the difference between combinational and sequential logic and can name examples of each. I understand latency, throughput, and at least technique to improve
More informationFrom Sequential Circuits to Real Computers
1 / 36 From Sequential Circuits to Real Computers Lecturer: Guillaume Beslon Original Author: Lionel Morel Computer Science and Information Technologies  INSA Lyon Fall 2017 2 / 36 Introduction What we
More informationENGIN 112 Intro to Electrical and Computer Engineering
ENGIN 112 Intro to Electrical and Computer Engineering Lecture 17 Encoders and Decoders Overview Binary decoders Converts an nbit code to a single active output Can be developed using AND/OR gates Can
More informationCombinational Logic. By : Ali Mustafa
Combinational Logic By : Ali Mustafa Contents Adder Subtractor Multiplier Comparator Decoder Encoder Multiplexer How to Analyze any combinational circuit like this? Analysis Procedure To obtain the output
More information14:332:231 DIGITAL LOGIC DESIGN. Organizational Matters (1)
4:332:23 DIGITAL LOGIC DESIGN Ivan Marsic, Rutgers University Electrical & Computer Engineering Fall 23 Organizational Matters () Instructor: Ivan MARSIC Office: CoRE Building, room 7 Email: marsic@ece.rutgers.edu
More informationHakim Weatherspoon CS 3410 Computer Science Cornell University
Hakim Weatherspoon CS 3410 Computer Science Cornell University The slides are the product of many rounds of teaching CS 3410 by Professors Weatherspoon, Bala, Bracy, and Sirer. memory inst 32 register
More informationCs302 Quiz for MID TERM Exam Solved
Question # 1 of 10 ( Start time: 01:30:33 PM ) Total Marks: 1 Caveman used a number system that has distinct shapes: 4 5 6 7 Question # 2 of 10 ( Start time: 01:31:25 PM ) Total Marks: 1 TTL based devices
More informationSimplifying Logic Circuits with Karnaugh Maps
Simplifying Logic Circuits with Karnaugh Maps The circuit at the top right is the logic equivalent of the Boolean expression: f = abc + abc + abc Now, as we have seen, this expression can be simplified
More informationGates and Logic: From switches to Transistors, Logic Gates and Logic Circuits
Gates and Logic: From switches to Transistors, Logic Gates and Logic Circuits Hakim Weatherspoon CS 3410, Spring 2013 Computer Science Cornell University See: P&H ppendix C.2 and C.3 (lso, see C.0 and
More informationPropositional Logic. Logical Expressions. Logic Minimization. CNF and DNF. Algebraic Laws for Logical Expressions CSC 173
Propositional Logic CSC 17 Propositional logic mathematical model (or algebra) for reasoning about the truth of logical expressions (propositions) Logical expressions propositional variables or logical
More informationNumbers and Arithmetic
Numbers and Arithmetic See: P&H Chapter 2.4 2.6, 3.2, C.5 C.6 Hakim Weatherspoon CS 3410, Spring 2013 Computer Science Cornell University Big Picture: Building a Processor memory inst register file alu
More informationVLSI Design I. Defect Mechanisms and Fault Models
VLSI Design I Defect Mechanisms and Fault Models He s dead Jim... Overview Defects Fault models Goal: You know the difference between design and fabrication defects. You know sources of defects and you
More informationNumbers and Arithmetic
Numbers and Arithmetic See: P&H Chapter 2.4 2.6, 3.2, C.5 C.6 Hakim Weatherspoon CS 3410, Spring 2013 Computer Science Cornell University Big Picture: Building a Processor memory inst register file alu
More informationRead this before starting!
Points missed: Student's Name: Total score: / points East Tennessee State University epartment of Computer and Information Sciences CSCI 25 (Tarnoff) Computer Organization TEST 2 for Spring Semester, 27
More information9. Datapath Design. Jacob Abraham. Department of Electrical and Computer Engineering The University of Texas at Austin VLSI Design Fall 2017
9. Datapath Design Jacob Abraham Department of Electrical and Computer Engineering The University of Texas at Austin VLSI Design Fall 2017 October 2, 2017 ECE Department, University of Texas at Austin
More informationEE141 Fall 2002 Lecture 27. Memory EE141. Announcements. We finished all the labs No homework this week Projects are due next Tuesday 9am EE141
 Fall 2002 Lecture 27 Memory Announcements We finished all the labs No homework this week Projects are due next Tuesday 9am 1 Today s Lecture Memory:» SRAM» DRAM» Flash Memory 2 Floatinggate transistor
More informationCOMBINATIONAL LOGIC FUNCTIONS
COMBINATIONAL LOGIC FUNCTIONS Digital logic circuits can be classified as either combinational or sequential circuits. A combinational circuit is one where the output at any time depends only on the present
More informationTYPICAL QUESTIONS & ANSWERS
TYPICAL QUESTIONS & ANSWERS PART  I OJECTIVE TYPE QUESTIONS Each Question carries 2 marks. Choose correct or the best alternative in the following: Q.1 The NAN gate output will be low if the two inputs
More information7. Combinational Circuits
7. Combinational Circuits Jacob Abraham Department of Electrical and Computer Engineering The University of Texas at Austin VLSI Design Fall 2017 September 25, 2017 ECE Department, University of Texas
More informationSystems I: Computer Organization and Architecture
Systems I: Computer Organization and Architecture Lecture 6  Combinational Logic Introduction A combinational circuit consists of input variables, logic gates, and output variables. The logic gates accept
More informationELEC Digital Logic Circuits Fall 2014 Switching Algebra (Chapter 2)
ELEC 2200002 Digital Logic Circuits Fall 2014 Switching Algebra (Chapter 2) Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering Auburn University, Auburn,
More informationWORKBOOK. Try Yourself Questions. Electrical Engineering Digital Electronics. Detailed Explanations of
27 WORKBOOK Detailed Eplanations of Try Yourself Questions Electrical Engineering Digital Electronics Number Systems and Codes T : Solution Converting into decimal number system 2 + 3 + 5 + 8 2 + 4 8 +
More informationCMSC 313 Lecture 25 Registers Memory Organization DRAM
CMSC 33 Lecture 25 Registers Memory Organization DRAM UMBC, CMSC33, Richard Chang A75 FourBit Register Appendix A: Digital Logic Makes use of tristate buffers so that multiple registers
More information