Single Layer Parallel Plate Chip Capacitors. for 21st Century Applications

Transcription

1 Single Layer Parallel Plate Chip Capacitors for st Century Applications Catalogue of Standard Sizes, Values, and Configurations for Class and Ceramic Dielectrics

2 Table of Contents 3 Capacitor Design Styles General Features Part Number Explanation 4 Screening Standards 3 5 Dielectric Specifications 3 6 Physical Configurations 4 7 / Dielectric / Dimension Tables A-type Hi-Q (Class ) Capacitors A-type Hi-K (Class ) Capacitors B-type Hi-Q (Class ) Capacitors B-type Hi-K (Class ) Capacitors C-type Hi-Q (Class ) Capacitors C-type Hi-K (Class ) Capacitors Typical Temperature/Aging Characteristic Graphs CONVENTIONAL FIXED VALUE SINGLE LAYER CERAMIC CAPACITORS with Thin Film Metallized Electrodes DESIGN STYLES Type A Red label Type B Blue label Type C Yellow label Top Face Bottom Face Border Electrode Fully Metallized Top Face Bottom Face Border Electrode Border Electrode Top Face Bottom Face Fully Metallized Fully Metallized Border Electrodes No Border Electrodes Electrode Metallization Scheme TiW/ Au (00µ" min) TaN/ TiW/ Au (00µ" min) TiW/ Pt/ Au (00µ" min) TaN/ TiW/ Pt/ Au (00µ" min)

3 General Features Ceramic Dielectric Tecdia produces most of the ceramic wafers used to manufacture its capacitors, using fine ceramic powders consisting of proprietary titanate (primarily with barium) formulations. A variety of dielectrics are produced from these formulations, covering a range of dielectric constant (K) values, temperature characteristics, and other properties. The products included in this catalog fall within the industry standard dielectric classes &. Tecdia also produces EIA class 4 single layer ceramic chip capacitors using grain boundry barrier layer (GBBL) technology, which are covered in our Altas product catalog. Electrode Metallization The sintered wafers are ground and polished to produce smooth, flat surfaces that are then coated with metal using dry (sputtering) metallization processes to produce electrodes with ultra low losses at microwave frequencies, and easy compression attachment of gold wires. Titanium Tungsten (TiW) is used as the base metallization layer because of its strong adhesion to the ceramic, and it has good barrier properties to prevent gold diffusion into the ceramic, providing solid stability at very high die attachment temperatures. Soldering and High Temperature Die Attachment Designs Binary, Gap and other Array Chip Capacitors ENVIRONMENTAL COMMITMENT The top or surface layer of the electrode is Gold (Au) to provide an excellent contact surface for connections, as well as having good electrical properties. For electrode designs that do not require metallization etching, Tecdia uses Platinum (Pt) between the TiW and the Au layers to improve soldering attachment if the gold leaches into solder. TiW/Pt/Au electrodes withstand die attach temperatures up to 400 C, 0 min max., and are suitable for soldering with Sn60, Sn6, and similar materials, as well as high temperature eutectic solders. Tecdia Chip Capacitors are normally constructed as nearly square chips for single values and binary arrays, and in rectangular shapes for capacitor row arrays and custom designs. They have straight, perpendicular sides and 90 corners. Tecdia uses variations in chip thickness (by grinding), as well as electrode size and dielectric constant to construct capacitors. This permits very tight capacitance tolerances to be produced in a wide scope of sizes and designs. Electrodes with Borders (Safety Margins) Tecdia has a long history of manufacturing capacitors with bare ceramic safety margins around the electrodes, and has the expertise to produce them in its full range of sizes and values, with tight tolerances. The borders help prevent short circuits (arcing at the chip edges) after die attachment, especially with conductive epoxy. The design also reduces handling damage from tweezers, and facilitates automated pick and place assembly processes. Standard binary capacitors are available in arrays of 3, 4 and 5 electrodes that share a common opposing electrode, offering convenient circuit tuneability. Twin capacitors constructed on a single rectangular chip, with the array electrodes separated an industry standard space to bridge the gap between a circuit trace provides a series connection when mounted array side down, eliminating bonding wire inductance. These gap capacitors are ideal for coupling and DC blocking applications. Tecdia also custom designs multi-pad arrays to meet a wide variety of applications. Multi-pad arrays can reduce per capacitor costs, as well as installation costs. Tecdia's environmental policy is published on our website: Our manufacturing facilites are ISO 400 certified. All our capacitors are RoHS compliant and lead free. 3 Part Number Explanation Example () Capacitor Type See page for capacitor selection () M: MIC capacitors with Thin Film Metallization (3) Capacitor Electrode Pattern S: Single G: Gap B: Binary M: Multiple (4) Industry standard code for nominal Value CODE R0:.0 pf 00: 0 pf 0: 00 pf 0: 000 pf () () (3) (4) (5) (6) (7) (8) (9) (0) () A M S 0 K K- X C K - (5) Industry standard code for Tolerance CODE Tolerance A +/ pf B +/- 0.0 pf C +/- 0.5 pf J +/- 5% K +/- 0% M +/- 0% V -0/ +00% Z -0%/ +80% S Special (6) EIA Dielectric Class See page 3 (7) Physical Configuration (- characters) for standard parts. See page 4 Note: suffixes 8, 9 & 0 only apply to custom parts; () can be added to any p/n without changing the design specifications represented by () through (0). (8) Custom Dimension X: Special thickness (t) tolerance Y: Special size (W x L) tolerance (9)* Dielectric Material Code See page 3 (0)* Measuring Frequency khz MHz () Special Requirement Packaging, Screening, etc. (Does not affect p/n design specifications) *If (8) is used, (9) & (0) are added even if there is no change from the standard.

4 4 Screening Tecdia's capacitors are designed and manufactured for a wide range of applications from high volume commercial communication systems to stringent requirements for flight and space programs. The same production processes are used for all our capacitors, whether used for "High Reliability", industrial or commercial applications. However, selection and screening criteria will vary based on procurement requirements. The screening of capacitors falls within three categories: Standard Grade, Commercial Grade, and Custom. Every wafer lot of capacitors is sample checked for mechanical and electrical properties, and each capacitor is visually inspected for acceptability. As a minimum, terminations must be capable of passing testing per MIL-STD-883, method 09 for die attachment strength, and method 0 for wire bond strength. Standard Grade capacitors undergo 00% six-sided microscopic visual inspection with full capability to comply with examinations per MIL-STD-883, Method 03, and the workmanship requirements of specifications listed in 4. below. Commercial Grade capacitors undergo 00% four-sided microscopic visual inspection with acceptance criteria less stringent than applicable for Standard Grade, but sufficient to provide high quality, economical parts. This level screening can be requested for any capacitor part number by adding a special suffix designator, e.g. -W0, at the end of the part number. Custom screening is performed based on procurement requirements. 4. Regular Scheduled Screening Characteristic Each Capacitor Each Wafer Lot Each Production Lot Standard 6 sides AQL% Visual Commercial 4 sides AQL% AQL% DF AQL% Electrical IR 0(0) DWV 0(0) Bond Pull 3(0) Terminal Strength Die Shear 3(0) High Temp (400C) Resistance 5(0) Dimension Check Length & Thickness 3(0) 4. Custom Screening Testing (as applicable to Single Layer Capacitors) MIL-C-49464/ MIL-PRF-49464/ MIL-C-5568 MIL-PRF-38534, Table C-III, Level H & K MIL-PRF-3 Customer Specifications 4 3. Test Lab Capabilities Parameter Temperature Cycling Thermal Shock Voltage Conditioning & DF IR DWV Bond Pull Die Shear Temperature coefficient limits Immersion Resistance to Solder Heat Moisture Resistance Life Humidity (Steady State) Constant Acceleration Vibration Vibration, High Frequency Vibration, Variable Frequency Test Condition MIL-STD-883/ Method 00 Cond.A/B/C MIL-STD-0/ Method 07 Cond.A/B/F MIL-STD-883/Method 05 Cond.A/B/C/F MIL-STD-0/ Method 305 MIL-STD-0/ Method 30 MIL-STD-0/ Method 30 MIL-STD-883/ Method 0 Cond.D MIL-STD-883/ Method 09 less than 3kg EIA-98/ Method 05 MIL-STD-0/ Method 04 MIL-STD-0/ Method 0 Cond.A/B/C/D MIL-STD-0/ Method 06 MIL-STD-0/ Method 08 less than or equal 50 MIL-STD-0/ Method 03 MIL-STD-883/ Method 00 Cond.A/B/C/D/E/F/G/H, Y MIL-STD-0/ Method 0 MIL-STD-0/ Method 04 Cond. A/B/C/D MIL-STD-883/ Method 007 Cond.A 5 Dielectric Specifications EIA Class 3 * 3 * 4 * 3 4 * 3 Tecdia Dielectric Material Code P A F C G D E 0 K (Nominal) ,600,800 3,400 4,500 0,000 6,000 30,000 5 C < MHz < MHz < MHz < MHz < MHz khz khz khz khz < khz < khz khz khz 5 C 0 6 M 0 6 M 0 6 M 0 6 M 0 5 M * 0 5 M 0 5 M 0 5 M 0 5 M 0 5 M 0 5 M 0 4 M 0 4 M TC 0 ± 30 ppm/ C -330 ± 60 ppm/ C -750 ± 0 ppm/ C -750 ± 0 ppm/ C -000 ± 50 ppm/ C +/- 0% +/- 5% +/- 5% +/- % +%/ -56% +%/ -8% +/- % +/- 5% Temperature Range -30 C to +05 C -30 C to +85 C -30 C to +85 C EIA TC Code * 4 C0G SH UJ UJ M3K X7P X7R X7R Y6S Y5U Y5V X7S X7R Note : Minimum C is available by special order. Note : Class 3 Dielectrics are only available for custom designs. Note 3: See ALTAS ULTRA Hi-K SLC brochure for Class 4 Dielectric Material products. Note 4: EIA-98--F 3

5 6 Physical Configurations Single Value Type A and B Chip Codes (border side displayed) V U T S 0.09 (.3 mm) 0.07 (.8 mm) 0.05 (.3 mm) 0.04 (.05 mm) R 0.00 (.5 mm) P (.0 mm) K H (.5 mm) F C (.5 mm) B (0.86 mm) 0.08 (0.7 mm) (0.3 mm) (0. mm) (.0 mm) 0.03 (0.8 mm) 0.04 (0.6 mm) (0.3 mm) 0.00 Single Value Type C Chip Codes VC UC TC SC 0.00 (.5 mm) (.0 mm) (.5 mm) (.5 mm) RC 0.00 (.5 mm) PC (.0 mm) KC HC (.5 mm) FC CC (.5 mm) BC (.0 mm) 0.03 (0.8 mm) 0.04 (0.6 mm) (0.3 mm) (.0 mm) 0.03 (0.8 mm) 0.04 (0.6 mm) (0.3 mm) 0.00 Chip Codes (Array side displayed. A & B options available for common bottom electrode) Gap Capacitors Binary Capacitors (0.8mm) (0.8mm) BG (0.5mm) (0.5mm) AG GD JD LD (0.8 mm) (0.8 mm) (0.3 mm) (0. mm) (0.mm) (0.85 mm) (0.mm) 0.04 (0.6 mm) 0.00 :: (0.9 mm) ::4 : (0.9 mm) 0.03 (0.8 mm) Typical Integrated Resistor-Capacitor (0.88 mm) 0.00 (0.05 mm) Typical Multi-Pad Row Capacitors (.4 mm) (0.9 mm) :: 4:8 : (0.30 mm) 0.05 (0.38 mm) (0.88 mm) 0.0 (0.30 mm) 0.00 (0.05 mm) Note : Electrode dimensions are typical only. All drawings are not drawn to scale. Note : Chip codes for Integrated Resistor-Capacitor and Row Capacitor are available upon request. Note 3: For further details, please contact Tecdia worldwide sales offices. 4

6 Type A High Q (Class ) Single Capacitors ( prefix AMS), Dielectric & Dimension Combinations Please add suffix-4m for part numbers. Case Code / Size in mils EIA Code in B C F H K P R S T U V 0x0 x 6x6 0x0 4x4 3x3 40x40 50x50 60x60 80x80 00x R 0. 0R Dielectric Color Index 0.3 0R3 K= R4 K= R5 K= R6 K= R8 K=80.0 R0. R.5 R5.8 R8. R.7 R R R R R R8 8. 8R Part Number Example Type A A M S 500 J T Capacitor Type:A (page ) Chip Configuration: T: x (page 4) Safety Margin around top Top: TiW/ Au, TaN/ TiW/ Au Bottom: TiW/ Pt/ Au, TaN/ TiW/ Pt/ Au Color Code: RED Electrode Metallization: MIC Capacitor Pattern Selection: Single Value Value Designation: 500 = 50 pf Dielectric Class: (page 3) Tolerance: +/-5% 5

7 Type A High K (Class ) Single Capacitors ( prefix AMS), Dielectric & Dimension Combinations EIA Code in. R B C F H K P R S T U V 0x0 x 6x6 0x0 4x4 3x3 40x40 50x50 60x60 80x80 00x00.7 R7 Dielectric Color Index 3.3 3R3 K= R9 * K= R7 K= R R8 8. 8R Case Code / Size in mils *Please add suffix-fk for part numbers. Binary Capacitors (Type A) prefix AMB Gap Capacitors (Type A) prefix AMG Nominal values per array pad EIA Code in Case Code/ Size in mils Case Code/ Size in mils GD JD LD (pf) EIA Code in Each array pad Frequency AG BG 0x0 0x36 36x36 x4 0x33 Note : 0.7/0.35/0.8 0R7 * 0.5 x R5 * 5.0 x / 0.75 / 0.38 / 0.9 R5 * 5.0 x 3.0 /.5 / 0.75 / R0 * 5.0 x 3.0 /.5 / 0.75 / 0.38 / / 3.0 /.5 / 0.75 / R0 6R0 * The Values are for reference only. Binary relationship is based on the relative sizes (surface area) of the electrodes within the array instead of the actual electrical values for the individual capacitors. Screening Acceptance Procedures are based on measurements of the largest electrode pad only. Note : Please refer to Dielectric Color Index on page 5. * Note: Gap between array electrodes is industry standard 8 mils. When mounted in series the combined capacitance value is equal to C*C/ (C+C). * 6

8 Type B High Q (Class ) Single Capacitors ( prefix BMS), Dielectric & Dimension Combinations EIA Code in 0. BMS0R B C F H K P R S T U V 0x0 x 6x6 0x0 4x4 3x3 40x40 50x50 60x60 80x80 00x00 0. BMS0R Dielectric Color Index 0.3 BMS0R3 K= BMS0R4 0.5 BMS0R5 0.6 BMS0R6 0.8 BMS0R8.0 BMSR0. BMSR.5 BMSR5.8 BMSR8. BMSR.7 BMSR7 3.3 BMS3R3 3.9 BMS3R9 4.7 BMS4R7 5.6 BMS5R6 6.8 BMS6R8 8. BMS8R 0.0 BMS00.0 BMS0 5.0 BMS BMS80.0 BMS0 7.0 BMS BMS BMS BMS BMS BMS BMS BMS BMS0 0.0 BMS 50.0 BMS5 Case Code / Size in mils Please add suffix-4m for part numbers. K= 90 K=40 K=80 K=80 Part Number Example Type B Capacitor Type:B (page ) B M B 0R7 B GD Chip Configuration: GD: 0.00 x 0.00 (page 4) Safety Margin around top & bottom Top: TiW/ Au, TaN/ TiW/ Au Bottom: TiW/ Au, TaN/ TiW/ Au Color Code: BLUE Electrode Metallization: MIC Capacitor Pattern Selection: Binary LargestPad Value Designation: 0R7 = 0.7 pf Dielectric Class: (page 3) Tolerance: +/-0. pf 7

9 Type B High K (Class ) Single Capacitors ( prefix BMS), Dielectric & Dimension Combinations *Please add suffix-fk for part numbers. Case Code / Size in mils EIA Code in B C F H K P R S T U V 0x0 x 6x6 0x0 4x4 3x3 40x40 50x50 60x60 80x80 00x00. BMSR.7 BMSR7 Dielectric Color Index 3.3 BMS3R3 K= BMS3R9 * K= BMS4R7 K= BMS5R6 6.8 BMS6R8 8. BMS8R 0.0 BMS00.0 BMS0 5.0 BMS BMS80.0 BMS0 7.0 BMS BMS BMS BMS BMS BMS BMS BMS BMS0 0.0 BMS 50.0 BMS BMS8 0.0 BMS 70.0 BMS BMS BMS BMS BMS BMS BMS BMS BMS BMS BMS5 Binary Capacitors (Type B) prefix BMB Nominal values per array pad 0.7 / 0.35 / / 0.75 / / 0.75 / 0.38 / /.5 / 0.75 / /.5 / 0.75 / 0.38 / / 3.0 /.5 / 0.75 / 0.38 EIA Code in 0R7 R5 R5 3R0 3R0 6R0 Case Code/ Size in mils GD JD LD 0x0 0x36 36x36 Note : The Values are for reference only. Binary relationship is based on the relative sizes (surface area) of the electrodes within the array instead of the actual electrical values for the individual capacitors. Screening Acceptance Procedures are based on measurements of the largest electrode pad only. * * * * * * Gap Capacitors (Type B) prefix BMG (pf) Each array pad 0.5 x 5.0 x 5.0 x 5.0 x EIA Code in 0R5 5R Case Code/ Size in mils Frequency AG BG x4 Note: Gap between array electrodes is industry standard 8 mils. When mounted in series the combined capacitance value is equal to C*C/ (C+C). Note : Please refer to Dielectric Color Index on page 7. 8

10 Type C High Q (Class ) Single Capacitors ( prefix CMS), Dielectric & Dimension Combinations EIA Code in 0. CMS0R BC CC FC HC KC PC RC SC TC UC VC 0x0 x 6x6 0x0 4x4 3x3 40x40 50x50 60x60 80x80 00x00 0. CMS0R Dielectric Color Index 0.3 CMS0R3 K= CMS0R4 0.5 CMS0R5 0.6 CMS0R6 0.8 CMS0R8.0 CMSR0. CMSR.5 CMSR5.8 CMSR8. CMSR.7 CMSR7 3.3 CMS3R3 3.9 CMS3R9 4.7 CMS4R7 5.6 CMS5R6 6.8 CMS6R8 8. CMS8R 0.0 CMS00.0 CMS0 5.0 CMS CMS80.0 CMS0 7.0 CMS CMS CMS CMS CMS CMS CMS CMS CMS0 0.0 CMS 50.0 CMS CMS8 Case Code / Size in mils Please add suffix-4m for part numbers. K= 90 K=40 K=80 K=80 Part Number Example Type C Capacitor Type:C (page ) C M S 5 K VC Chip Configuration: VC: 0.00 x 0.00 (page 4) Suitable for Soldering with materials like Sn60, Sn6, etc.. Top: TiW/ Pt/ Au, TaN/ TiW/ Pt/ Au Bottom: TiW/ Pt/ Au, TaN/ TiW/ Pt /Au Color Code:YELLOW Electrode Metallization: MIC Capacitor Pattern Selection: Single value Value Designation: 5=500pF Dielectric Class: (page 3) Tolerance: +/-0 % 9

11 Type C High K (Class ) Single Capacitors ( prefix CMS), Dielectric & Dimension Combinations *Please add suffix-fk for part numbers. Case Code / Size in mils EIA Code in BC CC FC HC KC PC RC SC TC UC VC 0x0 x 6x6 0x0 4x4 3x3 40x40 50x50 60x60 80x80 00x00. CMSR.7 CMSR7 Dielectric Color Index 3.3 CMS3R3 K= CMS3R9 * K= CMS4R7 K= CMS5R6 6.8 CMS6R8 8. CMS8R 0.0 CMS00.0 CMS0 5.0 CMS CMS80.0 CMS0 7.0 CMS CMS CMS CMS CMS CMS CMS CMS CMS0 0.0 CMS 50.0 CMS CMS8 0.0 CMS 70.0 CMS CMS CMS CMS CMS CMS CMS CMS CMS CMS CMS5 0

12 8 Typical Temperature / Aging Characteristic Graphs Class I (K=40 & 90) Class I (K=40, 80 & 80) Class I K=40 K=90 Class I K=40 K=80 K=80 4% 5% Change (%) 3% % % 0% -% -% -3% Change (%) 0% 5% 0% -5% -0% -4% Temperature ( ) -5% Temperature ( ) Class II (K=700,,600,,800 & 3,400) Class III (K=4,500 & 0,000) 5% Class II K=700 K=,600 K=,800 K=3,400 0% Class III K=4,500 K=0,000 0% 5% 0% Change (%) 0% -5% -0% -5% -0% -5% -30% Change (%) -0% -40% -60% -80% -35% % Temperature ( ) Temperature ( ) Class IV (K=6,000 & 30,000) Aging Property (Class II, III & IV) 5% Class IV K=30,000 K=6, % Typical Aging K=700/,600 (Class II) K=,800 (Class II) K=0,000 (Class III) K=6,000/30,000 (Class IV) Change (%) 0% 5% 0% 5% 0% -5% -0% -5% -0% -5% Temperature ( ) Change (%) -.0% -.0% -3.0% -4.0% -5.0% -6.0% -7.0% -8.0% 0 00,000 0,000 Time (Hrs) Tecdia Inc. 55 S. Bascom Ave., Ste. 0, Campbell, CA 95008, U.S.A. TEL: FAX: sales@tecdia.com This specification may be modified without notice. (05.DEC) B-09-4