Chapter 6: Operational Amplifiers

Size: px

Start display at page:

Download "Chapter 6: Operational Amplifiers"

Gabriella Merritt
6 years ago
Views:

1 Chapter 6: Operational Amplifiers Circuit symbol and nomenclature: An op amp is a circuit element that behaes as a VCVS: The controlling oltage is in = and the controlled oltage is such that 5 5 A where 0 A gain 0 dependent source in controlling oltage As we will see, the gain is set by a particular combination of resistor alues. For the 74 op amp (which is the only op amp we will use this semester) can hae a maximum gain of A 0 5. The oltage alues V ± are the oltage terminals from the DC power supply. It is typical to NOT include these leads from the power supply for the simple reason of not cluttering up the circuit. Once again, it is assumed that you understand that these power supply leads are not include in the op amp circuit but still exist. So from here on we will use the simplified amplifier schematic: In order to hae linear behaior the op amp (that is, = A in where A = constant); the put oltage and current i 0 must satisfy three operating conditions:. saturation The maximum gain of any op amp can neer exceed the power supply alues since they are powering the op amp. It is customary to set the power supply oltages as V ± = ±5V. i. An op amp is said to behae linearly if the put oltage does not exceed in maximum power supply oltage ±5V. That is, the range of input oltages is limited such that = A in continues to be a alid equation. ii. Once reaches the power supply alue, further increases in in will not hae any effect on. The op amp is said to be saturated and implies that the put oltage = ±5V and will not change whatsoeer as the input oltage increases. Howeer, for input oltages below the saturation, the goal is to hae the op amp behae linearly

2 ( saturation = ±5V), howeer, if the saturation oltage is exceed ( = ±5V and the op amp behaes nonlinear. To understand this better, let's plot s. in.. io isaturation If the resistors in the op amp circuit are too low in alue, then one runs into a different type of possible saturation - current saturation. Again, the goal is to hae the op amp behaior linearly (i 0 i saturation ), howeer, if the saturation current is exceed (i 0 i saturation ), then the op amp behaes nonlinear. d 3. Slew Rate SR dt Slew rate is the maximum d/dt the op amp can produce at its put, and it doesn't depend on frequency. This means that at high frequencies, the put will be distorted. The distortion happens when the slew rate is not enough to support the d/dt required to accurately produce a sinusoidal put. Since the d/dt of the sinusoidal wae depends on both the frequency and the amplitude, you can reduce the distortion by reducing either one. What frequency should I use to measure my slew rate? One can measure the slew rate at any frequency that is fast enough to exercise the slew rate limiting behaior. As discussed aboe, the minimum frequency to see the slew rate also depends on the input amplitude. The slew rate for a gien amplitude V (with no distortions) and frequency f is slew rate f V Almost always, an op-amp has an internal compensation capacitor that effectiely limits the rate of change of the put oltage. Roughly speaking, there is a maximum current aailable to charge the compensation capacitor and this limits the rate of change of the put oltage. The most common op-amp is the μa74c or just 74, which is packaged in an 8-pin mini-dip. The integrated circuit contains 0 transistors and resistors. Introduced by Fairchild in 968, the 74 and subsequent IC op-amps including FET-input op-amps hae become the standard tool for achieing amplification and a host of other tasks. Though it has some practical limitations, the 74 is an electronic bargain at less than a dollar. Ideal Op Amp Model We are going to focus on a model called the Ideal Op Amp Model that models the complicated behaior of this deice. The actual deice is so complicated that it is beyond the scope of this course. One can see this by iew the schematic of the 74 op amp below.

3 Since it is beyond the scope of this course, I recommended that we use a simplified model known as the Ideal Op Amp Model. Ideal Op Amp Model. The input terminal currents are zero: i i 0.. The node oltages at the input nodes are equal:. Remember that this is a calculational model and is way of getting the node oltages. There are 3 approaches to soling op amp circuits: () Simple Circuits (by far my faorite technique), () Node analysis, and (3) Théenin equialents. Soling Strategies for Op Amp circuits using Node Analysis Step : Find the put oltage in terms of the input oltage. That is, connect the node oltages between and using any method. Remark: An op amp is a VCVS and in order to find alue of the oltage source, I first determine the controlling oltage ( x ) before I sole for the dependent source alue ( = A x ). Step sets it up a connection (or equation) between x with. Step : Apply the Ideal Op Amp conditions to the node oltage equations obtain in Step (i i 0 & ). Step 3: Determine and i 0. Examples Voltage Follower Op Amp Noninerting Amplifier Find the gain / in. 3

4 Solution Method: Node Analysis Method Redraw the circuit so that the noninerting input is at the bottom. Step : Apply node analysis to compute node oltages Apply node analysis to node and sole for in terms of : soling for R F R R F R F R 0 0 R Step : Apply the Ideal Op Amp model conditions S S Step 3: Sole for / in. We will typically sole only for in terms of in. R R F F S or gain R in S R Method: Simple Circuits Method I immediately apply the Ideal Op Amp conditions and start following the currents using SCT. First determine the node oltage and apply the ideal condition =. By inspection, we see that S Following the current i x, the current through R is also the current through R F since there is no current going into the inerting input wire. Using Ohm s law, we can sole for i x and : Example 6. Find the put oltage. i R S S soling for F x S R RF R Solution Method: Node Analysis Method This op amp circuit inoles two steps in order to get : () Need to use Node analysis to connect to and () use VDR to find, and then apply the Op Amp condition. Step. Apply node analysis to compute node oltages Apply node analysis to the node that connects to soling for

Step. Apply the Ideal Op Amp model conditions sole for 0 3V V using VDR 0 0 Step 3.

First thing that I would do is find the node oltage, using VDR (as we did aboe): 0 0k 3V V 0 0 Using KCL at each node, since i = 0, the current through the 0kΩ is also the current through the 0kΩ.

ma 6V 0k By doing the circuit soling this way, I get a feel for what the circuit is actually doing.

5 Step. Apply the Ideal Op Amp model conditions sole for 0 3V V using VDR 0 0 Step 3. Sole for V 6V or gain 6 0k 0k S this op amp does not inert the sign Method: Simple Circuits Method I immediately apply the Ideal Op Amp conditions and start following the currents using SCT. First thing that I would do is find the node oltage, using VDR (as we did aboe): 0 0k 3V V 0 0 Using KCL at each node, since i = 0, the current through the 0kΩ is also the current through the 0kΩ. Using Ohm s law, I sole for i : V i0k 0. ma i0k 0k I now apply Ohm s law to the 0kΩ resistor to get : 0k i 0k 0. ma 6V 0k By doing the circuit soling this way, I get a feel for what the circuit is actually doing. On the other hand, Node analysis is a powerful tool, but it is deoid of intuition as to what is going on in the circuit. Example 6. Bridge Amplifier Find and the current i 0. Solution This op amp circuit is somewhat intimating and can be sole using two different methods, () Théenin & Simple Circuits (elegant way) or () Node (the thuggish or brute force way). Method: Théenin Equialent & Simple Circuits Let's look at the circuit and see what the Bridge amplifier will look like as a Théenin circuit. The first thing to note is that regardless of the Théenin block, the main branch is connected to the inerting input, and the ideal model implies that the current is zero. Redrawing the circuit immediately tells us that the current i 0 is also the current through the top right 0kΩ-resistor headed towards ground. To determine the current i 0, I need Th. The oltage Th measured relatie to the ground must be Th 0 0k 30k 5

Using VDR (since there is no current on the main branch, the resistors in the bridge are in series), I write 30 0 Th 30k 0k 6V 3V Th 30 0 I first need to determine i 0 in order to determine.

6 Using VDR (since there is no current on the main branch, the resistors in the bridge are in series), I write 30 0 Th 30k 0k 6V 3V Th 30 0 I first need to determine i 0 in order to determine. Using a series of Ohm s law calculations, 0k 3V i0k 0.3 ma i0 Th 30k 0.3m 9V V 0k 0k If I wanted to instead, I could hae applied node analysis to Th, I can get also: 0 4 V Th Th Method: Node Analysis The setting up of the equations is tricky here because we cannot write a node equation for the put oltage. So there are fie nodes (a, b, c, d, ) but only 3 node equations since node (b, c) is a supernode. Howeer, we also hae to include the Ideal condition as an additional equation that connections nodes, & d together: N( a ) SN ( b, c) 4 nodes sources 3 node eqs SC ( b, c) N( d ) Ideal condition (,, d) 5 eqs and 5 unknowns ( a, b, c, d, ) Step : Apply node analysis to the nodes that connects to (a, b, c, d). Node a: a 0 b 30 c b 0 a 30 d 0 30 b 30 a 0 d Supernode b: 0 SC : 6 Node d: node b b c 0 30 d 0 b 30 c 0 node c Step : Apply the Ideal Op Amp model conditions 0 d 0 d 0 Step 3: Sole for and i 0. Substituting d 0 into Step, Node a: 0 a b c b a d b a d Supernode b: SC : 6 Node d: b c node b 0 30 d 0 b 30 c Important note: it was important to write the node equation for d (although at the time it didn t seem important since d = 0 was obious) since it set the condition between b and c. This explicitly shows the importance of applying the Ideal Op Amp conditions after the node equations hae been written. node c Soling for all parameters, b c b V & c V 0 b 30 c 0 Now substitute these b and c alues to determine a and : 0 6

0 30 a 0 b 30 c 30 0 9 b a+ b a 0 0 30 0 0 30 30 b V 3 c V Applying Ohm's law to get the current i 0, a 3V V i 3 ma i 30k 30k 0 Example 6.3 Summing Amplifier Find and the current i 0.

7 0 30 a 0 b 30 c b a+ b a b V 3 c V Applying Ohm's law to get the current i 0, a 3V V i 3 ma i 30k 30k 0 Example 6.3 Summing Amplifier Find and the current i 0. Solution There are three ways to sole this circuit: () Source transformations with Simple Circuits, () Simple Circuits and (3) Node analysis. V & 3V Method: Source transformations with Simple Circuits My preferred way is this one. First thing I would do is a series of source transformations. Apply the ideal model and follow the current going to the right. Note that the currents i 8k = i 6k are identical. Furthermore, because of the direction of i 6k, the node oltage must be negatie, so current through the 6kΩ-resistor connect to the ground must be coming up from the ground. Let s find these currents using Ohm s law: 6V i 8k ma i 3 6k 8k Applying Ohm's law again to get, I write 0 6k i 6k m 4V 4V Using KCL at the node, the current i 0 is 3 6k i i i ma ma i 0 6k 6k 0 Method: Simple Circuits Let s assume that you do not use a source transformation but use straight up simple circuits. Note that the resistors R and R 3 are in parallel and in series with R, so I can use VDR we get 6 3 VDR : A V 8.0V and 3 V 4.0V Now following the current going to the right, the current through R is A 0 4V i ma 6k 6k 3 Since there is no current going into node (ideal op amp model), the current through R 4 is equal to the current through R. Applying Ohm's law across R 4 gies us : R i 0 6k ma 4V 4 Method: Node Analysis This op amp circuit inoles two steps in order to get : () Need to use Node analysis to connect to and () use VDR to find, and then apply the Op Amp condition. Step : Apply node analysis to the nodes that connects to - A & B. Node A: A 6 6 Node B: B 6 A 6 Step : Apply the Ideal Op Amp model conditions 0 B 0 B 0 B 3 a 7

Step 3: Sole for Substituting this back into Step, 6 6 6 A 6 6 B B A 6 6 0 soling for A 4V and 4V A & 6 6 0 Example 6.

Note that there are two nodes connected to 0: A and B. Starting with node E, the ideal op amp model immediately determines seeral node oltages: E = C = A = 0V.

8 Step 3: Sole for Substituting this back into Step, A 6 6 B B A soling for A 4V and 4V A & Example 6.4 Determine the put oltages ( 0, 0 ) and currents (i 0, i 0 ) of each op amp when all resistor alues are 0k. Solution Method: Simple Circuits Focus on calculating 0 first. Note that there are two nodes connected to 0: A and B. Starting with node E, the ideal op amp model immediately determines seeral node oltages: E = C = A = 0V. With this information, I can now determine the two currents at node A using the ideal op amp current condition (remember, no current going into the op amp): 0V 0 0k 0 0 ia ma and iba ia ma Soling for the put oltage 0, 0k 0 0V 0 k ma 0 0V Applying KCL at node B, we sole for i 0 : 0 0 i i i 0 i i i ma ma i 0k 0 BC BA 0 BC BA 0 Now, I will repeat this process to sole for 0 and i 0. Starting at node B and following the current to node D, since no current goes into the op amps, the currents i BC = i CD are equal: 0 0 ibc icd ma k Applying KCL at node D, we sole for i 0 : 0 0 i0 icd ied ma ma i0 0k Method: Node Analysis Since I am not able to write node equations for the two put node oltages ( 0 and 0 ), there are only two nodes aailable since node E is automatically 0V: A and C. Apply node analysis to nodes A and C, Node A: 0 0 A Node C: 0 0 C Applying the Ideal oltage conditions to both op amps, they tell us 0V and 0V Therefore, 0 and 0 are C C A upper op amp lower op amp 8

0 0 0 0 0 0V 0 0 0 0 0 0 0 0 0 0 0 0 0 Example 6.

Solution Use the inerting amplifier and the

in. Placing the incoming line from node in

this forces the current to be zero, i in = 0.

9 V Example 6.5 Design the op amp circuit so that = 5. Solution Use the inerting amplifier and the summing amplifier from the op amps table, I put together Example 6.6 Design the op amp circuit so that i in = 0, = 3 in. Placing the incoming line from node in directly into the noninerting node of the op amp, this forces the current to be zero, i in = 0. Now using a noninerting amplifier configuration, the put oltage is = 3 in. noninerting amplifier 0k 0k in 9

10 0

Chapter 4: Techniques of Circuit Analysis

Chapter 4: Techniques of Circuit Analysis This chapter gies us many useful tools for soling and simplifying circuits. We saw a few simple tools in the last chapter (reduction of circuits ia series and