Performance Enhancement of P-channel InGaAs Quantum-well FETs by Superposition of Process-induced Uniaxial Strain and Epitaxially-grown Biaxial Strain

Transcription

1 Performance Enhancement of P-channel InGaAs Quantum-well FETs by Superposition of Process-induced Uniaxial Strain and Epitaxially-grown Biaxial Strain Ling Xia 1, Vadim Tokranov 2, Serge R. Oktyabrsky 2, and Jesús A. del Alamo 1 1 Microsystems Technology Laboratories, MIT, USA; 2 College of Nanoscale Science and Engineering, SUNY-Albany, USA. Dec. 06, 2011 Sponsors: Intel Corp. and FCRP-MSD Center. Fabrication: MTL at MIT.

2 Outline Motivation Mechanical simulations Device technology Experimental results Conclusions 2

3 Interests in InGaAs CMOS Fueled by excellent v e and µ e Key challenge for InGaAs CMOS Bridging performance gap between n- and p-fet. Our approach Introduce strain to InGaAs p-fet Uniaxial + biaxial compressive strain Logarithmic scale Motivation Electron mobility Hole mobility del Alamo, Nature, 2011 Kuhn, IWJT,

4 Why biaxial strain + uniaxial strain? Sources for strain include: Epitaxial lattice mismatch Biaxial strain Fabrication process Uniaxial strain Max <110> piezoresistance coefficient (10 12 cm 2 /dyn) In 0.24 Ga 0.76 As Ge Gomez, EDL, 2010 Weber, IEDM, 2007 Xia, TED, 2011 Xia, ISCS, 2011 π <110> = Δµ/(µ 0 σ <110> ) GaAs Experiments Epitaxial compressive biaxial strain (%) Enhancements of µ h by biaxial and uniaxial strain add superlinearly Similar effect found in Si simulations (Wang, TED, 2006) 4

5 InGaAs QW-FET with uniaxial + biaxial strain Self-aligned stressor (compressively stressed) Self-aligned metal layer (Mo) Carbon delta-doping Biaxial strain in the channel as grown Induced stress scalable with L G (next slide) 5

6 Mechanical stress simulations Parameters used in simulations: t SiN = 200 nm; SiN σ int = -2 GPa Longitudinal stress distribution L G = 2 µm t SiN =200 nm L side = 100 nm S Cut line D -1 0 x (µm) Desirable stress type can be obtained with the proposed stressor structure Compressive longitudinal stress µ h Tensile transverse stress µ h 6

7 L G scalability of induced stress at middle of gate % Projected assuming Δµ h /µ h = -π σ Stress (MPa) ,200 Fast increase when L G ~ t SiN Slow down due to a fixed L side Slow increase when L G >> t SiN Longitudinal Transverse Δµ h /µ h0 150% 120% 90% 60% 30% From From Total σ // σ π // = - 1.2x10-10 cm 2 /dyn π =0.7x10-10 cm 2 /dyn (Xia, ISCS, 2011) -1, ,000 10,000 L G (nm) L G Stress inside gate opening Assume linear µ with σ >160% µ h enhancement for L G < 50 nm 0% L G (nm) 7

8 Device technology SiO 2 SiO 2 Mesa isolation SiN SiN Ohmic metalization Molybdenum (Mo) deposition PECVD SiN stressor and SiO 2 Anisotropic ECR RIE SiO 2 /SiN S Cap : 2x10 19 cm -3 Barrier Channel Buffer D Mo Carbon doped GaAs Al 0.42 Ga 0.58 As In 0.24 Ga 0.76 As AlGaAs S Cap : 2x10 19 cm -3 Barrier Channel Buffer D Mo Carbon doped GaAs Al 0.42 Ga 0.58 As In 0.24 Ga 0.76 As AlGaAs Anisotropic ECR RIE Mo Isotropic RIE Mo GaAs cap recess by wet etching Gate metalization S Cap Cap : 2x10 19 cm -3 Barrier Channel Buffer SiO 22 SiN D Mo GaAs Al 0.42 Ga 0.58 As Carbon doped GaAs In 0.24 Ga 0.76 As AlGaAs S Cap Cap : 2x10 19 cm -3 Barrier Channel Buffer G SiO 22 SiN D Mo Carbon doped GaAs Al 0.42 Ga 0.58 As In 0.24 Ga 0.76 As AlGaAs Key considerations: Avoid Mo layer short to gate metal Air gap as small as possible 8

9 Device cross-section Artifact of imaging L G = 2 µm; channel along [-110] L side 400 nm 9

10 Experimental parameters for devices Split experiments: SiN with -2.1 GPa stress vs SiN with 0 Pa stress SiN film stress obtained from wafer curvature measurements L G = 2 µm to 8 µm Four channel orientations: [-110] [110] G S D S D G [-110] [110] [100] [010] 10

11 QW-FET electrical characteristics Example: L G = 2 µm; channel along [-110] -I D (ma/mm) V GS - V T = V V V V V DS (V) -2.1 GPa SiN 0 GPa SiN g m (ms/mm) Extrinsic Intrinsic 0 GPa SiN -2 GPa SiN V DS = -2 V V GS - V T (V) Significant drive current increase Transconductance increase at all gate overdrives 11

12 Subthreshold characteristics and V T Similar I G as chemically etched samples No RIE damage V T shift between high- and low- stress samples Likely due to different anisotropic RIE overetch I (ma/mm) 10 With -2 GPa SiN With 0 GPa SiN 1 I D 0.1 Both S = 103 mv/dec 0.01 I 1E-3 G 1E-4 1E-5 V DS = -2 V L G = 2 m V GS (V) 12

13 L G dependence of g m g m-sat (ms/mm) % Channel along [-110] V DS = -2 V V GS V T = -0.5 V L G ( m) Dots : data Lines: least-square fittings Increasing enhancement observed with decreasing L G Consistent with stress simulations + π measurements >160% enhancement expected with L G < 50 nm 13

14 Crystal direction dependence g mi_sat Observed anisotropic g mi and R SD g mi extracted using g mext, R S, R D and g D R S, R D extracted using gate current injection method <110> anisotropy consistent with measurements of piezoresistance coefficients π [-110] : π [110] = 2.6 (Xia, ISCS, 2011) 14

15 Theoretical discussions Valence band change due to strain in InGaAs Used k.p methods (nextnano 3 ) Calculated subbands in In 0.24 Ga 0.76 As quantum well No uniaxial -500 MPa uniaxial m* hh1 [-110] uniaxial m* // k y (2 /a) E v (ev) lh1 No uniaxial [010] [110] [100] k x (2 /a) In-plane iso-energy contours of hh1 with and without uniaxial strain k [110] hh2 Compressive strain parallel to channel is desirable k //[-110] 15

16 Effective mass model Treat nonparabolic valence band using energy dependent m* (De Michielis, TED, 2007) [-110] Strain Gate Barrier Channel P z (z) E v (ev) m* [-110] uniaxial m* // [110] uniaxial No uniaxial k <110> k //<110> From simulations: m* anisotropy induced by quantization change due to piezoelectric effect m* anisotropy consistent with g m measurements.

17 Conclusions Developed device architecture for InGaAs p-fets that incorporates uniaxial strain through self-aligned dielectric stressor Key results: Biaxial strain + uniaxial strain substantial enhancements in transport characteristics Up to +36% g m observed in L G = 2 µm device Strong enhancement anisotropy due to piezoelectric effect For further enhancement: Scale down L G and bring S/D closer Project g m L G < 50 nm Study useful to other p-type III-V materials (e.g. InGaSb, InSb) 17