Introduction to Digital Logic Missouri S&T University CPE 2210 Subtractors
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1 Introduction to Digital Logic Missouri S&T University CPE 2210 Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and Technology 9 November 2016 rev Egemen K. Çetinkaya
2 Introduction Half-subtractor Full-subtractor Outline 1 s complement representation 2 s complement representation Overflow Summary 2
3 Digital Logic Systems Overview Combinatorial logic circuits for no memory systems Boolean algebra to mathematically design/analyze logic gates are building blocks Sequential logic circuits for memory systems Finite State Machines to mathematically design/analyze flip-flops and latches store memory flip-flops and latches are building blocks of sequential logic Sequential logic circuits (aka controllers) combine combinatorial circuits storage elements (e.g. registers) 3
4 Digital Systems Components analog phenomena electric signal A2D digital data digital data sensors and other inputs Digital System D2A electric signal actuators and other outputs digital data digital data Transducer: sensor + actuator Not all sensors/actuators require A2D/D2A conversion Digital system can be implemented: microprocessor readily available, cheap, easy to program, easy to reprogram custom circuit smaller, faster, consume less power 4
5 Digital Systems Paths Digital systems have two paths: datapath circuit control circuit Datapath circuit store data manipulate data transfer data from one part to another Control circuit controls the operation of datapath circuit 5
6 Registers Shifters Adders Comparators Counters/timers Datapath Components Building Block examples Multiplexer/demultiplexers Decoders/encoders ALUs: Arithmetic Logic Units 6
7 Overview subtract two N-bit numbers E.g.: 2-bit subtractor subtracts two 2-bit numbers 4-bit subtractor subtracts two 4-bit numbers Block diagram: 4-bit subtractor a3 b3 a2 b2 a1 b1 a0 b0 wi a b wi a b wi a b wi a b wi a3 a2 a1 a0 b3 b2 b1 b0 FS FS FS FS 4-bit subtractor wi w o s w o s w o s w o s w o s3 s2 s1 s0 w o s3 s2 s1 s0 7
8 Subtract Operation Compute sum, add carry to next column Lets add A=1010 and B=0111-1st column nd c olumn r d c olumn th c olumn minuend subtrahend difference 8
9 Half-Subtractor Subtracts two bits, generates two output bits Inputs: minuend and subtrahend Outputs: difference and borrow Lets try to design the circuit: 9
10 Half-Subtractor Subtracts two bits, generates two output bits Inputs: minuend and subtrahend Outputs: difference and borrow Lets try to design the circuit: Next steps? 10
11 Half-Subtractor Subtracts two bits, generates two output bits Inputs: minuend and subtrahend Outputs: difference and borrow Lets try to design the circuit: Next steps? Capture the function Create equations Implement as a circuit 11
12 Half-Subtractor Subtracts two bits, generates two output bits Inputs: minuend and subtrahend Outputs: difference and borrow Lets try to design the circuit: Next steps? Capture the function Pay attention: we are doing b a b a D B
13 Half-Subtractor Subtracts two bits, generates two output bits Inputs: minuend and subtrahend Outputs: difference and borrow Lets try to design the circuit: Next steps? Create equations D = b a + ba = b a b a D B
14 Half-Subtractor Subtracts two bits, generates two output bits Inputs: minuend and subtrahend Outputs: difference and borrow Lets try to design the circuit: Next steps? Create equations D = b a + ba = b a B = b a b a D B
15 Half-Subtractor Subtracts two bits, generates two output bits Inputs: minuend and subtrahend Outputs: difference and borrow Lets try to design the circuit: Next steps? Implement as a circuit D = b a + ba = b a B = b a a b a b Halfsubtractor B D B D 15
16 Comparison Half-Adder vs. Half-Subtractor HA operation: a+b s = a b co = ab HS operation: b a D = a b B = b a a b a b a b a b Half-adder (HA) co s Halfsubtractor B D co s B D 16
17 Full-Subtractor Subtracts three bits, generates two output bits Inputs: minuend, subtrahend, and borrow in Outputs: difference and borrow out Lets try to design the circuit: 17
18 Full-Subtractor Subtracts three bits, generates two output bits Inputs: minuend, subtrahend, and borrow in Outputs: difference and borrow out Lets try to design the circuit: Next steps? 18
19 Full-Subtractor Subtracts three bits, generates two output bits Inputs: minuend, subtrahend, and borrow in Outputs: difference and borrow out Lets try to design the circuit: Next steps? Capture the function Create equations Implement as a circuit 19
20 Full-Subtractor Subtracts three bits, generates two output bits Inputs: minuend, subtrahend, and borrow in Outputs: difference and borrow out Lets try to design the circuit: Next steps? Capture the function Pay attention: we are doing b a Bi that is the difference (D) Bo=1 if b<(a+bi) b a Bi D Bo
21 Full-Subtractor Subtracts three bits, generates two output bits Inputs: minuend, subtrahend, and borrow in Outputs: difference and borrow out Lets try to design the circuit: Next steps? Create equations D=b a Bi+b abi +ba Bi +babi D=b (a Bi+aBi )+b(a Bi +abi) D=b (a Bi)+b(a Bi) D=b a Bi b a Bi D Bo
22 Full-Subtractor Subtracts three bits, generates two output bits Inputs: minuend, subtrahend, and borrow in Outputs: difference and borrow out Lets try to design the circuit: Next steps? b a Bi D Bo Create equations D=b a Bi Bo=b a Bi+b abi +b abi+babi Bo=b (a Bi+aBi )+abi(b +b) Bo=b (a Bi)+aBi
23 Full-Subtractor Subtracts three bits, generates two output bits Inputs: minuend, subtrahend, and borrow in Outputs: difference and borrow out Lets try to design the circuit: Next steps? Create equations D=b a Bi Bo=b (a Bi)+aBi b a Bi D Bo
24 Full-Subtractor Subtracts three bits, generates two output bits Inputs: minuend, subtrahend, and borrow in Outputs: difference and borrow out Lets try to design the circuit: Next steps? Implement as a circuit D=b a Bi Bo=b (a Bi)+aBi a b (FS) Bi B o D 24
25 Comparison Full-Adder vs. Full-Subtractor FA operation: a+b+c s = a b c co = ab + ac + bc FS operation: b a Bi D = b a Bi Bo = b (a Bi) + abi a b ci a b Bi Full adder (FA) (FS) c o s B o D 25
26 Negative Number Representation So far we dealt with positive numbers How do we go on representing negative numbers? 26
27 Number Systems Representation Type Explanation positive x > 0 negative x < 0 non-negative x 0 non-positive x 0 signed (in computing) represents both negative and positive numbers unsigned (in computing) represents only non-negative numbers 27
28 LSB: Least Significant Bit right-most bit MSB: Most Significant Bit higher-order bit left-most bit Example: LSB MSB Number Systems Representations
29 Unsigned numbers: Number Systems Unsigned Numbers all bits represent the magnitude of a number Example: LSB MSB magnitude 29
30 Signed numbers: Number Systems Signed Numbers left most bit represents the sign MSB is shifted one bit to right Example: what is the value? sign bit: 0 for positive numbers, 1 for negative numbers LSB MSB sign magnitude 30
31 Signed numbers: Number Systems Signed Numbers left most bit represents the sign MSB is shifted one bit to right Example: what is the value? 45 sign bit: 0 for positive numbers, 1 for negative numbers LSB MSB sign magnitude 31
32 Number Systems Signed and Magnitude Examples Egemen K. Çetinkaya
33 Number Systems Signed and Magnitude Examples Egemen K. Çetinkaya
34 Number Representation Range representing signed vs. unsigned numbers? E.g. 4-bit signed-magnitude example? E.g. 4-bit unsigned-magnitude example?
35 Number Representation Range representing signed vs. unsigned numbers? E.g. 4-bit signed-magnitude example? Range from (2 n 1 1) to +(2 n 1 1), 7 to +7 E.g. 4-bit unsigned-magnitude example? Range from 0 to +(2 n 1) 0 to 15 35
36 Signed Numbers and Complements There are two types of complements r s complement of N = r n N radix complement or true complement N is the number, r is the base, n is the digits (r 1) s complement of N = r n r m N diminished-radix or radix-minus-one complement N is the number, r is the base, n is the integer digits, m is the fraction digits E.g. for number 22.1 in base 10 10s complement: = = s complement: = =
37 Binary Complements Two s complement (2 s complement) r s complement of N = r n N One s complement (1 s complement) (r 1) s complement of N = r n r m N E.g. for number unsigned 101 in base 2 1 s complement: = = s complement: = = s complement is bits flipped of original number 2 s complement is 1 s complement
38 3-bit True and Complement Forms Example Complement representation are for negative numbers Number
39 3-bit True and Complement Forms Example Complement representation are for negative numbers Number Unsigned 39
40 3-bit True and Complement Forms Example Complement representation are for negative numbers Number Unsigned 40
41 3-bit True and Complement Forms Example Complement representation are for negative numbers Number Unsigned Signed and magnitude
42 3-bit True and Complement Forms Example Complement representation are for negative numbers Number Unsigned Signed and magnitude
43 3-bit True and Complement Forms Example Complement representation are for negative numbers Number Unsigned Signed and magnitude s complement (of signed value) 43
44 3-bit True and Complement Forms Example Complement representation are for negative numbers Number Unsigned Signed and magnitude 1 s complement (of signed value) (no change) (no change) (no change) (no change) (111) (110) (101) (100) 44
45 3-bit True and Complement Forms Example Complement representation are for negative numbers Number Unsigned Signed and magnitude 1 s complement (of signed value) (no change) (no change) (no change) (no change) (111) (110) (101) (100) 2 s complement (of signed value) 45
46 3-bit True and Complement Forms Example Complement representation are for negative numbers Number Unsigned Signed and magnitude 1 s complement (of signed value) 2 s complement (of signed value) (no change) +3 (no change) (no change) +2 (no change) (no change) +1 (no change) (no change) +0 (no change) (111) 4 (100) (110) 1 (111) (101) 2 (110) (100) 3 (101) 46
47 Negating Numbers Using Complements To represent negative value of a positive number 1- you can represent using 1 s complement take the positive value, including the sign bit (which is 0) flip all bits to obtain 1 s complement representation E.g.: represent 6 in 1 s complement using 4-bit 6 is 0110 using 4-bits, 6 is 1001 in 1 s complement form 2- you can represent using 2 s complement once 1s complement is calculated, add 1 to the result E.g.: represent 6 in 2 s complement using 4-bit 6 is 0110 using 4-bits, 6 is 1001 in 1 s complement form 1010 is 2s complement of 6 (added 1 to 1 s complement) 47
48 Notes About Complements Complement of a complement is original value E.g.: 2 s complement of 101 is 111 E.g.: 2 s complement of 111 is s complement of in decimal will be the number itself: s complement of in decimal will be the number itself: s complement of in decimal will be: 1 1 s complement have 2 zero values hard to design a zero-detector using 1 s complement 48
49 Number Representation Range representing signed vs. unsigned numbers? E.g. 3-bit unsigned-magnitude example? Range: from 0 to +(2 n 1), 0 to 7 E.g. 3-bit signed-magnitude example? 1 s complement range: from (2 n 1 1) to +(2 n 1 1), 3 to +3 0 appears twice 2 s complement range: from (2 n 1 ) to +(2 n 1 1), 4 to +3 0 appears only once 49
50 Subtraction via 2 s Complements Consider two numbers: N1=11011 and N2=10110 N1: (27) N2: (22) D: 101 (5) Values in red representing the sign Instead find 2 s complement of N2=? 50
51 Subtraction via 2 s Complements Consider two numbers: N1=11011 and N2=10110 N1: (27) N2: (22) D: (5) Instead find 2 s complement of N2=? 1 s complement of N2 is: s complement of N2 is: =
52 Subtraction via 2 s Complements N1: (27) N2: (22) D: (5) Instead find 2 s complement of N2 = Instead of subtracting, add N1 and N2 s complement N1: (27) N2: (10) S: (37 32) Ignoring the end carry, are the results same: D vs S? 52
53 1 s Complement Addition Example Egemen K. Çetinkaya ( + 5 ) + ( + 2 ) ( + 7 ) ( 5 ) + ( + 2 ) (- 3 ) ( + 5 ) + ( 2 ) ( + 3 ) ( 5 ) + ( 2 ) ( 7 )
54 2 s Complement Addition Example Egemen K. Çetinkaya + ( + 5 ) ( + 2 ) ( 5 ) ( + 2 ) ( + 7 ) ( 3 ) ( + 5 ) + ( 2 ) ( 5 ) + ( 2 ) ( + 3 ) ( 7 ) ignore ignore 54
55 Subtraction via 2 s Complements Subtraction via adding 2 s complement A B = A + ( B) A B = A + (2 s complement of B) A B = A + (inverted B + 1) A B N-bit A Adder B cin 1 S 55
56 Adder/Subtractor Combined Egemen K. Çetinkaya Performs X+Y or X Y depending on value of Add/Sub 56
57 Logic Gates XOR Gate Output is 1 when both input 1s are odd numbered Symbol: XOR Truth table: x y F
58 Overflow The result of addition or subtraction must fit into: number of allocated bits to represent the resulting number If the result does not fit, then overflow occurs Signed numbers range from (2 n 1 1) to +(2 n 1 1) Unsigned numbers range from 0 to +(2 n 1) Overflow can be determined by: if the sign bits are same but switched in the result if the sign bits are different, there cannot be overflow overflow = c n 1 c n 58
59 Overflow Examples + ( + 7 ) ( + 2 ) ( 7 ) ( + 2 ) ( + 9 ) c 4 = 0 c 3 = 1 ( 5 ) c 4 = 0 c 3 = 0 ( + 7 ) + ( 2 ) ( 7 ) + ( 2 ) ( + 5 ) c 4 = 1 c 3 = 1 ( 9 ) c 4 = 1 c 3 = 0 59
60 Half-subtractor: Summary subtracts two bits: minuend and subtrahend generates two output bits: difference and borrow Full-subtractor: subtracts three bits: minuend, subtrahend, and borrow in generates two output bits: difference and borrow out Negative binary numbers can be represented via: 1 s complements: flip all bits including the sign bit 2 s complements: 1s complement + 1 Overflow can be determined by: c n 1 c n 60
61 References and Further Reading [V2011] Frank Vahid, Digital Design with RTL Design, VHDL, and Verilog, 2nd edition, Wiley, [BV2009] Stephen Brown and Zvonko Vranesic, Fundamentals of Digital Logic with VHDL Design, 3rd edition, McGraw-Hill, [G2003] Donald D. Givone, Digital Principles and Design, McGraw-Hill,
62 End of Foils 62
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