Application of plasma parameters to characterize product interactions between memory and logic products at Gate Contact (GC) Stack etch in LAM TCP

Transcription

1 Application of plasma parameters to characterize product interactions between memory and logic products at Gate Contact (GC) Stack etch in LAM TCP Page 1 Das diesem Bericht zugrundeliegende Vorhaben wurde mit Mitteln des Sächsischen Staatsministeriums für Wirtschaft und Arbeit (Förderkennzeichen 5706) gefördert. Die Verantwortung für den Inhalt dieser Veröffentlichung liegt beim Autor"

2 Introduction! Fundamentals of Field Effect Transistors! Gate Contact Stack Etch (GC Etch)! Problems with product mix! Results of measurements in high volume production! Conclusion! Outlook Page 2 Introduction

3 Fundamentels of Field Effect Transistor (FET)! gate: part of FET to switch on and off transistor! smallest dimension in transistor struction! GC Stack etch important process step Gate voltage potential reacts as switch G D WSi x Poly Si SiO SiO 2 2 S Drain Si Source symbol of FET device Shematic cross view of FET Page 3 Fundamentals of Field Effect Transistors

4 Gate Contact (GC) Stack Etch a challenge of semiconductor processing Page 4 Si 3 N 4 before etching Si 3 N 4 WSi x Poly Si after etching WSi x Poly Si SiO 2 Si GC Stack SiO 2 Si GC Stack etch process! step 1 plasma stabilization! step 2 - WSi x etch (endpoint stoped)! step 3 - Poly-Si main etch (time stoped)! step 4 - Poly-Si over etch I (endpoint stoped)! step 5 - Poly-Si over etch II (time stoped) Requirements of GC Stack etch process! edges clean of Poly-Si! no tungsten contamination! no etch of SiO 2 layer! high aspect ratio - steep sidewalls Fundamentals of Field Effect Transistors

5 Problems with product mix! different products (memory and logic) processed in same chamber! important electrical parameters of logic products show serious drift depending on " Process mix at the chamber " Rf hours! different products have various impact on chamber condition because of " Different recipes (plasma chemistry, rf power, etch time) " Different surface chemistry (open area, mask composition) Page 5 Problems with product mix

6 Comparison of collision rate and electron density Page 6 collision rate [10 6 s -1 ] electron collision rate vs. wafer (median), WSi x Memory Logic Clean wafer logic product 1 memory product 1 clean wafer logic product 2 memory product 2 conditioning wafer! Influence on collision rater bigger than on electron density! for further considerations only collision rate used electron density [10 7 s -1 ]! collision rate goes up! electron density goes down! c.r., e.d same tendency! clean wafer same effect for collision rate and electron density electron density vs. wafer (median), WSi x one point = one wafer Memory Logic Clean wafer Results of measurements

7 GC Stack, WSi x etch Electron collision rate versus wafer collision rate [10 6 s -1 ] electron collision rate vs. wafer (median), WSi x Memory Logic Clean! collision rate " increases over wafer number for logic products " logic - serious drift wafer logic product 1 memory product 1 clean w afer logic product 2 memory product 2 conditioning w afer " memory - broad dispersion! clean wafer before " logic product - collision rate goes down " memory product - no strong influence! condition wafer one point = one wafer " no big influence on collision rate Page 7 Results of measurements

8 GC Stack, Poly-Si main etch Electron collision rate versus wafer el. collision rate vs. wafer (median),poly-si (main etch) collision rate [10 6 s -1 ] Memory Logic Clean! clean wafer before " logic product wafer logic product 1 memory product 1 clean w afer logic product 2 memory product 2 conditioning w afer one point = one wafer # collision rate goes up strongly " logic product 1 # no drift, no broad dispersion # falls down during an initial phase # increases slowly after initial phase " memory product # not a strong influence Page 8 Results of measurements

9 GC Stack: Poly-Si over etch Electron collision rate versus wafer collision rate [10 6 s -1 ] el. collision rate vs. wafer (median), Poly-Si (over etch) Memory Logic Clean! clean wafer before " logic product wafer memory product 1 logic product 1 clean w afer logic product 2 memory product 2 conditioning w afer # collision rate goes up strongly # c.r. falls down to old level (saturation) one point = one wafer " memory product # collision rate goes down # moves up again slowly Page 9 Results of measurements

10 Correlation between gate oxide thickness and electron collision rate (Poly-Si, final over etch) Correlation coefficient = -0,48 Correlation coefficient = -0,038! same tendency of collision rate and SiO 2 thickness! correlation not possible Page 10 Results of measurements

11 Electron collision rate versus oxide thickness electron collision rate s , , , , , ,00 electron collision rate vs. gate oxide thickness (wafer )! not usable for process decisions " no clear tendency " broad dispersion Page ,00 One point = one wafer gate oxide thickness 4500, , , , , , ,00 electron collision rate s -1 electron collision rate vs. gate oxide thickness (wafer ) gate oxide thicknes Results of measurements

12 Mean of gate oxide thickness versus mean of electron collision rate (Poly-Si, final over etch) 4220 electron collision rate vs. gate oxide thickness mean of collision rate 10 6 s Page 12! one point 4100 " mean of nine wafer processed after each other! between points some hundret wafer processed without measuring! after further research mean of gate oxide thickness " collision rate maybe capable to detect serious problems with gate oxide thickness one point = mean of 9 wafer Results of measurements

13 Conclusion! collision rate capable " to detect product interactions # result - over etch responsible for product mix problem " to detect effect of clean wafer Page 13 # good results for logic products at WSi x etch # good effect after initial time at Poly-Si main etch # bad influence at Poly-Si over etch " to detect effect of condition wafer # no big influence on Plasma Paramaters " to detect tendency of gate oxide thickness Conclusion

14 Outlook! comparison of plasma parameters with electrical data! correlation between plasma parameters and etch results! consideration of plasma chemistry! interaction of chemical elements! influence of plasma parameters on surface charging Page 14 Outlook