Section 5.4 BJT Circuits at DC

Transcription

1 12/3/2004 section 5_4 JT Circuits at DC 1/1 Section 5.4 JT Circuits at DC Reading Assignment: pp To analyze a JT circuit, we follow the same boring procedure as always: ASSUME, ENFORCE, ANALYZE and CHECK. HO: Steps for D.C. Analysis of JT Circuits HO: Hints for JT Circuit Analysis For example: Example: D.C. Analysis of a JT Circuit Example: An Analysis of a pnp JT Circuit Example: Another DC Analysis of a JT Circuit Example: A JT Circuit in Saturation

2 12/3/2004 Steps for DC Analysis of JT Circuits 1/11 Steps for D.C. Analysis of JT Circuits To analyze JT circuit with D.C. sources, we must follow these five steps: 1. ASSUME an operating mode 2. ENFORCE the equality conditions of that mode. 3. ANALYZE the circuit with the enforced conditions. 4. CHECK the inequality conditions of the mode for consistency with original assumption. If consistent, the analysis is complete; if inconsistent, go to step MODIFY your original assumption and repeat all steps. Let s look at each step in detail. 1. ASSUME We can ASSUME Active, Saturation, or Cutoff!

3 12/3/2004 Steps for DC Analysis of JT Circuits 2/11 2. ENFORCE Active For active region, we must ENFORCE two equalities. a) Since the base-emitter junction is forward biased in the active region, we ENFORCE these equalities: E = 0. 7 (npn) E = 0. 7 (pnp) b) We likewise know that in the active region, the base and collector currents are directly proportional, and thus we ENFORCE the equality: ic = β i Note we can equivalently ENFORCE this condition with either of the the equalities: i = αi or i = ( β + 1) i C E E

4 12/3/2004 Steps for DC Analysis of JT Circuits 3/11 Saturation For saturation region, we must likewise ENFORCE two equalities. a) Since the base-emitter junction is forward biased, we again ENFORCE these equalities: E = 0. 7 (npn) E = 0. 7 (pnp) b) Likewise, since the collector base junction is reverse biased, we ENFORCE these equalities: C = 0. 5 (npn) C 0. 5 (pnp) Note that from KL, the above two ENFORCED equalities will require that these equalities likewise be true: CE = 0. 2 (npn) EC = 0. 2 (pnp)

5 12/3/2004 Steps for DC Analysis of JT Circuits 4/11 Note that for saturation, you need to explicitly ENFORCE any two of these three equalities the third will be ENFORCED automatically (via KL)!! To avoid negative signs (e.g., C =-0.5), I typically ENFORCE the first and third equalities (e.g., E = 0.7 and CE =0.2). Cutoff For a JT in cutoff, both pn junctions are reverse biased no current flows! Therefore we ENFORCE these equalities: i = 0 ic = 0 i = 0 E 3. ANALYZE Active The task in D.C. analysis of a JT in active mode is to find one unknown current and one additional unknown voltage! a) In addition the relationship i = β i, we have a second C useful relationship: i = i + i E C

6 12/3/2004 Steps for DC Analysis of JT Circuits 5/11 This of course is a consequence of KCL, and is true regardless of the JT mode. ut think about what this means! We have two current equations and three currents (i.e., i E, i C, i ) we only need to determine one current and we can then immediately find the other two! Q: Which current do we need to find? A: Doesn t matter! For a JT operating in the active region, if we know one current, we know them all! b) In addition to = 07. ( = 07)., we have a second E E useful relationship: = + CE C E (npn) = + EC E C (pnp) This of course is a consequence of KL, and is true regardless of the JT mode. Combining these results, we find: CE = + C 0. 7 (npn) EC = (pnp) C

7 12/3/2004 Steps for DC Analysis of JT Circuits 6/11 ut think about what this means! If we find one unknown voltage, we can immediately determine the other. Therefore, a D.C. analysis problem for a JT operating in the active region reduces to: find one of these values i, i, or i C E and find one of these values or ( or ) CE C EC C Saturation For the saturation mode, we know all the JT voltages, but know nothing about JT currents! Thus, for an analysis of circuit with a JT in saturation, we need to find any two of the three quantities: i, i C, i E We can then use KCL to find the third. Cutoff Cutoff is a bit of the opposite of saturation we know all the JT currents (they re all zero!), but we know nothing about JT voltages!

8 12/3/2004 Steps for DC Analysis of JT Circuits 7/11 Thus, for an analysis of circuit with a JT in cutoff, we need to find any two of the three quantities: ( ),, npn E E C C CE EC ( ),, pnp We can then use KL to find the third. 4. CHECK You do not know if your D.C. analysis is correct unless you CHECK to see if it is consistent with your original assumption! WARNING!-Failure to CHECK the original assumption will result in a SIGNIFICANT REDUCTION in credit on exams, regardless of the accuracy of the analysis!!! Q: What exactly do we CHECK? A: We ENFORCED the mode equalities, we CHECK the mode inequalities. Active We must CHECK two separate inequalities after analyzing a circuit with a JT that we ASSUMED to be operating in active mode. One inequality involves JT voltages, the other JT currents.

9 12/3/2004 Steps for DC Analysis of JT Circuits 8/11 a) In the active region, the Collector-ase Junction is off (i.e., reverse biased). Therefore, we must CHECK our analysis results to see if they are consistent with: C > 0 (npn) C > 0 (pnp) Since = , we find that an equivalent inequality is: CE C CE > 07. (npn) EC > 07. (pnp) We need to check only one of these two inequalities (not both!). b) In the active region, the ase-emitter Junction is on (i.e., forward biased). Therefore, we must CHECK the results of our analysis to see if they are consistent with: i > 0

10 12/3/2004 Steps for DC Analysis of JT Circuits 9/11 Since the active mode constants α and β are always positive values, equivalent expressions to the one above are: i > 0 and i > 0 C E In other words, we need to CHECK and see if any one of the currents is positive if one is positive, they are all positive! Saturation Here we must CHECK inequalities involving JT currents. a) We know that for saturation mode, the ratio of collector current to base current will be less than beta! Thus we CHECK: ic < β i b) We know that both pn junctions are forward biased, hence we CHECK to see if all the currents are positive: i > 0 i > 0 C i > 0 E

11 12/3/2004 Steps for DC Analysis of JT Circuits 10/11 Cutoff For cutoff we must CHECK two JT voltages. a) Since the EJ is reverse biased, we CHECK: E < 0 ( npn ) E < 0 ( pnp ) b) Likewise, since the CJ is also reverse biased, we CHECK: C > 0 ( npn ) C > 0 ( pnp ) If the results of our analysis are consistent with each of these inequalities, then we have made the correct assumption! The numeric results of our analysis are then likewise correct. We can stop working! However, if even one of the results of our analysis is inconsistent with active mode (e.g., currents are negative, or < 07. ), then we have made the wrong assumption! Time to CE move to step 5.

12 12/3/2004 Steps for DC Analysis of JT Circuits 11/11 5. MODIFY If one or more of the JTs are not in the active mode, then it must be in either cutoff or saturation. We must change our assumption and start completely over! In general, all of the results of our previous analysis are incorrect, and thus must be completely scraped!

13 12/3/2004 Hints for JT Circuit Analysis 1/2 Hints for JT Circuit Analysis 1. Know the JT symbols and current/voltage definitions! C E + i C + i E i v C - + i v E v E - v CE - + v C - v EC - E i E C i C 2. Know what quantities must be determined for each assumption (e.g., for active mode, you must determine one JT current and one JT voltage). 3. Write separate equations for the JT (device) and the remainder of the circuit (KL, KCL, Ohm s Law). 4. Write the KL equation for the circuit s ase-emitter Leg. In other words, write a KL that includes v E.

14 12/3/2004 Hints for JT Circuit Analysis 2/2 5. Forget about what the problem is asking for! Just start by determining any and all the circuit quantities that you can. If you end up solving the entire circuit, the answer will in there somewhere! 6. If you get stuck, try working the problem backward! For example, to find a resistor value, you must find the voltage across it and the current through it. 7. Make sure you are using all the information provided in the problem!

15 12/3/2004 Example DC Analysis of a JT Circuit 1/6 Example: D.C. Analysis of a JT Circuit Consider again this circuit from lecture: K Q: What is I, I C, I E and also CE, C, E?? K β = 99 A: I don t know! ut, we can find out IF we complete each of the five steps required for JT DC analysis. 2.0 K

16 12/3/2004 Example DC Analysis of a JT Circuit 2/6 Step 1 ASSUME an operating mode. Let s ASSUME the JT is in the ACTIE region! Remember, this is just a guess; we have no way of knowing for sure what mode the JT is in at this point. Step 2 - ENFORCE the conditions of the assumed mode. For active region, these are: = 0. 7 and I = β I = 99 I E C Step 3 ANALYZE the circuit. This is the IG step! Q: Where do we even start? A: Recall what the hint sheet says: Write KL equations for the base-emitter leg I think we should try that!

17 12/3/2004 Example DC Analysis of a JT Circuit 3/6 The base-emitter KL equation is: I 2I = 0 E E 1.0 K This is the circuit equation; note that it contains 3 unknowns (i, i C, and E ). 5.7 I 10 K + E β = 99 Now let s add the relevant device equations: K I E E = 07. I E = ( β + 1 ) = 100 I I Look what we now have! 3 equations and 3 unknowns (this is a good thing). Inserting the device equations into the -E KL: I ( 99+ 1) I = 0 Therefore: I =0 1 equations and 1 unknown!

18 12/3/2004 Example DC Analysis of a JT Circuit 4/6 Solving, we get: 5.0 I = = 23.8 µ A 210 Q: Whew! That was an awful lot of work for just one current, and we still have two more currents to find. A: No we don t! Since we determined one current for a JT in active mode, we ve determined them all! I.E., I C = β I = ma IE = ( β + 1 ) I = ma (Note that I C + I = I E ) Now for the voltages! Since we know the currents, we can find the voltages using KL. For example, let s determine CE. We can do this either by finding the voltage at the collector C (wrt ground) and voltage at the emitter E (wrt ground) and then subtracting ( CE = C E ). OR, we can determine CE directly from the C-E KL equation.

19 12/3/2004 Example DC Analysis of a JT Circuit 5/6 ( ) = I 1 C = = and: E C ( ) = 0+ I 2 = = Therefore, E K 1.0 K 2.0 K i C CE - i E C E CE = C E = 3.58 Note we could have likewise written the C-E KL: ( ) ( ) I 1 I 2 = 0 C CE E Therefore, ( ) ( ) = I 1 I 2 = CE C E Q: So, I guess we write the collector-base KL to find C? A: You can, but a wiser choice would be to simply apply KL to the transistor!

20 12/3/2004 Example DC Analysis of a JT Circuit 6/6 I.E., CE = C + E!! Therefore C = CE E = 2.88 Q: This has been hard. I m glad we re finished! A: Finished! We still have 2 more steps to go! Step 4 CHECK to see if your results are consistent with your assumption. For active mode: CE = 3.58 > 0.7 I = 23.8 µα > 0.0 Are assumption was correct, and therefore so are our answers! No need to go on to Step 5.

21 12/3/2004 Example An Analysis of a pnp JT Circuit 1/4 Example: An Analysis of a pnp JT Circuit Determine the collector current and collector voltage of the JT in the circuit below K K 1. ASSUME the JT is in active mode. 2. ENFORCE the conditions: = 0.7 and i = β i E C β = ANALYZE the circuit. 40 K 4K Q: Yikes! How do we write the base-emitter KL? A: This is a perfect opportunity to apply the Thevenin s equivalent circuit!

22 12/3/2004 Example An Analysis of a pnp JT Circuit 2/4 Thevenin s equivalent circuit: K 10 K 40 K 40 oc= 10 (40+10) = K 10 I sc= 10 = 1 ma Where th = oc = 8.0 and R th = oc /I sc = 8/1 = 8 K K R th =8 K + _ th = K Original Circuit Equivalent Circuit

23 12/3/2004 Example An Analysis of a pnp JT Circuit 3/4 Therefore, we can write the JT circuit as: i E K + NOW we can easily write the emitter-base leg KL: i v 8i = 8 0. E E 8.0 i 8 K - E β = 95 Along with our enforced conditions, we now have three equations and three unknowns! 4K Combining, we find: (96)i i = 8.0 Therefore, i = = = 0.01 ma 2(96) and collector current i C is: i = β i = 95(0.01) = 0.95 ma C Likewise, the collector voltage (wrt ground) C is: = i = 3.8 C C

24 12/3/2004 Example An Analysis of a pnp JT Circuit 4/4 ut wait! We re not done yet! We must CHECK our assumption. First, i = 0.01 ma > 0 ut, what is EC?? Writing the emitter-collector KL: i 4 i = 0 E CE C Therefore, EC = (96) (0.01) 4(0.95) = 4.98 > 0.7 Our assumption was correct!

25 12/3/2004 Example Another JT Circuit Analysis 1/3 Example: Another DC Analysis of a JT Circuit Find the collector voltages of the two JTs in the circuit below i 1 1 K 50 K β = β = 100 i 2 Q 2 Q K i C2 i C1 1 K ASSUME both JTs are in active mode, therefore ENFORCE = = 0. 7, i = 100 i, and i = 100 i 1 1 E E C1 1 C2 2

26 12/3/2004 Example Another JT Circuit Analysis 2/3 Q: Now, how do we ANALYZE the circuit?? A: This seems to be a problem! We cannot easily solve the emitter base KL, as i 1 is NOT EQUAL to i E1 (make sure you understand this!). Instead, we find: So, what do we do? i = i + i E1 1 2 First, ask the question: What do we know?? Look closely at the circuit, it is apparent that 1 = 5.3 and E2 = Hey! We therefore also know E1 and 2 : i 1 1 K 50 K β = 100 = + = = 6.0 E1 1 1 E 2 = - = = E2 E Q Q 1 i C1 β = K i K i C2 Wow! From these values we get: 10-E i= = =4 ma and E1 i = = = 0.02 ma 2

27 12/3/2004 Example Another JT Circuit Analysis 3/3 This is easy! Since we know i 1 and i 2, we can find i E1 : i E1 =i 1 + i 2 = = 4.02 ma Since we know one current for each JT, we know all currents for each JT: β 100 i = α i = i = 4.02 = 3.98 ma C1 E1 E1 β i = β i = 100(0.02) = 2 ma C2 2 Finally, we can determine the voltages C1 and C2. C1 = i C1 = (3.98) = 3.98 C2 = i C2 = (2.0) = 2.0 Now, let s CHECK to see if our assumptions were correct: i C2 = 2mA > 0 i C1 = 3.98 ma > 0 = - = = 2.02 > EC E1 C1 = - = = 5.0 > 0 2 C 1 C1 Assumptions are correct!

28 12/3/2004 Example A JT Circuit in Saturation 1/7 Example: A JT Circuit in Saturation Determine all currents for the JT in the circuit below K Hey! I remember this circuit, its just like a previous example. The JT is in active mode! K β = 99 Let s see if you are correct! ASSUME it is in active mode and ENFORCE CE = 0.7 and i C = β i. 2.0 K The -E KL is therefore: i (99+1) i =0 Therefore i = 23.8 µa

29 12/3/2004 Example A JT Circuit in Saturation 2/7 See! ase current i = 23.8 µa, just like before. Therefore collector current and emitter current are again i C = 99i = ma and i E = 100 i = ma. Right?! Well maybe, but we still need to CHECK to see if our assumption is correct! We know that i = 23.8 µa > 0 a, but what about CE? From collector-emitter KL we get: Therefore, i C CE 2 i E =0 CE = (2.36) 2(2.38) = < 0.7 X Our assumption is wrong! The JT is not in active mode. In the previous example, the collector resistor was 1K, whereas in this example the collector resistor is 10K. Thus, there is 10X the voltage drop across the collector resistor, which lowers the collector voltage so much that the JT cannot remain in the active mode. 2

30 12/3/2004 Example A JT Circuit in Saturation 3/7 Q: So what do we do now? A: Go to Step 5; change the assumption and try it again! Lets ASSUME instead that the JT is in saturation. Thus, we ENFORCE the conditions: CE = 0.2 E = 0.7 C = -0.5 Now lets ANALYZE the circuit! 5.7 i 10 K 10.0 K K i E i C Note that we cannot directly determine the currents, as we do not know the base voltage, emitter voltage, or collector voltage. ut, we do know the differences in these voltages! For example, we know that the collector voltage is 0.2 higher than the emitter voltage, but we do not know what the collector or emitter voltages are! 3

31 12/3/2004 Example A JT Circuit in Saturation 4/7 Q: So, how the heck do we ANALYZE this circuit!? A: Often, circuits with JTs in saturation are somewhat more difficult to ANALYZE than circuits with active JTs. There are often many approaches, but all result from a logical, systematic application of Kirchoff s Laws! ANALYSIS EXAMPLE 1 Start with KCL We know that i + i C = i E (KCL) ut, what are i, i C, and i E?? Well, from Ohm s Law: C E i = i = i = C E Therefore, combining with KCL: C + = E Look what we have, 1 equation and 3 unknowns. We need 2 more independent equations involving, C, and E! 4

32 12/3/2004 Example A JT Circuit in Saturation 5/7 Q: Two more independent equations!? It looks to me as if we have written all that we can about the circuit using Kirchoff s Laws. A: True! There are no more independent circuit equations that we can write using KL or KCL! ut, recall the hint sheet: Make sure you are using all available information. There is more information available to us the ENFORCED conditions! CE = C E = 0.2 C = E E = E = 0.7 = E Two more independent equations! Combining with the earlier equation: (0.7 + ) (0.2 + ) E E E + = One equation and one unknown! Solving, we get E =2.2. Inserting this answer into the above equations, we get: = 2.9 C = 2.4 i C = 0.83 ma i = 0.28 ma i E = 1.11 ma 5

33 12/3/2004 Example A JT Circuit in Saturation 6/7 ANALYSIS EXAMPLE 2 Start with KL 10.7 We can write the KL equation for any two circuit legs: 5.7 i 10 K 10.0 K i C E KL: i i E = 0.0 C-E KL: i C i E = K i E Note the ENFORCED conditions are included in these KL equations. Simplifying, we get these 2 equations with 3 unknowns: 5.0 = 10 i + 2 i E 10.5 = 10 i C + 2 i E We need one more independent equation involving i, i C, and i E. 6

34 12/3/2004 Example A JT Circuit in Saturation 7/7 Try KCL! i + i C = i E Inserting the KCL equation into the 2 KL equations, we get: 5.0 = 12 i + 2 i C 10.5 = 2 i + 12 i C Solving, we get the same answers as in analysis example 1. Lesson: There are multiple strategies for analyzing these circuits; use the ones that you feel most comfortable with! However you ANALYZE the circuit, you must in the end also CHECK your results. First CHECK to see that all currents are positive: i C = 0.83 ma > 0 a i = 0.28 ma > 0 a i E = 1.11 ma > 0 a Also CHECK collector current: i C = 0.83 ma < β i = 27.7 ma a Our solution is correct!!! 7