Resources. Introduction: Binding. Resource Types. Resource Sharing. The type of a resource denotes its ability to perform different operations

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1 Introduction: Binding Prt of 4-lecture introduction Scheduling Resource inding Are nd performnce estimtion Control unit synthesis This lecture covers Resources nd resource types Resource shring nd inding Grph models of resource inding Conflict grphs Templtes for rchitecturl synthesis A complete worked prolem 1/1/006 Lecture gc1 1 Resources We refer to piece of hrdwre tht cn perform specific function s resource e.g. 16x16-it multiplier, PCI interfce An opertion could e performed on one of severl resources e.g. multipliction could e performed on one of two physiclly distinct multipliers e.g. n ddition could e performed y specil-purpose dder, or n ALU. We re distinguishing here etween the opertion, nd the resource tht will execute tht opertion 1/1/006 Lecture gc1 Resource Types The type of resource denotes its ility to perform different opertions A multiplier cn do multiplictions An dder cn do dditions An ALU cn do comprisons nd dditions The resource type set R consists of ll the different resource types we hve ville R = {multiplier, dder, ALU} 1/1/006 Lecture gc1 3 Resource Shring Just ecuse we hve n dditions in n lgorithm, we don t need n dders In trditionl sequentil processors, we use just single dder to do ll the dditions in our progrm This is possile ecuse we hve scheduled them n dder is only used for one ddition t one time Using the sme resource to perform severl different opertions is resource shring Advntge: cn sve re nd pek power. Disdvntge: cn mke things slower nd use more energy. 1/1/006 Lecture gc1 4

2 Resource Shring Consider the code elow nd its scheduled DFG = + ; c = + 7; + + We could use two dders or one shred dder + D D /c c One fewer dder ut more MUXs, possily worse mx clock rte Need to generte select signls 1/1/006 Lecture gc1 5 Resource Binding Resource inding is the process of deciding which resource should perform which opertion Crtesin product denotes the Crtesin product of two sets A B = { (,) A, B } e.g. {,} {1,} = {(,1),(,),(,1),(,)} A resource inding is function Y: V R N 1/1/006 Lecture gc1 6 Resource Binding Revisiting our exmple v1 v (+,1) D (+,) c Y(v1) = (+,1) 7 Y(v) = (+,) Binding Grphs A hypergrph extends the notion of grph y llowing edges to e incident to ny numer of nodes We cn represent ound CDFG or DFG y hypergrph G (V,E E B ) 7 (+,1) D /c Y(v1) = (+,1) Y(v) = (+,1) v1 v v1 v E = { (v1,v) } E B = { {v1}, {v} } E = { (v1,v) } E B = { {v1,v} } 1/1/006 Lecture gc1 7 1/1/006 Lecture gc1 8

3 Conflict Grphs Sometimes we must ind opertions to different resources e.g. if they execute t the sme time Such informtion cn e represented using conflict grphs These hve the sme nodes s the corresponding DFG or CDFG. An edge corresponds to conflict two nodes connected y n edge cnnot e ound to the sme resource 1/1/006 Lecture gc1 9 Our exmple from Lecture 1 Conflict Grphs v1 v v3 v4 + v5 v10 v1 v3 v6 v7 + v8 < v9 - - v v4 v11 v6 Cycle 1 Cycle Cycle 3 Cycle 4 1/1/006 Lecture gc1 10 v7 Multiplier Conflict Grph Conflict Grphs In this exmple, the structure of the conflict grph is very simple two disjoint sets of nodes, ech one fully connected within itself This is ecuse ll opertions took single cycle with multicycle opertions, conflict grphs ecome more interesting nd importnt ( lter lecture ) Architecturl Templtes Once we hve schedule S nd resource inding Y, we know ll we need to construct our circuit In order to do this, the synthesis tool needs to hve templte in mind We will e working with register us-sed rchitectures: in one clock cycle vlues re red from registers, pss through multiplexers, nd get steered to the right resource the opertions re performed the results re written ck into the registers 1/1/006 Lecture gc1 11 1/1/006 Lecture gc1 1

4 Architecturl Templtes register is enled when it should e written to in tht clock cycle the select-lines decide which register to send to ech resource some resources my require dditionl control Worked Prolem Consider the following code: = i+j; = + j; c = ; d = ; () construct CDFG for the code () schedule the grph so tht ech opertion strts s soon s it cn, ssuming ech multipliction tkes two cycles nd ech ddition tkes one cycle (c) if you hve the resource type set R = {dder, multiplier}, construct resource inding for this exmple (d) drw the completed dt-pth (e) suggest wy you could sve re 1/1/006 Lecture gc1 13 1/1/006 Lecture gc1 14 Worked Prolem (-c) v v3 t1 + v4 # + # v1 v5 Cycle: Y(v1) = (dder,1) Y(v) = (multiplier,1) Y(v3) = (dder,1) Y(v4) = (multiplier,1) Y(v5) = (multiplier,) j Worked Prolem (d) i c d t1 (dder,1) (multiplier,1) (multiplier,) from control unit 1/1/006 Lecture gc1 15 1/1/006 Lecture gc1 16

5 Worked Prolem (e) Are could e sved y scheduling v5 in cycles 4-5, nd v4 in 6-7, t the penlty of one clock cycle (ctully if we pipelined one of the multipliers, we wouldn t hve to py ny penlty ) Summry This lecture hs covered Resources nd resource types Resource shring nd inding Grph models of resource inding Conflict grphs Templtes for rchitecturl synthesis A complete worked prolem Lter in the course, we will e exmining lgorithms to perform utomtic inding 1/1/006 Lecture gc1 17 1/1/006 Lecture gc1 18 Suggested Prolems De Micheli, Prolems 4.11, Q5 (ssume ll dditions tke one cycle) () For the inding hypergrph shown in De Micheli, Fig. 4.5, construct dtpth design (you my lel your registers in ny wy) () 1/1/006 Lecture gc1 19