LOGIC GATES A Y=A+B. Logic symbol of OR gate B The Boolean expression of OR gate is Y = A + B, read as Y equals A 'OR' B.
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1 LOGIC GTS J-Physics INTRODUCTION : logic gate is a digital circuit which is based on certain logical relationship between the input and the output voltages of the circuit. The logic gates are built using the semiconductor diodes and transistors. ach logic gate is represented by its characteristic symbol. The operation of a logic gate is indicated in a table, known as truth table. This table contains all possible combinations of inputs and the corresponding outputs. logic gate is also represented by a oolean algebraic expression. oolean algebra is a method of writing logical equations showing how an output depends upon the combination of inputs. oolean algebra was invented by George oole. SIC LOGIC GTS There are three basic logic gates. They are (1) OR gate (2) ND gate, and (3) NOT gate The OR gate :- The output of an OR gate attains the state 1 if one or more inputs attain the state 1. =+ Logic symbol of OR gate The oolean expression of OR gate is = +, read as equals 'OR'. Truth table of a two-input OR gate The ND gate :- The output of an ND gate attains the state 1 if and only if all the inputs are in state 1. Logic symbol of ND gate Input " Output The oolean expression of ND gate is =. It is read as equals 'ND' Truth table of a two-input ND gate The NOT gate : The output of a NOT gate attains the state 1 if and only if the input does not attain the state 1. Logic symbol of NOT gate :\Data\2014\Kota\J-dvanced\SMP\Phy\lectronics\ng\2. Logic Gates.p65 The oolean expression is =, read as equals NOT. Truth table of NOT gate COMINTION OF GTS : The three basis gates (OR, ND and NOT) when connected in various combinations give us logic gates such as NND, NOR gates, which are the universal building blocks of digital circuits. 29
2 J-Physics The NND gate : Logic symbol of NND gate Input " Output The oolean expression of NND gate is =. Truth table of a NND gate The NOR gate : Logic symbol of NOR gate The oolean expression of NOR gate is Truth table of a NOR gate UNIVRSL GTS : The NND or NOR gate is the universal building block of all digital circuits. Repeated use of NND gates (or NOR gates) gives other gates. Therefore, any digital system can be achieved entirely from NND or NOR gates. We shall show how the repeated use of NND (and NOR) gates will gives us different gates. The NOT gate from a NND gate :- When all the inputs of a NND gate are connected together, as shown in the figure, we obtain a NOT gate " 30 Truth table of a single input NND gate = () The ND gate from a NND gates :- If a NND gate is followed by a NOT gate (i.e., a single input NND gate), the resulting circuit is an ND gate as shown in figure and truth table given show how an ND gate has been obtained from NND gates. Truth table ' The OR gate from NND gates :- If we invert the inputs and and then apply them to the NND gate, the resulting circuit is an OR gate. Truth table :\Data\2014\Kota\J-dvanced\SMP\Phy\lectronics\ng\2. Logic Gates.p65
3 J-Physics The NOT gate from NOR gates :- When all the inputs of a NOR gate are connected together as shown in the figure, we obtain a NOT gate The ND gate from NOR gates :- If we invert the inputs and and then apply them to the NOR gate, the resulting circuit is an ND gate. The OR gate from NOR gate :- If a NOR gate is followed by a single input NOR gate (NOT gate), the resulting circuit is an OR gate. XOR ND XNOR GTS : The xclusive - OR gate (XOR gate):- The output of a two-input XOR gate attains the state 1 if one and only one input attains the state 1. Logic symbol of XOR gate The oolean expression of XOR gate is.. or = Truth table of a XOR gate xclusive - NOR gate (XNOR gate):- The output is in state 1 when its both inputs are the same that is, both 0 or both 1. :\Data\2014\Kota\J-dvanced\SMP\Phy\lectronics\ng\2. Logic Gates.p65 Logic symbol of XNOR gate The oolean expression of XNOR gate is.. or or Truth table of a XNOR gate 31
4 J-Physics LWS OF OOL N LGR asic OR, ND, and NOT operations are given below : O R N D N O T + 0 =. 0 = 0 + = = 1. 1 =. = 0 + =. =. = oolean algebra obeys commutative, associative and distributive laws as given below : Commutative laws : + = + ;. =. ssociative laws : + ( + C) = ( + ) + C. (. C) = (. ). C Distributive laws :. ( + C) =. +.C Some other useful identities : (i) + = (ii). ( + ) = (iii) + ( ) = + (iv). ( + ) =. (v) +(.C) = ( + ). ( + C) (vi) ( + ).( + C) =.C +. +.C De Morgan's theorem : First theorem :. Second theorem :. 32 :\Data\2014\Kota\J-dvanced\SMP\Phy\lectronics\ng\2. Logic Gates.p65
5 SUMMR OF LOGIC GTS J-Physics N a m e s S y m b o l oo l ean Truth table lectri cal Circuit diagram xpression a n a l o g u e (Practical Realisation) OR = + D 1 R ND " =. D R C CC NOT or Inverter = R R C NOR (OR +NOT) D 1 R 1 R R C NND. (ND+NOT) " D 1 R 1 R :\Data\2014\Kota\J-dvanced\SMP\Phy\lectronics\ng\2. Logic Gates.p65 XOR (xclusive or OR). XNOR (xclusive = or NOR).. or 33
6 J-Physics NUMR SSTMS Decimal Number system The base of this system is 10 and in this system 10 numbers [0,1,2,3,4,5,6,7,8,9] are used. x. 1396, are decimal numbers. inary Number System The base of this system is 2 and in this system 2 numbers (0 and 1) are used. x. 1001, are inary numbers. inary to decimal conversion We can write any decimal number in following form = = = Similarly we can write any binary number in following form = = = = x. 1 Conver t bi nar y number i nto decimal number = = = x. 2 Conver t bi nar y number i nto decimal number = = = Question for Practise : Convert the following binary numbers into decimal numbers (a) 101 (b) (c) (d) ns. : (a) 5 (b) (c) 31 (d) DCIML TO INR CONVRSION ou should remember this table for decimal to binary conversion x. 3 Convert the decimal number 25 into its binary equivalent Sol. 25= = so (25) 10 (11001) 2 x. 4 Convert 69 into its binary equivalent Sol. 69 = = (69) 10 ( ) 2 x. 5 Convert 13.5 into its binary equivalent 13.5 = = (13.5) 10 = (1101.1) 2 Question for Practise : Convert the following decimal numbers into binary numbers (a) 6 (b) 65 (c) 106 (d) 268 (e) ns. (a) 110 (b) (c) (d) (e) :\Data\2014\Kota\J-dvanced\SMP\Phy\lectronics\ng\2. Logic Gates.p65
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