Lecture 10: Synchronous Sequential Circuits Design

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Lucas Rice
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1 Lecture 0: Synchronous Sequential Circuits Design. General Form Input Combinational Flip-flops Combinational Output Circuit Circuit Clock.. Moore type has outputs dependent only on the state, e.g. ripple counters, and shift registers..2. Mealy type has outputs dependent on both the state and the input (additional dashed line in the diagram). If the input is not clocked, then the output may change at any time during a clock cycle. 2. Basic Design Steps 2.. For this demonstration we will create an edge detecting circuit. For this, we will define an edge as a position in a string of 0 s and s where a 0 is adjacent to a. Essentially, this an XOR of adjacent bits. Since this involves remembering the previous value, we will have different states of the machine State Transition Diagram minimizing the number of states We convert the word description that has states based on patterns of inputs, and transitions between states based on individual input values For our diagram, we will have S i as our start state, and label each state as S xy where x is the previous bit, and y is the current bit. This system ensures that each state has a unique label, and minimizes the number of states. The values inside each state are the output of the circuit, where 0 indicates no edge, and indicates an edge was detected. 0 S 0 0 S 00 S S i S S 0 S State Table = a table that lists all transitions from each present state to the next state for different values of the input signal. Note that the output z is specified with respect to the present state, and x is the next input. Present State Next State Output x = 0 x = z i Choice of Flip-Flops and Derivation of Next-State and Output Expressions For example we will keep things simple, and choose to use DFF Moore Model

2 Assign binary codes to each state. Since we have seven states, we will need three DFF to represent the possible states. We will have A, B, and C as the present state of the corresponding flip-flops Present State Binary Present State Input Next State Output Code A B C x A B C z i i Create K-Map for each flip-flop based on input and present state. A B C d 0 0 d d d 0 0 d 0 d A = BC + AC + B = C x + C= x Use derivations from the K-maps to design initial combinational circuit Create a K-Map based on flip-flops to determine the output combinational circuit. z C z = Mealy model usually involves less circuitry, and does here Just need a DFF to remember previous bit and then XOR with input!.

3 3. State-Assignment Problem 3.. One-Hot Encoding Parallel Register This is the end of the intro to sequential design. Next step is to use this stuff, start creating state diagrams and solving word problems. Now - how do we work with FF's? How do we design sequential circuits? Model of Sequential circuit: Remember our model? X----> > Z Idealized X2----> > Z2 Combinational Y+---> Y' Logic Y2' +--> ---+ Y Delay Element< Delay Element< Well, the delay elements are replaced by FF's, and you have this: X----> > Z X2----> > Z2 Combinational Y+---> Y' Logic Y2' +--> ---+ Y FF < FF < The set of FF's is a register, for example, and the combinational logic might be the adder. (I have left off all the...'s that should be in here - obviously there can be more than just 2 inputs and 2 outputs.) OK - designing sequential circuits. We need a way to convert a specification (a word description) into the circuitry necessary to make it happen. We start by developing a state transition diagram - from this we can figure out what needs to be done. So, for example, think of an electronic (or non-electronic, for that matter) lock. We need to describe the machine: Correct

4 Not st Number st+---- State > State # Wrong Number st Number received +---> Lock Closed < Lock Closed Incorrect ^ ^ 2nd Number Any Correct Input nd Number Incorrect 3rd Number \ / State 3 State 2 3rd Number in 2nd Number received Lock Open < Lock Closed Correct rd Number This State Transition diagram describes the behavior of the machine. Remember, State implies memory. We get to a given state based on a pattern of inputs. In digital design, memory = FF's. So we get to a given state based on the state we are currently in and the inputs at this time. Assume the lock has two buttons, only one button can be pushed at a time, and the combination is "LRL". To implement this, we need a couple more things - we need an input alphabet, an output alphabet, and a state alphabet. By convention, the state alphabet is usually in terms of Y's, the input alphabet is in terms of X's, and the outputs are in terms of Z's. What states? Y0, Y, Y2, etc. What inputs? X0, X, X2, etc. What outputs? Z0, Z, Z2, etc. So our lock has 4 states, Y0, Y, Y2 and Y3. (Draw 4 circles here, corresponding to the 4 boxes above. Put Y0 in upper left, Y in upper right, Y2 in lower right, Y3 in lower left. Now, draw in the arcs between circles indicating transitions, and write above each arc the input values. In the Moore model, the output value is put inside the circle. So an arc with 0 indicates left button high right button low, 0 is left low right high.) The state transition diagram points out an interesting question - should the output be a function of the current state only, or a function of the current state and the current inputs? This is up to the designer. The two different possibilities have distinct names: Mealy model - Outputs (Z's) are a function of the state we are in and the inputs at a given time. Moore model - outputs are a function purely of the current state. In the case of the lock, for instance - do you want the output to be high while you are pushing the 3rd number, or high until you push the next number (or for a fixed amount of time). Having it high only while pushing the last correct digit might make it tricky to get in the door if the lock is not right next to it. However, Mealy models almost always require less circuitry.

5 The ripple counter and shift register examples we did last time are Moore circuits - the output comes directly out of the FF's, and is independent of the current value of the input. Now show how the lock could be written with only 3 circles if Mealy model is used. (When writing Mealy model, you write the inputs above the arc as above, but the output is written immediately below the inputs. So 0/ would indicate the left button is high, right button low, and output is. 0/0 would indicate the left button is low, right button high, and output is 0).

Synchronous Sequential Circuit Design. Digital Computer Design

Synchronous Sequential Circuit Design Digital Computer Design Races and Instability Combinational logic has no cyclic paths and no races If inputs are applied to combinational logic, the outputs will always