3. Cautions for use 3-1. Voltage 3-2. Self heating 3-3. Mounting conditions 3-4. Storage conditions

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1 Technical Guide of Electrical Double Layer Capacitor 1. The Structure and Principles of Electrical Double Layer Capacitor 1-1. Principles of Electrical Double Layer Capacitor (EDLC) 1-2. Structure of EDLC 1-3. Equivalent circuit of EDLC 1-4. Features of Murata s EDLC 2. Electrical Characteristics of EDLC - How to select EDLC Capacitance and ESR of EDLC 2-2. Charge and discharge characteristics [1] Charge current [2] Charge characteristics [3] Calculation of discharging time 2-3. Factors to consider in selecting optimum specifications [1] Energy loss by ESR (internal resistance) [2] Effect of temperature [3] Degradation of capacitance and ESR caused by temperature and voltage change 3. Cautions for use 3-1. Voltage 3-2. Self heating 3-3. Mounting conditions 3-4. Storage conditions 1

1. The Structure and Principle of Electrical Double Layer Capacitor 1-1.

Instead, an electrolyte (solid or liquid) is filled between two electrodes (see figure 1).

Capacitance is proportional to the surface area of the electrical double layer. Therefore using activated carbon, which has large surface area for electrodes, enables EDLC to have high capacitance.

of the electrical double layer and EDLC is charged. Conversely, they move away when discharging EDLC. This is how EDLC is charged and discharged.

2 1. The Structure and Principle of Electrical Double Layer Capacitor 1-1. Principle of Electrical Double Layer Capacitor Unlike a ceramic capacitor or aluminum electrolytic capacitor, the Electrical Double Layer Capacitor (EDLC) contains no conventional dielectric. Instead, an electrolyte (solid or liquid) is filled between two electrodes (see figure 1). In EDLC, an electrical condition called electrical double layer, which is formed between the electrodes and electrolyte, works as the dielectric. Capacitance is proportional to the surface area of the electrical double layer. Therefore using activated carbon, which has large surface area for electrodes, enables EDLC to have high capacitance. The mechanism of ion absorption and desorption to the electrical double layer contributes to charge and discharge of EDLC By applying voltage to the facing electrodes, ions are drawn to the surface of the electrical double layer and EDLC is charged. Conversely, they move away when discharging EDLC. This is how EDLC is charged and discharged. (see figure 2) <Charge Complete> < > Electrical Double Layer Ion absorption Ion desorption 1-2. Structure of EDLC EDLC consists of electrodes, electrolyte (and electrolyte salt), and the separator, which prevents facing electrodes from contacting each other. Activated carbon powder is applied to the electricity collector of the electrodes. The electrical double layer is formed on the surface where each powder connects with an electrolyte (see figure 3) Figure 2: Charge and of EDLC 2 Considering this structure as a simple equivalent circuit, EDLC is shown by anode and cathode capacitors (C1, C2), separator, interelectrode resistance which consists of resistance of separator and electrolyte (Rs), electrode resistance which consists of activated carbon electrode and collector (Re),and isolation resistance(r) (see figure4)

moving (Rs) are shown by a complicated equivalent circuit where various resistances are connected to capacitors in series (see figure6).

3 1-3. Equivalent circuit of EDLC Activated carbon electrodes consist of a various size of powder with holes on their respective surfaces. The electrical double layer is formed on the surface where each powder contacts with the electrolyte (see figure5) Therefore, equivalent circuit electrode resistance (Re) and resistance caused by ion moving (Rs) are shown by a complicated equivalent circuit where various resistances are connected to capacitors in series (see figure6). Direction of + ion movement Separator Surface Figure 5: Electrode Structure Enlarged view of activated carbon 1-4. Features of Murata s EDLC Murata s EDLC achieves low ESR and high capacitance in a small package based on the technology introduced by CAP-XX Ltd. The reduction of ESR was achieved by reducing electrode resistance (Re) by using electrode structure and optimum raw materials, and reducing the interelectrode resistance (Rs) of separator and electrolyte. High discharge efficiency because of low ESR High voltage Small and slim package Low ESR even at low temperature Long cycle life exceeding 100k cycles Activated carbon Separator Aluminum foil Partition film DMF / DMT Series 3

4 2. Electrical characteristics of EDLC ~ How to select EDLC~ 2-1.Capacitance and ESR of EDLC Because EDLC has high capacitance, it can be used as an energy supply device for back up or peak power. Unlike a battery, the electric potential of EDLC becomes low by discharging EDLC. Therefore, energy stored in EDLC is shown by half of Q (charge) x V(voltage). However, EDLC consists of complicated equivalent circuit as shown in figure 6. As such, actual measured capacitance value varies depending on charge or discharge condition. Murata s EDLC is a suitable product for using with relatively large current or high power, so we measure nominal capacitance at 100mA. Calculation of capacitance < method> Temperature: 25 +/-5 EDLC after charging by max voltage for 30 minutes according to the profile and circuit (see figure 7). Charge/discharge current: 100mA V80%: 80% of Max voltage V40%: 40% of Max voltage t1: time to V80% t2: time to V40% Id: current (constant) Figure7 Profile Capacitance is calculated by the following formula (1). Nominal * capacitance (1) :AC current meter :AC voltage meter C :Capacitor *Reference:V80%-V40% based on capacitance at 100mA discharge Charge/discharge current 1A 100mA 10mA 1mA 0.1mA Capacitance 95% 100% 103% 107% 116% (Consider capacitance at 100mA discharge as 100%) Measuring circuit Nominal capacitance Calculation of ESR <AC method> ESR is measured by AC method. It is calculated with the following formula (2) by measuring voltage of both sides of the capacitor (Vc) applying 10mA Temperature: 25 +/-5 Frequency: 1 khz AC current (Ic): 10mA Capacitor voltage: Vc (2) :AC current meter :AC voltage meter :Oscillator C :Capacitor 4

5 2-2. Charge and discharge characteristics [1] Charge current As shown in figure 6, EDLC is an assembly of several capacitors which has various capacitances(c) and resistance (R) values. When EDLC s CR value is small, it can be charged in a short time. On the other hand, when CR value is large, it needs a long charging time. Therefore, the sum of In is considered as leakage current (LC). The current value that flows through RLC (the actual leakage R1 C1 current component) is too small to be measured. V -t In = exp ( ) (3) I1 R2 C2 Rn CnRn I2 R3 C3 V I3 Rn Cn In R LC ILC [2] Charge characteristics Constant voltage charge(constant resistance charge) As noted in section 2-1, when charging EDLC at a low current, it takes longer time than the charging time calculated according to the nominal capacitance. Charge voltage characteristic is shown by following formula (4). Constant voltage charge V = Vc { 1 Load current: I n-th capacitor: Cn n-th resistor: Rn n-th load current: In Leakage current; ILC Insulation resistance: RLC Charge voltage: V -t - exp( ) } CR Charge voltage: Vc Nominal capacitance: C Charge resistance: R (4) 5

6 [3] Calculation of discharging time Unlike a secondary battery, the voltage of EDLC drops according to discharge current. The voltage also drops proportionately because of the internal resistance (ESR) of the capacitor. These voltage drops affect output, especially when EDLC is used with high discharge current and a decrease in voltage. Therefore, it is necessary to calculate the needed characteristics (capacitance, ESR, series or parallel numbers of capacitors) considering the voltage drop. Calculation formulas are shown below. Discharging at constant current Discharging at constant power Discharging time (t) C t = (Vc-Vt) I Load current (constant): I voltage: Vc Capacitor voltage: Vt Capacitance: C Discharging time (t) 1 t = (CVc 2 -CVt 2 ) 2P Power (constant): P voltage:vc Capacitor voltage: Vt Capacitance: C (5) (6) Discharging at constant resistance Discharging time (t) Vt t = - C x R x In ( ) Vc Resistance (constant): R voltage: VC Capacitor voltage: Vt Capacitance: C (7) 6

2-3. Factors to consider in selecting optimum spec [1]Energy loss by internal resistance (ESR) [2]Effect of temperature [3]Degradation of

current, large power, or low ESR, it is necessary to consider energy loss caused by capacitor resistance.

2P t 0 Power: P voltage: Vc Capacitor voltage: Vt Capacitance: C Because Murata s EDLC has low ESR, energy loss caused by large current or

However, when output power or current becomes larger, discharge efficiency becomes low and in some cases EDLC cannot provide enough

7 2-3. Factors to consider in selecting optimum spec [1]Energy loss by internal resistance (ESR) [2]Effect of temperature [3]Degradation of capacitance and ESR caused by temperature and voltage change [1] Energy loss by ESR (internal resistance) When discharging EDLC at high current, large power, or low ESR, it is necessary to consider energy loss caused by capacitor resistance. t = C I (Vc - Vt - I x ESR) (8) Load current: I voltage: Vc Capacitor voltage: Vt Capacitance: C 1 t = (CVc 2 -CVt 2 ) - ESR x I(t) 2 dt 2P t 0 Power: P voltage: Vc Capacitor voltage: Vt Capacitance: C Because Murata s EDLC has low ESR, energy loss caused by large current or large power is small and discharge efficiency is high. However, when output power or current becomes larger, discharge efficiency becomes low and in some cases EDLC cannot provide enough discharging time. When discharging time is not enough, please use several EDLC in series or in parallel. (9) Constant current discharge profile(@25 ) (e.g. DMF series 350mF) Constant power discharge profile(@25 ) (e.g. DMF series 350mF) efficiency from 2.7V to1.0v 7

Efficiency from 5.5V to2.0v efficiency (constant current discharge) efficiency (constant power discharge) 1A 2A 4A 8A 1W 5W 10W 20W Charge(C) Q 1.21 1.16 1.08 0.93 energy(j) 4.58 4.22 3.82 3.

capacitance. Q0=C (Vc-Vt) =0.35 x (5.5-2.0)=1.23(C) E0= 1 x C(Vc 2 -Vt 2 ) = 0.5 x 0.35(5.5 2-2.0 2 )=4.59(J) 2 [2] Effect of temperature ESR of EDLC depends on temperature.

8 Efficiency from 5.5V to2.0v efficiency (constant current discharge) efficiency (constant power discharge) 1A 2A 4A 8A 1W 5W 10W 20W Charge(C) Q energy(j) E efficiency (%) Q/Q efficiency (%) E/E Standard charge (Q 0 ) calculation Standard discharge energy (E 0 ) calculation using nominal capacitance using nominal capacitance. Q0=C (Vc-Vt) =0.35 x ( )=1.23(C) E0= 1 x C(Vc 2 -Vt 2 ) = 0.5 x 0.35( )=4.59(J) 2 [2] Effect of temperature ESR of EDLC depends on temperature. When temperature becomes low, ESR becomes high. Therefore, when using EDLC at low temperature, discharge efficiency becomes low. Although Murata s EDLC is designed to provide stable output throughout a wide range of temperatures, consider energy loss by ESR increase if needed efficiency data (DMF rated voltage 5.5V, nominal capacitance 330mF, ESR60mΩ) Charge condition: 5.5V 30min efficiency from 5.5V to 2.0V is shown below in two patterns: Constant current discharge profile and constant power discharge profile. efficiency at low temperature is lower than at room temperature < Constant current discharge profile > < Constant power discharge profile > (e.g. DMF series 350mF) (e.g. DMF series 350mF) <Constant current discharge> < Constant power discharge > 1A 2A 4A 1W 5W 10W Charge(C) energy(j) Q E efficiency (%) efficiency (%) Q/Q E/E Standard charge (Q 0) calculation Standard discharge energy(e 0 ) calculation using nominal capacitance using nominal capacitance Q 0 =C(Vc-Vt)=0.35 x( )=1.23(c) E 0 = 1 x C(Vc 2 -Vt 2 ) = 0.5 x 0.35( )=4.59(J) 2 8

9 Capacitance change ESR change [3] Degradation of capacitance and ESR caused by temperature and voltage change Generally speaking, when temperature drops 10 degrees, the life time of EDLC is doubled. EDLC has two degradation patterns. One is degradation of the electrochemical system (such as electrode or electrolyte caused by applying voltage) and the other is drying up by the evaporation of electrolyte. In both cases, ESR increases and capacitance decreases. The final failure is open mode by increasing internal resistance. In order to use EDLC reliably over the long term, close attention must be paid to the operating temperature condition. How much the voltage accelerates degradation is still not fully understood. It depends on voltage condition and environment of usage. For details, please contact your local Murata representative. (Example) Degradation of capacitance and ESR 0% -10% -20% -30% -40% -50% Capacitance Time (hr) 100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% ESR Time (hr) For example, according to above graph, the capacitance drops to 15% at 1000hrs. The time the capacitance drops to 15% under the condition of 4.2V, 40 is calculated by the following formula: 1,000hrs x 2 (70-40/10) =8,000hrs 9

10 If you would like to provide the information requested for the conditions below, Murata can make more detailed proposals based on customer-specific applications. condition of capacitor Condition EDLC voltage 1. Max charge voltage VMax Early voltage characteristic 2. Allowable Min.voltage Vmin Discharging time Required charge (c)or Energy (J) Energy (J) =Power (W) x Discharging time t(sec) Charge (c) = Current (A) x Discharging time t(sec) Charge condition condition Usage environment Condition Example Purpose Charge voltage for 2.5V To confirm required number of cells in capacitor series and consider discharge time. Charge voltage Vmax Charge current 500mA (in case of constant current charge) Charge(C) or Energy(J) Power time(w x sec) or Current time(a sec) Numbers of discharge on a single charge Accepted lower limit of voltage Vmin Minimum operation temperature Actual usage temperature profile 150mJ or 300mC 1.5W 100msec or 3A 100msec Numbers of discharge on a single charge ( 5 times) 1.3(V) To confirm required current Regarding discharge effectiveness, it is necessary to consider max power or current because it is affected by energy loss caused by internal resistance To calculate the discharging time. -20 At low temperature, discharge effectiveness decreases because of ESR increase. Under 40 (typ) 30000hrs 70 (Max) Under 500hrs Others Loss on the circuit Effectiveness(%)or Resistance(Ω) To confirm capacitance decrease and ESR increase throughout the product life To Confirm required capacitance 10

11 3. Cautions for use 3-1. Voltage Resistance voltage of EDLC By using an organic electrolyte, Murata's EDLC provide high voltage. However, applying a higher voltage than rated voltage on EDLC may cause degradation. Please ensure not to apply excessive voltage on EDLC. Murata' EDLC consists of two individual cells connected electrically in series. When using EDLC, voltage may become unbalanced between two cells and excessive voltage may be applied to either cell. Therefore, consider applying enough voltage margin and balance control. Voltage balance When using EDLC, please be sure to control voltage balance of each cell for the following two purposes; - To prevent over-voltage: Prevent excessive voltage from being applied to any cell - To prevent shortening of the life time: By making capacitor voltage equal, variation in the rate of degradation can be controlled. It allows long-term use of capacitors. For details about recommended balance condition, please see our specification sheet or web page. If there are temperature gaps between capacitors, voltage will lose balance. Ensure that there is no temperature gap between capacitors. Series/Parallel use Use several capacitors in series according to required voltage. When discharging time needs to be increased, please use several capacitors in parallel Polarity Verify the orientation of EDLC before use in accordance with the markings of polarity on the products. In principle, EDLC has no polarity. However, EDLC cannot be used under AC. Using EDLC under AC condition may cause degradation and leakage 3-2. Self Heating Please use EDLC under ensured temperature considering self heating of a capacitor. Please see our specification sheet for further details Mounting condition Murata s EDLC product is non reflowable due to the internal chemical system. For mounting, please use solder iron or special connector. Please see our specification sheet for recommended soldering 3-4. Storage condition Please avoid storage at high temperature or high humidity. Please see our catalog or specification sheet for further details. 11

Double Layer Capacitors. PN: NEX_ series & NED_ series

Double Layer Capacitors. PN: NEX_ series & NED_ series Rev B - August 2010 www.niccomp.com Technical support: tpmg@niccomp.com Double Layer Capacitors PN: NEX_ series & NED_ series NEXC SMT Reflow Soldering NEXA / NEXG NEXS / NEXT Low Profile Radial LDD NEXM