Input Impedance and Transfer Function of N-Stage Cockcroft-Walton Voltage Multiplier

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1 Input Impedance and Tranfer Function of N-Stae ockcroft-walton Voltae ltiplier Xavier Le Polozec Abtract Thi paper provide theoretical prediction of the differential input impedance, tranfer function, and frequency repone of a N-Stae ockcroft Walton multiplier. It i baed on the itz-galerkin method ued with an approximation of the diode unction reitance variation with F power. A nonlinear detector model, valid for any F input power level, frequency, output load or temperature i derived. alculated reult are preented for everal circuit confiuration and confirmed by ADS and meaurement. Index Term Schottky diode, detector model, ockcroft Walton multiplier, multiplier, input impedance, frequency repone, Greinacher multiplier I I. INTODUTION t ha been hown [], [] that the itz-galerkin (-G) averain method can be ued to calculate the tranfer function of a erie diode detector with a ood accuracy. The analyi ha been extended [3], [4] to the frequency domain and ued to calculate the differential input impedance of a erie diode detector. Thi method wa implified [5] and a imple formula wa propoed to calculate the diode unction reitance variation with power. Thi formula wa ued with the itz-galerkin averain method involvin only one condition to calculate tranfer function and input impedance in the frequency domain of a erie diode detector. The ame approach i applied, in the preent paper, to a N-tae ockcroft-walton voltae ltiplier. After definin the nonlinear Schottky-diode model, the differential equation decribin a ockcroft-walton doubler tructure i iven. Application of the -G method to thi differential equation lead to a cloed-form olution. which i then modified to take into account the doubler input impedance over the input circuit repone. The reultin analyi alorithm i then ued to calculate the performance of detector circuit in everal different application. Dependence of the D output voltae, and differential input impedance, upon the input F power level are preented. The predicted reult are found to be in very ood areement with ADS [6] imulation. X. Le Polozec i with the Enaement Practice FB, Ericon, 9348 May, France ( xavier.le-polozec@ericon.com). II. NONLINEA ANALYSIS Fi. (a) how a typical model of a microwave -tae ockcroft-walton voltae multiplier or doubler. In the preent paper Schottky diode D i uppoed to be identical to diode D. Fi (b) and (c) how ockcroft-walton voltae quadrupler and multiplier repectvly. A. Schottky Diode haracteritic The diode are modeled a a varitor element that obey the followin i-v law: i I exp v / n () i I exp v / n () where = q/(kt) i the reciprocal of the thermal voltae, q i the electronic chare, k i the Boltzmann contant, T i the phyical temperature in Kelvin, and n i the diode ideality factor aumed to be temperature independent. The diode model include a erie reitance aumed independent of both voltae and temperature. The unction capacitance i alo aumed temperature-independent but voltae dependent accordin to M ( V) V / V (3) where V i the D voltae acro each unction, i the unction capacitance value when V =, M i the unction radin coefficient and V i the unction potential. In Fi., the D voltae acro each diode i V L V V V (4) L where V i the D component of the output voltae v. The aturation current I at temperature T i iven by []: I / n T I T T / T exp q / k/ T T (5) m / where T i a reference temperature and m i the metal emiconductor Schottky barrier heiht (enery ap) at temperature T. B. Differential Equation A imple analyi of the circuit in Fi. ive the followin equation:

2 i F id id (6) if dvc dt (7) id v dv dt (8) L L id i dv dt (9) id i dv dt () v if vc id v () v if vc id v v () id id v v (3) v Uin (), (5), (6) and (7) ive the followin differential equation: o o aexp x yb b y z z (4) o o oo oo o o x yb b y z z y y where x=(/n) i an input forcin function provided by the input network, y=(/n)v i the normalized output voltae, and z=(/n)v c i the normalized voltae acro. The other quantitie are a = (/n) LI, b = / L, = / L, = / L, and = / L. The ymbol and indicate d/d and d /dt repectively, where = t/( L L). A way to reduce the number of variable in (4) i to evaluate z the normalized voltae acro. oniderin (6), (), () the followin equation can be written v v vc if v v (5) The D component of and i F bein both equal to (i F ha no D component due to ), then equation (5) can be rewritten in the D domain a follow V V V c V (6) A V equal V then the D component of v c can be deduced from (6) and i expreed a below V c V (7) Thi reult can be eaily found by coniderin the D equivalent circuit of the doubler a hown in in Fi. (a). If we conider very lare, then v c i reduced to it D component V c (ripple nelected). V dv c v c Vc i (8) F dt Uin (8), equation (5) can be re-written in the A domain a follow v v (9) Thi reult can be eaily found by coniderin the A equivalent circuit of the doubler hown in in Fi. (b). By coniderin (8), expreion (4) can be implified and reduced a below o aexp x yb b y Y o o x y where Y = (/n)v oo b b y y y o () Aumin an F ource of anular frequency, with = V co ( t), the normalized forcin function i: x X co () where = L L, and X = (/n)v. Application of the itz Galerkin Averain Method To apply the -G method, the differential equation mut be repreented in the form: x, y, t, d / dt, d / dt () where i a nonlinear operator. In thi paper i defined in (), and the aumed approximate olution y(t) of () i: y t N t Y (3) where the are N linear independent function and the Y are N adutable contant coefficient. Since the aumed olution (3) doe not in eneral exactly atify the differential equation, the expreion obtained by ubtitutin (3) into () i no loner identically equal to zero: x, y, t, d / dt, d / dt t, (4) where (t) i the reidual that meaure the error. Thi error i minimized if the followin ytem of N weihted reidual, called the itz condition, i atified. t t x, y, t, d / dt, d / dt t dt,,,... N (5) Thi procedure ive a ytem of N alebraic equation in N unknown. Here, the output conit of a D voltae V when ripple i nelected. Thu one may aume the olution to be

3 y Y (6) where Y, a previouly defined, i the normalized D output voltae. The number of itz condition to be atified i then reduced to one and it can be written a follow:, y,, d / d, d / d d x (7) Performin the interation pecified in (7) with, x, and y defined repectively in (), (), (6), the followin expreion i obtained x Y a exp Y b II (8) By denormalizin (8), the tranfer Function of a ockcroft- Walton Doubler i iven by V V L II V Exp (9) n LI n L where II i the zero order modified Beel function of the firt kind. Equation (9) ha to be compared to the tranfer function iven in [] for a erie diode detector and reminded below. V V L II V Exp (3) n LI n L The two tranfer function (9) and (3) have a imilar form. We can aume that a N-tae voltae multiplier, uin =N diode, ha a tranfer function defined by the followin equation. V V L II V Exp (3) n LI n L D. Differential Input Impedance of a ockcroft-walton Doubler With only one itz condition the averain method of itz and Galerkin intrinically conider the doubler input impedance equal to infinity a hown in Fi. 3 (a). Thi i the reaon why i not preent in (3). Thi i alo a conequence of aumption (8). To improve the accuracy, (9) can be modified to take into account the influence of the finite doubler input impedance on the tranfer function a illutrated in Fi. 3 (b). If we conider the ockcroft-walton voltae doubler a a black box the input impedance, een from the enerator, i equivalent to diode in parallel (when and L are both conidered very lare) a hown in Fi. (b). Let aume that in a voltae doubler, the unction reitance of each diode i iven by the followin equation Ve (3) d V n V I ln V V L L I n With V defined in (4), and V e defined a the voltae acro, which i the input impedance of the ockcroft-walton voltae doubler The impedance of one diode i expreed a d d d With d iven in (3) and iven in (3). (33) For of a ockcroft-walton voltae doubler, involvin diode (=), the input impedance een from the enerator i equivalent to two diode in parallel ( and L are both aumed to be very lare) d d d E. Differential Input Impedance of N-Stae ockcroft- Walton ltplier (34) For of a N-tae multiplier, involvin diode (=N), the input impedance een from the enerator i equivalent to diode in parallel d d (35) d With d iven in (3) and iven in (3) with V expreed, for a multiplier involvin diode (=N), a below V V V L V L L (36) The equivalent parallel form of, illutrated in Fi. 3 (b), can be calculated with the well-known converion formula below And e Im e (37) Im e Im (38) Where e( ) and Im( ), are repectively the real part and imainary part of the complex value Thi expreion wa found by uin a heuritic approach (i.e. a tep by tep approach)

4 F. Final Tranfer Function of an N-Stae ockcroft- Walton ltplier To take into account the influence of the input impedance defined in (35) on the tranfer function of a multiplier V i imply replaced by V e in (3) V V L II Ve Exp (39) n LI n L The relation between the ource voltae V and the voltae V e (voltae acro the input impedance of the ockcroft- Walton voltae multiplier ) i a follow V d Ve V (4) e d The relation between P inc and the ource voltae V i V / 4 P P V / 8 (4) inc inc Finally, the tranfer function can be written a below 8 Pinc V II n LI With defined in (35) G. Solution V Exp n L L (4) Expreion (39), (4), and (4) are the main reult of thi paper. In conunction with (35) and the component of iven by (3) and (3), we ue them to calculate the detector tranfer function. The followin procedure ive P inc and a function of the D output voltae V. A. Tet ircuit III. ESULTS Three type of ockcroft-walton voltae multiplier are conidered in thi paper; doubler (=), quadrupler (=4) and octupler (=8). Each of them i connected to five different load. The theoretical prediction calculated with the itz-galerkin method are compared with ADS reult. Table I lit pecific parameter for the different verion of ockcroft-walton voltae multiplier, a identified in column. The parameter of the modeled diode (HSMS 86 from Avao Technoloie) are: I o = 5nA, n =.8, = 6 Ohm, m =.69V, V =.65V, M =.5, o =.8pF. Parameter value ued in thee imulation are: operatin central frequency GHz,,=5, = µf, L = µf. In keepin with the pirit of thi paper, thee value were choen to illutrate a rane of different operatin cenario. They are not intended to be a uide to actual detector dein and manufacture. TABLE I PAAMETES FO DIFFEENT VESIONS OF MULTIPLIES Verion L () D x 7 D x 5 D3 x 4 D4 x 3 D5 x Q 4 x 7 Q 4 x 5 Q3 4 x 4 Q4 4 x 3 Q5 4 x M 8 x 7 M 8 x 5 M3 8 x 4 M4 8 x 3 M5 8 x A often happen when obtainin the olution of a nonlinear problem the input (the input power P inc in thi cae) i obtained a a function of the output (the output voltae V here). -hooe V -Knowin V, olve (39) for V e. Thi can be done uin a uitable root-findin function, available in typical mathematical oftware. -Knowin and V, calculate V the voltae acro each diode from (33) -Knowin V, calculate (V) a defined in (3) -Knowin V, V e, and V, calculate d from (3) -Knowin,, d, calculate from (35) -Knowin, and V e, calculate V from (4) -Finally calculate P inc from (4) The procedure above i eaily implemented in typical mathematical oftware. B. Differential Input Impedance alculated variation of and, with F input power are hown in Fi. 4 and 5 repectively for all circuit verion. In the preent paper, the value, are noted, for a doubler (=), 4, 4 for a quadrupler (=4), and 8, 8 for an octupler (=8). When the F input power decreae below - dbm, and reach contant value that depend repectively on the unction capacitance multiplied by and the well-known mall inal differential unction reitance of one diode divided by. (43)

5 n I (44) Fi. 4. (a) Theoretical evolution of the hunt equivalent input reitance with the F input power Pin at GHz, for circuit confiuration D to D5, ee Table I. (b) 4 for circuit Q to Q5. (c) 8 for circuit M to M5. Solid line ive reult calculated with the itz-galerkin method, and ymbol with ADS. Fi. 5. (a) Theoretical evolution of equivalent hunt input capacitance with F input power Pin at GHz, for circuit confiuration D to D5, ee Table I. (b) 4 for circuit Q to Q5. (c) 8 for circuit M to M5. Solid line ive reult calculated with the itz-galerkin method, and ymbol with ADS. When the F input power exceed 5 dbm, decreae continuouly, while approache a limitin value that depend on L/ a detailed hereafter. At very hih power level the multiplier act a a rectifier o that the D output voltae V i cloe to V e provided that equal and the impedance of L i much le than L. Under thee condition, all of the F input power i converted into D power. The power budet i then

6 v e _ rm e L V V (45) Finally, i expreed from (45) a below: L (46) The reult iven by the -G method for are imilar to thoe predicted reult iven by ADS while the reult iven for are imilar to thoe predicted reult iven by ADS, except at hih power level for extremely hih value of L circuit ( L equal 5 and 7 ).. Detector Tranfer Function A een in Fi. 6, the variation of V with P in, a predicted by the -G method, i in excellent areement with the ADS calculation. When the load value i extremely low, the output D voltae provided by an octupler i paradoxically le than the output voltae provided by a doubler (or a quadrupler). Thi i the influence of the octupler (or the quadrupler) input impedance over the input circuit which dratically reduce the voltae V e. Fi. 6. (a) Theoretical evolution of the tranfer function with F input power Pin at GHz, for circuit confiuration D to D5, ee Table I. (b) for circuit Q to Q5. (c) for circuit M to M5. Solid line ive reult calculated with the itz-galerkin method, and ymbol with ADS. A. Tet ircuit IV. MEASUEMENT ESULTS Tranfer function calculated with the method expoed in the preent paper, are alo compared with meaurement that have been courteouly and kindly provided by Dr. H.J. Vier from Holt entre IME. Dr H.J Vier publihed a lot of paper dealin with voltae multiplier analyi [7], [8]. Table II lit pecific parameter for the different verion of ockcroft-walton voltae multiplier, a identified in column. The parameter of the modeled diode (HSMS 85 from Avao Technoloie) are: I o = 3µA, n =.6, = 5 Ohm, m =.69V, V =.35V, M =.5, o =.8pF. Parameter value ued in thee imulation are: operatin central frequency.45 GHz,,=5, = µf, L = µf. TABLE II PAAMETES FO DIFFEENT VESIONS OF MULTIPLIES Verion L () Dv x 6 Dv x 5 D3v x 4 D4v x 3 D5v x Qv 4 x 6 Qv 4 x 5 Q3v 4 x 4 Q4v 4 x 3 Q5v 4 x Mv 8 x 6 Mv 8 x 5 M3v 8 x 4 M4v 8 x 3 M5v 8 x

7 V. ONLUSION It ha been hown that a imple formula can be ued to calculate input impedance variation with power of an N-Stae ockcroft-walton Voltae ltiplier. In conunction with the averain method of itz and Galerkin (limited to one condition in thi cae), the propoed formula provide a way to et evaluation of performance of any N-Stae ockcroft- Walton Voltae ltiplier. Invetiation how that thi model i valid over a wide rane of load, and F input power level. It ha been hown that when input power i very hih, the differential input impedance of a ockcroft-walton Voltae ltiplier (uin diode) become independent of, but i dependent on L/. EFEENES []. G. Harrion, Full nonlinear analyi of a detector circuit uin the itz-galerkin theory, IEEE MTT-S Sympoium Diet, Albuquerque, NM, USA, pp. 67-7, June 99. []. G. Harrion and X. Le Polozec, Nonquarelaw behaviour of diode detector analyed by the itz-galerkin method, IEEE Tran. Microwave Theory Technique, MTT-4, pp , May 994. [3] X. Le Polozec and. G. Harrion, A full-rane nonlinear diode detector model defined with the itz-galerkin method, DOI:.34/G [4] X. Le Polozec, Input Impedance of Serie Schottky Diode Detector at Low and Hih Power, DOI:.34/G [5] X. Le Polozec, A Simple Formula to alculate the Diode Junction eitance Variation with F Power of a Serie Schottky Diode Detector, DOI:.34/G [6] Keyiht Advanced Dein Sytem (ADS) [computer oftware], (Verion 6), [7] Hubret J. Vier & al, Wirelely ead-out Temperature Senor emotely Powered by a GSM Phone, PowerMEMS, January [8] Hubret J. Vier & al, emote F Battery harin, PowerMEMS : th International Workhop Micro & Nanotechnoloy for Power Generation and Enery onverion Application, Leuven, Belium, 3 November-3 December Fi. 7. (a) Theoretical evolution of the tranfer function with F input power Pin at.45 GHz, for circuit confiuration Dv to D5v, ee Table II. (b) for circuit Qv to Q5v. (c) for circuit Mv to M5v. Solid line ive reult calculated with the itz-galerkin method, and ymbol are for meaurement.

8 i F v c id i v id i v L L v (a) v L (b) v L (c) Fi.. (a) Structure of the ockcroft-walton voltae doubler conidered for analyi. (b) Structure of the ockcroft-walton voltae quadrupler conidered for analyi. (c) Structure of the ockcroft-walton voltae multiplier conidered for analyi.

9 V / Id =Id I =I V c V / Id I V =V V L V L (a) v i F id i id v e i v (b) Fi.. (a) D equivalent circuit of a ockcroft-walton voltae doubler. (b) A equivalent circuit of a ockcroft-walton voltae doubler. i F i F = infinity v e = v e (a) (b) Fi. 3. (a) The multiplier input impedance a een with aumption (8), (b) Model ued in thi paper

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