Transistors E ITT INTERMETALL

Transcription

1 Transistors 6--E ITT INTERMETALL

2 All information and data contained in this data book are without any commitment, are not to be considered as an offer for conclusion of a contract nor shall they be construed as to create any liability. Any new issue of this data book, or individual product data sheets, invalidate previous issues. Product availability and delivery dates are exclusively subject to our respective order confirmation form; the same applies to orders based on development samples delivered. By this publication, INTERMETALL does not assume responsibility for patent infringements or other rights of third parties which may result from its use. Reprinting is generally permitted, indicating the source. However, our prior consent must be obtained in all cases. Printed in Germany Imprimé dans la République Fédérale d Allemagne by Rombach GmbH Druck- und erlagshaus, 79 Freiburg Edition September 996 Order No. 6--E ITT INTERMETALL

3 Page Contents List of Types to 7 Technical Information 9 to 6 Small-Signal Transistors (NPN) 67 to Small-Signal Transistors (PNP) to 7 DMOS Transistors (N-Channel) 9 to 87 DMOS Transistors (P-Channel) 89 to 9 Darlington Transistors 9 to 99 Bias Resistor Transistors to Addresses Alphanumerical List of Types ITT INTERMETALL

4 List of Types Type Page Type Page Small-Signal Transistors (NPN) N9 N BC7-6, -, - BC8-6, -, - BC6-A, -B 6 BC7-A, -B, -C 6 BC8-A, -B, -C 6 BC9-B, -C 6 BC87-6, -, - BC88-6, -, - BC86-A, -B 8 BC87-A, -B, -C 8 BC88-A, -B, -C 8 BC89-B, -C 8 BF BF BF8 6 BF8 6 MMBT9 8 MMBTA 6 MMBTA 6 MPSA 6 MPSA 6 Small-Signal Transistors (PNP) N96 68 N6 7 BC7-6, -, - 78 BC8-6, -, - 78 BC6-A, -B 8 BC7-A, -B, -C 8 BC8-A, -B, -C 8 BC9-A, -B, -C 8 BC87-6, -, - 9 BC88-6, -, - 9 BC86-A, -B 96 BC87-A, -B, -C 96 BC88-A, -B, -C 96 BC89-A, -B, -C 96 BF BF BF8 BF8 MMBT96 6 MMBTA9 MMBTA9 MPSA9 MPSA9 DMOS Transistors (N-Channel) N7 6 N7 BS8 8 BS9 BS 6 BS7 8 BS6 6 BS89 BS88 6 BS87 DMOS Transistors (P-Channel) BS8 6 BS9 66 BS 68 BS 7 BS7 76 BS88 78 BS89 8 BS8 8 Darlington Transistors BC7 9 BC6 9 Bias Resistor Transistors DTCEK 96 DTCXK 98 ITT INTERMETALL

5 Technical Information ITT INTERMETALL

6 Technical Information Index of Symbols b Imaginary part of y-parameters b f Imaginary part of forward transconductance y f b i Imaginary part of input admittance y i b o Imaginary part of output admittance y o b r Imaginary part of reverse transconductance y r B Base connection B G Imaginary part of generator (source) impedance C Capacitance; junction capacitance; collector connection C i Input capacitance (b i / π f) C o Output capacitance (b o / π f) C CBO Collector-Base capacitance (open emitter) C EBO Emitter-base capacitance (open collector) C iss Input capacitance C r Feedback capacitance (b r / π f) E Emitter connection f Frequency f T Gain-bandwidth product F Noise figure F c Noise figure in mixer stages g Real part of y-parameters g f Real part of forward transconductance y f g i Real part of input admittance y i g m Forward transconductance g o Real part of output admittance y o g r Real part of reverse transconductance y r g s Generator conductance G C Current gain G P Power gain G P av Available power gain G P max Max. available power gain G oltage gain h Parameters of h- (hybrid) matrix h f Small-signal current gain h i Input impedance h o Output admittance h r Reverse voltage transfer ratio h FE DC current gain, common emitter I B Base current I BM Peak base current I B Turn-on current I B Turn-off current I C Collector current I CA Average collector current I CBO Collector-base cutoff current (open emitter) I CEO Collector-emitter cutoff current (open base) I CER Collector-emitter cutoff current (specified resistance between base and emitter) I CES Collector-emitter cutoff current (base shortcircuited to emitter) I CE Collector-emitter cutoff current (specified voltage between base and emitter) I CM Peak collector current I D Drain current I DSS Drain cutoff current I E Emitter current I EBO Emitter-base cutoff current (open collector) I GSS Gate-body leakage current K Thermal resistance correction factor P tot Power dissipation P D Continuous power dissipation P I Pulse power dissipation r b C C Collector-base time constant r DS (ON) Drain-source-on resistance r tha Pulse thermal resistance junction to ambient air r thc Pulse thermal resistance junction to case R Resistance; resistor R BE Resistance between base and emitter R G Generator impedance; source impedance R G opt Optimum (matched) generator resistance R L Load resistance R L opt Optimum (matched) load resistance R S Series resistance R th Thermal resistance R tha Thermal resistance junction to ambient air R thc Thermal resistance junction to case resp. mounting base R thc/s Thermal resistance case or mounting base to heat sink R ths Thermal resistance heat sink to ambient air t Time t d Delay time t f Fall Time t off Turn-off time (t s + t f ) t on Turn-on time (t d + t r ) t p Pulse duration t pd Propagation delay time t r Rise time t s Storage time t total Total switching time (t on + t off ) T Temperature; duration of one period T amb Ambient temperature T j Junction temperature T C Case temperature T S Storage temperature T SB Temperature of substrate backside oltage BB Base supply voltage BE Base-emitter voltage BE sat Base-emitter saturation voltage 6 ITT INTERMETALL

7 Technical Information (BR)CBO Collector-base breakdown voltage (open emitter) (BR)CEO Collector-emitter breakdown voltage (open base) (BR)CER Collector-emitter breakdown voltage (specified resistance between base and emitter) (BR)CES Collector-emitter breakdown voltage (emitter short-circuited to base) DGS Drain-gate voltage DSS Drain-source voltage (BR)DSS Drain-source breakdown voltage (BR)EBO Emitter-base breakdown voltage (open collector) CB Collector-base voltage CBO Collector-base voltage (open emitter) CC Collector supply voltage CE Collector-emitter voltage CEO Collector-emitter voltage (open base) CER Collector-emitter voltage (specified resistance between base and emitter) CES Collector-emitter voltage (emitter shortcircuited to base) CE sat Collector-emitter saturation voltage CE Collector-emitter voltage (specified voltage between base and emitter) EBO Emitter-base voltage (open collector) EE Emitter supply voltage GS(TO) Gate threshold voltage i Input voltage o Output voltage y Parameters of y- (admittance) matrix y f Forward transconductance y i Input admittance y o Output admittance y r Reverse transconductance y s Generator admittance Z Input impedance Z Output impedance ϕ Phase angle of y-parameters τs Storage time constant ν Duty cycle (t p /T) ITT INTERMETALL 7

8 Technical Information Characteristics and Maximum Ratings The electrical performance of a semiconductor device is usually expressed in terms of its characteristics and maximum ratings. Characteristics are those which can be measured by use of suitable measuring instruments and circuits, and provide information on the performance of the device under specified operating conditions (at a given bias, for example). Depending on requirements, they are quoted either as typical (Typ.) values or guaranteed (Min., Max.) values. Typical values are expressed as figures or as one or more curves, and are subject to spreads. Occasionally a typical curve is accompanied by another curve, this being a 9%, or, in a few cases, a maximum spread limit curve. Maximum Ratings give the values which cannot be exceeded without risk of damage to the device. Changes in supply voltage and in the tolerances of other components in the circuit must also be taken into consideration. No single maximum rating should ever be exceeded, even when the device is operated well within the other maximum ratings. The inclusion of the word admissible in a title means that the associated curve defines the maximum ratings. Assembly and Soldering Instructions To prevent transistors from being damaged during mounting, observe the following points: All semiconductor devices are extremely sensitive to their maximum admissible junction temperature being exceeded. When planning the layout of the equipment, the distance between heat sources and semiconductor elements should be sufficiently large. Semiconductor elements may be mounted in any desired position. From the experience gained in soldering semiconductor elements the following rules have emerged: For transistors in plastic case TO-9 the maximum soldering time is 8 s, at soldering temperatures between and 6 C. Here, the distance between soldered joint and case should be at least mm. During soldering, the leads should not be subjected to mechanical stress. For transistors in plastic case SOT- the maximum soldering time is 8 s, at maximum soldering temperatures between and 6 C. An exception to this rule are data on collector current. The collector current, quoted as one of the critical transistor values, is a maximum value recommended by the manufacturer which should be noted in connection with the other characteristics valid for this collector current (e.g. collector and saturation voltages, current gain etc.) when selecting a transistor. In certain cases, the quoted collector current may be exceeded without the transistor being destroyed. The absolute limit for the collector current is determined by the maximum admissible power dissipation of the transistor. 8 ITT INTERMETALL

9 Technical Information Admissible Power Dissipation The indicated maximum admissible junction temperature must not be exceeded because this could damage or cause the destruction of the transistor crystal. Since the user cannot measure this temperature, data sheets also reveal the maximum admissible power dissipation P tot usually in the form of a derating curve (see diagram). If power dissipation is kept within these limits the maximum junction temperature will not be exceeded. This can easily be checked by using the equation T j = T amb + P tot R th For the thermal resistance R th the junction to ambient thermal resistance R tha is usually substituted in the case of small transistors (in the TO-8 or TO-9 package). In the case of power transistors (in the TO- or similar packages) which are usually mounted on a cooling fin or heat sink for the purpose of heat dissipation, the sum of the junction to case thermal resistance R thc plus the heat sink to ambient thermal resistance R ths plus for more accurate calculations the mounting surface to heat sink thermal resistance, is substituted for the thermal resistance in this equation. In order to keep the mounting surface to heat sink thermal resistance low, a heat conducting compound (silicone grease) is to be applied to the mounting surface before the transistor is screwed on. If a mica insulation is used, the thermal resistance of the mica washer must be added, which amounts to about. K/W. Directions for determining the thermal resistance R ths for cooling fins can be found on page. Since the distribution of heat in the transistor crystal is not uniform and depends on voltage and current, some transistors are accompanied by derating curves showing P tot as a function of T C and T amb with the collector voltage CE as parameter (see diagram below). Admissible power dissipation versus ambient temperature Admissible power dissipation versus temperature mw W CE =...7 P tot P tot 8 R thc = K/W R tha = K/W T amb C C T amb, T C ITT INTERMETALL 9

10 Technical Information Admissible collector current versus collector emitter voltage For some power transistors the data sheets also contain a diagram giving admissible collector current or permissible operating range which gives further information on admissible power dissipation. One example is illustrated in the diagram left. I C A T C = C Pulse Operation* I Cmax (continuous) µs µs µs ms t p = ms DC Operation These diagrams are based on continuous power dissipation. However, pulse power dissipation may usually exceed continuous power dissipation. To ascertain maximum admissible pulse power dissipation P I, reference is made to the pulse junction to case thermal resistance r thc or the pulse junction to ambient thermal resistance r tha whose value can be derived from the r th = f(t p ) diagram below. Use the equation T j = T amb + P I r tha or, if the continuous power dissipation P D is to be taken into consideration: T j = T amb + P D R tha + P I r tha K/W r. thc. * for single nonrepetitive pulse Pulse thermal resistance versus pulse duration... ν =.. t p ν = tp T T CE P I If the transistor is mounted on a cooling fin then the equation becomes: T j = T amb + P tot R ths + P I r thc wherein P tot is the mean value of the pulse power dissipation P I. Where continuous power dissipation must be considered in addition, the equation is expanded accordingly: T j = T amb + P tot R ths + P D R thc + P I r thc wherein P tot is the mean value of the total power dissipation. The thermal resistance and pulse thermal resistance values derived from the data sheets apply without limitation only to small collector-emitter voltages CE, between about and. For higher voltages these thermal resistance values have to be multiplied by a correction factor K which has to be calculated from the previously mentioned derating curves. The admissible power dissipation P tot max, applicable to low collector voltages, must be divided by the admissible power dissipation P tot for the higher collector voltage : P K tot max v = P tot The complete equation for T j then reads: T j = T amb + P tot R ths + P D K R thc + P I K r thc s t p ITT INTERMETALL

11 Technical Information Heat Removal from Transistors The operation of any semiconductor device involves the dissipation of power with a consequent rise in junction temperature. Because the maximum admissible junction temperature must not be exceeded, careful circuit design with due regard not only to the electrical, but also the thermal performance of a semiconductor circuit, is essential. K/W 7 Aluminium Cooling Fin Al If the dissipated power is low, then sufficient heat is radiated from the surface of the case; if the dissipation is high, however, additional steps may have to be taken to promote this process by reducing the thermal resistance between the junction and the ambient air. This can be achieved either by pushing a star- or flagshaped heat dissipator over the case, or by bolting the semiconductor device to a heat sink. P, the power to be dissipated, T j the junction temperature, and T amb, the ambient temperature are related by the formula P T j T amb = = R tha T j T amb R thc + R ths R ths 7 Thickness mm. where R tha is the total thermal resistance between junction and ambient air. The total thermal resistance in turn comprises an internal thermal resistance R thc between the junction and the mounting base, and an outer thermal resistance R ths between the case and the surrounding air (or any other cooling medium). It should be noted that only the outer thermal resistance is affected by the design of the heat sink. To determine the size of the heat sink required to meet given operating conditions, proceed as follows: First calculate the outer thermal resistance by use of the formula T j T amb R ths < R P thc and then, by use of the diagrams, determine the size of the heat sink which provides the calculated R ths -value. To determine the maximum admissible device dissipation and ambient temperature limit for a given heat sink, proceed in the reverse order to that described above. The calculations are based on the following assumptions: Use of a squareshaped heat sink without any finish, mounted in a vertical position; semiconductor device located in the centre of the sink; heat sink operated in still air and not subjected to any additional heat radiation. The calculated area should be increased by a factor of. if the sink is mounted horizontally, and can be reduced by a factor of approximately.7 if a black finish is used. K/W 7 R ths cm Length of edge S Steel Cooling Fin Fe Thickness mm. The curves give the thermal to ambient resistance of square vertical heat sinks as a function of side length. It is assumed that the heat is applied at the center of the square cm Length of edge S ITT INTERMETALL

12 Technical Information Basic Circuits There are three basic transistor circuits. They are called according to that electrode (emitter, base, collector) which is common to both input and output circuit. i Four-Pole-Symbols of h-matrix A transistor can be considered as an active four-pole network. When driven with small low-frequency signals its properties can be described by the four characteristic values of the h- (hybrid) matrix, which are assumed to be real. i i i v v i i Common Emitter v Transistor v four pole If expressed this in matrix form we obtain: v i = ( h) ""dfoisdufoifus( h) = i v v = h i i + h r v i = h f i + h o v h i ah r h f ah o v v Explanation of h-parameters Input impedance (shorted output, v = ): i Common Base v h i = ---- i Reverse voltage transfer ratio (open input, i = ): i v v v h r = ---- v Small-signal current gain (shorted output, v = ): Common Collector Properties of the three basic circuits: Common Emitter Common Base Common Collector Input impedance medium small high Output impedance medium high small i h f = -- i Output admittance (open input, i = ): i h o = ---- v A frequently used abbreviation is the determinant: h = h i h o h r h f For all three basic circuit configurations the circuit illustrated below represents the equivalent four-pole circuit using h-parameters. i i Current gain high less than high v h i h o v Upper frequency limit low high low hr v h f i In the transistor data sheets the h-parameters are usually quoted for the common emitter configuration and for a given operating point (bias). The latter is determined by the collector voltage, the emitter or collector current and by the ambient temperature. For different operating points, correction factors are needed which can be gathered from the relevant curves. For common base or common collector transistor stage calculations, the appropriate h-parameters are ascertained from those of the common emitter configuration by using the following conversion formulas. ITT INTERMETALL

13 Technical Information Common Emitter Common Base Common Collector Input impedance h ie h ib = h ic = h ie + h fe h Reverse voltage transfer ratio h ie h oe re h rb = h re h rc = h re + h fe h ie Small-signal current gain h fe h fb = h fc = + h fe + h fe h fe Output admittance h oe h ob = h oc = h oe + h fe h oe Calculation of a Transistor Stage Four-Pole Symbols of y-matrix R G v i i Z Transistor four pole Z v R L Whereas the network behaviour of of low-frequency transistors could be described by using the h- (hybrid) matrix, the y- (admittance) matrix is usually employed for high frequency transistors. i i i i Input impedance v Transistor four pole v v y i y r v y f v y o v v Z = ---- = i h i + R L h h o R L i = y i v + y r v Output impedance v Z = ---- = i Current gain h i + R G h + h o R G i = y f v + y o v In matrix form we obtain: i = i ( y) ( y) = y i y f y r y o i G c = -- = i oltage gain v G v = ---- = v Power gain h f + h o R L v G i p = = v i h f R L h i + R L h h f R L ( + h o R L )( h i + R L h) Max. available power gain, input and output matched with R G opt resp. R L opt G p max = h f h + h i h o h R i h h G opt = R L opt = i h o h o h The y-parameters are complex values which can be expressed as y ik = g ik + jb ik with b ik = ωc ik or with b ik = Often, the following notation is expedient: y ik = l y ik l exp jϕik By adding the suffix e, b, or c it is possible to indicate to which of the three basic circuit configurations the parameters are valid. Explanation of y-parameters Input admittance (shorted output, v = ) i y i = ---- v Reverse transconductance (shorted input, v = ) i y r = ---- v ωl ik ITT INTERMETALL

14 Technical Information Forward transconductance (shorted output, v = ) i y f = ---- v Output admittance (shorted input, v = ) i y o = ---- v Max. available power gain, input and output matched with R G opt resp. R L opt G p max = y f y + y i y o Max. available power gain will be attained if input and output are matched, where: The determinant reads y = y i y o y r y f R L opt = y o y i y Conversion from y-parameters to h-parameters y h i = -- h r y y r = --- h = ---- o i y i y i R G opt = y i y o y h f y f y = --- h y o = i y i and: y = y i y o y r y f Calculation of a Transistor Stage i i R G Transistor v Z Z v RL four pole Input impedance v Z + y ---- o R = = L i y i + y R L Output impedance v Z = ---- = i Current gain i G c = -- = i oltage gain v G v = ---- = v Power gain + y i R G y o + y R G y f y i + y R L y f R L + y o R L v G i p = = v i y f R L ( + y o R L )( y i + y R L ) Available power gain, input matched with R G opt y G f R G R L p av = ([ y + y R L ) R G + + y o R L ] ITT INTERMETALL

15 Technical Information Switching Times Definitions for the various times which make up the total switching time can be gathered from the diagram below in which the switching characteristic of a transistor in common-emitter configuration is illustrated. I B I B I B t I C I c R L. I C.9I C I C I B I B t t d t r t s tf t d t r t s t f t on = t d + t r t off = t s + t f Delay time Rise time Storage time Fall time Turn-on time Turn-off time The duration of the switching times depends upon the transistor type and very much on the circuit arrangement. With increasing saturation of the transistor the turn-on time decreases and the turn-off time increases. An increase of the turn-off current l B shortens the turn-off time. The switching times depend on the duration of the turn-on pulse. It is only when the duration of this pulse is a multiple of the switching times that the latter remain constant. If the pulse is shorter, especially the storage time decreases. With a pulse duration in the region of the turn-on time the transistor is no longer fully saturated. The collector voltage then exhibits a characteristic such as is qualitatively represented in the diagram below. CE ) CC..9 CEmin t p t s tf ITT INTERMETALL

16 Quality ITT INTERMETALL s Quality Assurance and Reliability System Our iew of Quality and Reliability ITT INTERMETALL gives the highest priority to developing, manufacturing, and delivering products that satisfy all our customers with respect to product performance, quality, reliability, on-time delivery, and competitive prices. Therefore, ITT INTERMETALL has implemented quality and reliability assurance activities in all phases of the product cycle from business development through product design, mass production, shipment, and marketing. Each department is responsible for the quality of its output and also each individual for the quality of his/her work. The quality system is based on the ISO 9 concept. The system and the processes are continuously improved so that a steady progress in product quality can be achieved. Quality Assurance during Product Development The quality and reliability of a product are built-in during the product development and design phase. In IC development, functional simulations, design rule checks, and detailed resource planning are performed to get good quality products to the market in time. Design reviews control the progress of development projects by measuring performance data against the targeted specification. The product release for production is determined by the results of extensive product performance evaluation as well as quality and reliability testing on prototypes. Quality Control of Outgoing Products Although the quality and reliability is built into the products during products development and production, it is also verified by inspections. Outgoing inspection of samples generates quality data that is fed back to previous processes for corrective actions. A reliability monitoring program is installed to verify product reliability. Failure analysis is performed to find the root cause. The documented information is fed back to development and production departments for further product improvements. Reliability data is also used to predict product lifetime under specific environmental conditions. Quality Control in the Market Close contacts with key customers enable ITT INTER- METALL to collect quality information from the market. If a customer returns a failing product, it is subjected to detailed failure analysis until root causes are found. The history of the product, the results of the failure analysis, and the root causes are entered into a Quality Data Base (QDB). The evaluation of the data base is used to prioritize corrective action programs in all departments. Quality Assurance during Mass Production In a manufacturing line, processes are controlled by monitoring the relevant process parameters (SPC). ariations in processes are continuously reduced to increase yield, product performance, quality, and reliability. State-of-the-art production equipment and stable processes are essential for good quality products at competitive prices. In order to achieve these goals, a wide variety of design and process changes are made after production release. Detailed qualification procedures ensure that these changes maintain or improve the quality and reliability of the products. 6 ITT INTERMETALL

17 Quality Product Quality and Assurance System Marketing Development Engineering Quality Manufacturing Market Research Planning Definition of Product Specifications (Pflichtenheft) Quality Standard Process Decision on Project Start Design of Product and Process Design Design Review Evaluation of Parts and Material Prototype Production / Performance Evaluation Quality and Reliability Evaluation on Prototype Pilot Production Design Approval Standardization of Material and Process Qualification Testing / Quality and Reliability Production Release olume Production Continuous Improvement of Technology and Performance Supplier Ranking Incoming Inspection Reliability Monitoring Q-Training and Education Internal Audits Process Control Facility Control Assurance of Quality, Cost and Delivery Delivery and Shipment Market Customer Service Corrective Actions Quality Information and Failure Analysis ITT Semiconductors 7

18 8 ITT INTERMETALL

19 Small-Signal Transistors (NPN) ITT INTERMETALL 9

20 N9 NPN Silicon Epitaxial Planar Transistor for switching and amplifier applications..6.6 As complementary type, the PNP transistor N96 is recommended. On special request, this transistor is also manufactured in the pin configuration TO-8. max... E C B TO-9 Plastic Package Weight approx..8 g Dimensions in mm Absolute Maximum Ratings Symbol alue Unit Collector-Base oltage CBO 6 Collector-Emitter oltage CEO Emitter-Base oltage EBO 6 Collector Current I C ma Peak Collector Current I CM ma Power Dissipation at T amb = C P tot ) mw Junction Temperature T j C Storage Temperature Range T S 6 + C ) alid provided that leads are kept at ambient temperature at a distance of mm from case ITT INTERMETALL

21 N9 Characteristics at T amb = C Symbol Min. Typ. Max. Unit DC Current Gain at CE =, I C =. ma at CE =, I C = ma at CE =, I C = ma at CE =, I C = ma at CE =, I C = ma h FE h FE h FE h FE h FE 7 6 Thermal Resistance Junction to Ambient Air R tha ) K/W Collector Saturation oltage at I C = ma, I B = ma at I C = ma, I B = ma CEsat CEsat.. Base Saturation oltage at I C = ma, I B = ma at I C = ma, I B = ma BEsat BEsat.8.9 Collector-Emitter Cutoff Current EB =, CE = Emitter-Base Cutoff Current EB =, CE = Collector-Base Breakdown oltage at I C = µa, I E = Collector-Emitter Breakdown oltage at I C = ma, I B = Emitter-Base Breakdown oltage at I E = µa, I C = Gain-Bandwidth Product at CE =, I C = ma, f = MHz Collector-Base Capacitance at CB =, f = khz Emitter-Base Capacitance at EB =., f = khz Input Impedance at CE =, I C = ma, f = khz oltage Feedback Ratio at CE =, I C = ma, f = khz I CE na I EB na (BR)CBO 6 (BR)CEO (BR)EBO 6 f T MHz C CBO pf C EBO 8 pf h ie kω h re. 8 ) alid provided that leads are kept at ambient temperature at a distance of mm from case ITT INTERMETALL

22 N9 Characteristics, continuation Symbol Min. Typ. Max. Unit Small-Signal Current Gain at CE =, I C = ma, f = khz Output Admittance at CE =, I C = ma, f = khz Noise Figure at CE =, I C = µa, R G = kω, f = Hz Delay Time (see Fig. ) at I B = ma, I C = ma Rise Time (see Fig. ) at I B = ma, I C = ma Storage Time (see Fig. ) at I B = I B = ma, I C = ma Fall Time (see Fig. ) at I B = I B = ma, I C = ma h fe h oe µs db t d ns t r ns t s ns t f ns ns DUTY CYCLE = % -. <. ns +.9 K +. 7 C <. pf* < t < s DUTY CYCLE = % - 9. t +.9 <. ns K +. 7 C <. pf* Fig. : Test circuit for delay and rise time Fig. : Test circuit for storage and fall time * total shunt capacitance of test jig and connectors * total shunt capacitance of test jig and connectors ITT INTERMETALL

23 N9 ITT INTERMETALL

24 N NPN Silicon Epitaxial Transistor for switching and amplifier applications. Especially suitable for AF-driver and low-power output stages..6.6 As complementary type, the PNP transistor N6 is recommended. max... E C B TO-9 Plastic Package Weight approx..8 g Dimensions in mm Absolute Maximum Ratings Symbol alue Unit Collector-Emitter oltage CEO Collector-Base oltage CBO Emitter-Base oltage EBO Collector Current I C ma Peak Collector Current I CM 8 ma Base Current I B ma Power Dissipation at T amb = C P tot 6 ) mw Junction Temperature T j C Storage Temperature Range T S 6 to + C ) alid provided that leads are kept at ambient temperature at a distance of mm from case. ITT INTERMETALL

25 N Characteristics at T amb = C Symbol Min. Typ. Max. Unit DC Current Gain at CE =, I C =. ma at CE =, I C = ma h FE h FE 6 6 Collector-Base Cutoff Current at CB = Emitter-Base Cutoff Current at EB = Collector Saturation oltage at I C = ma, I B = ma Base Saturation oltage at I C = ma, I B = ma Collector-Emitter Breakdown oltage at I C = ma Collector-Base Breakdown oltage at I C = µa Emitter-Base Breakdown oltage at I E = µa Gain-Bandwidth Product at CE =, I C = ma, f = MHz Collector-Base Capacitance at CB =, f = MHz I CBO na I EBO na CESAT. BESAT.9 (BR)CEO (BR)CBO (BR)EBO f T MHz C CBO pf Thermal Resistance Junction to Ambient Air R tha ) K/W ) alid provided that leads are kept at ambient temperature at a distance of mm from case ITT INTERMETALL

26 N Admissible power dissipation versus ambient temperature alid provided that leads are kept at ambient temperature at a distance of mm from case Collector current versus base-emitter voltage W N ma C N.8 P tot I C C - C.6 typical limits at T amb= C.. T amb C - BE Pulse thermal resistance versus pulse duration alid provided that leads are kept at ambient temperature at a distance of mm from case Gain-bandwidth product versus collector current K/W r tha..... ν =.. N s t p t p ν = tp T T P I MHz 7 f T 7 N T amb = C f = MHz = CE ma I C 6 ITT INTERMETALL

27 N Collector saturation voltage versus collector current DC current gain versus collector current.. CEsat typical limits at T amb = C IC = I B N 7 h FE CE = C N. T amb = C - C. 7. C C - C - ma IC - I C Base saturation voltage versus collector current Common emitter collector characteristics BEsat typical limits at T amb = C I C = I B - C C N ma I C. N C. - ma IC CE I =. ma B ITT INTERMETALL 7

28 N Common emitter collector characteristics Common emitter collector characteristics ma N ma.9.8 N 8.. I C I C I =. ma B.7 BE =.7 CE CE 8 ITT INTERMETALL

29 N ITT INTERMETALL 9

30 BC7, BC8 NPN Silicon Epitaxial Planar Transistors for switching and amplifier applications. Especially suitable for AF-driver stages and low power output stages..6.6 These types are also available subdivided into three groups -6, -, and -, according to their DC current gain. As complementary types, the PNP transistors BC7 and BC8 are recommended. On special request, these transistors are also manufactured in the pin configuration TO-8. max... C E B TO-9 Plastic Package Weight approx..8 g Dimensions in mm Absolute Maximum Ratings Symbol alue Unit Collector-Emitter oltage BC7 BC8 CES CES Collector-Emitter oltage BC7 BC8 CEO CEO Emitter-Base oltage EBO Collector Current I C 8 ma Peak Collector Current I CM A Base Current I B ma Power Dissipation at T amb = C P tot 6 ) mw Junction Temperature T j C Storage Temperature Range T S 6 to + C ) alid provided that leads are kept at ambient temperature at a distance of mm from case ITT INTERMETALL

31 BC7, BC8 Characteristics at T amb = C Symbol Min. Typ. Max. Unit DC Current Gain at CE =, I C = ma Current Gain Group at CE =, I C = ma Current Gain Group h FE h FE h FE h FE h FE h FE Collector-Emitter Cutoff Current at CE = at CE = at CE =, T amb = C at CE =, T amb = C BC7 BC8 BC7 BC8 I CES I CES I CES I CES na na µa µa Collector-Emitter Breakdown oltage at I C = ma BC8 BC7 (BR)CEO (BR)CEO Collector-Emitter Breakdown oltage at I C =. ma BC8 BC7 (BR)CES (BR)CES Emitter-Base Breakdown oltage at I E =. ma Collector Saturation oltage at I C = ma, I B = ma Base-Emitter oltage at CE =, I C = ma Gain-Bandwidth Product at CE =, I C = ma, f = MHz Collector-Base Capacitance at CB =, f = MHz (BR)EBO CEsat.7 BE. f T MHz C CBO pf Thermal Resistance Junction to Ambient Air R tha ) K/W ) alid provided that leads are kept at ambient temperature at a distance of mm from case ITT INTERMETALL

32 BC7, BC8 Admissible power dissipation versus ambient temperature alid provided that leads are kept at ambient temperature at a distance of mm from case Collector current versus base-emitter voltage W BC7, BC8 ma C BC7, BC8.8 P tot I C C - C.6 typical limits at T amb= C.. T amb C - BE Pulse thermal resistance versus pulse duration alid provided that leads are kept at ambient temperature at a distance of mm from case Gain-bandwidth product versus collector current K/W r tha..... ν =.. BC7, BC s t p t p ν = tp T T P I MHz 7 f T 7 BC7, BC8 T amb = C f = MHz = CE ma I C ITT INTERMETALL

33 BC7, BC8 Collector saturation voltage versus collector current DC current gain versus collector current.. CEsat typical limits at T amb = C IC = I B BC7, BC8 7 h FE CE = C BC7, BC8. T amb = C - C. 7. C C - C - ma IC - I C Base saturation voltage versus collector current Common emitter collector characteristics BEsat typical limits at T amb = C I C = I B - C C BC7, BC8 ma I C. BC7, BC C. - ma IC CE I =. ma B ITT INTERMETALL

34 BC7, BC8 Common emitter collector characteristics Common emitter collector characteristics ma BC7, BC8 ma.9 BC7, BC I C I C I =. ma B.7 BE =.7 CE CE ITT INTERMETALL

35 BC7, BC8 ITT INTERMETALL

36 BC6 BC9 NPN Silicon Epitaxial Planar Transistors.6.6 These transistors are subdivided into three groups A, B and C according to their current gain. The type BC6 is available in groups A and B, however, the types BC7 and BC8 can be supplied in all three groups. The BC9 is a low-noise type and available in groups B and C. As complementary types, the PNP transistors BC6 BC9 are recommended. On special request, these transistors are also manufactured in the pin configuration TO-8. max... C E B TO-9 Plastic Package Weight approx..8 g Dimensions in mm Absolute Maximum Ratings Symbol alue Unit Collector-Base oltage BC6 BC7 BC8, BC9 CBO CBO CBO 8 Collector-Emitter oltage BC6 BC7 BC8, BC9 CES CES CES 8 Collector-Emitter oltage BC6 BC7 BC8, BC9 CEO CEO CEO 6 Emitter-Base oltage BC6, BC7 BC8, BC9 EBO 6 EBO Collector Current I C ma Peak Collector Current I CM ma Peak Base Current I BM ma Peak Emitter Current I EM ma Power Dissipation at T amb = C P tot ) mw Junction Temperature T j C Storage Temperature Range T S 6 + C ) alid provided that leads are kept at ambient temperature at a distance of mm from case 6 ITT INTERMETALL

37 BC6 BC9 Characteristics at T amb = C Symbol Min. Typ. Max. Unit h-parameters at CE =, I C = ma, f = khz, Small Signal Current Gain Current Gain Group A B C Input Impedance Current Gain Group A B Output Admittance C Current Gain Group A B C Reverse oltage Transfer Ratio Current Gain Group A B C h fe h fe h fe h ie h ie h ie h oe h oe h oe h re h re h re kω kω kω µs µs µs DC Current Gain at CE =, I C = µa Current Gain Group A B C at CE =, I C = ma Current Gain Group A B C at CE =, I C = ma Current Gain Group A B C h FE h FE h FE h FE h FE h FE h FE h FE h FE Thermal Resistance Junction to Ambient Air R tha ) K/W Collector Saturation oltage at I C = ma, I B =. ma at I C = ma, I B = ma CEsat CEsat 8 6 m m Base Saturation oltage at I C = ma, I B =. ma at I C = ma, I B = ma BEsat BEsat 7 9 m m Base-Emitter oltage at CE =, I C = ma at CE =, I C = ma BE BE m m Collector-Emitter Cutoff Current at CE = 8 at CE = BC6 BC7 I CES I CES.. na na at CE = BC8, BC9 I CES. na at CE = 8, T j = C at CE =, T j = C BC6 BC7 I CES I CES µa µa ) alid provided that leads are kept at ambient temperature at a distance of mm from case ITT INTERMETALL 7

38 BC6 BC9 Characteristics, continuation Symbol Min. Typ. Max. Unit at CE =, T j = C BC8, BC9 I CES µa µa Gain-Bandwidth Product at CE =, I C = ma, f = MHz Collector-Base Capacitance at CB =, f = MHz Emitter-Base Capacitance at EB =., f = MHz f T MHz C CBO. 6 pf C EBO 9 pf Noise Figure at CE =, I C = µa, R G = kω, f = khz, f = Hz BC6, BC7 F db at CE =, I C = µa, R G = kω, f = Hz BC8 BC9 BC9 F F.. db db Admissible power dissipation versus temperature alid provided that leads are kept at ambient temperature at a distance of mm from case Pulse thermal resistance versus pulse duration alid provided that leads are kept at ambient temperature at a distance of mm from case mw BC6...BC9 K/W BC6...BC9 P tot r tha ν = t p ν = tp T P I T amb C s T t p 8 ITT INTERMETALL

39 BC6 BC9 DC current gain versus collector current Collector-base cutoff current versus ambient temperature CE = BC6...BC9 na BC6...BC9 h FE C T amb = C - C I CBO - - ma I C - Test voltage CBO: equal to the given maximum value CES typical maximum T amb C Collector current versus base-emitter voltage Collector saturation voltage versus collector current ma CE = BC6...BC9. I C I B = BC6...BC9 I C. CEsat C. - T amb = C - C. BE. T amb = C. C - C - ma I C ITT INTERMETALL 9

40 BC6 BC9 Collector-base capacitance, Emitter-base capacitance versus reverse bias voltage Relative h-parameters versus collector current pf BC6...BC9 BC6...BC9 6 C 8 CBO C EBO 6 C EBO h e (I C) h e (I C = ma) 6 h ie h re C CBO h fe 6 h oe. T = C amb.. - CE = T amb= C - ma CBO, EBO I C Gain-bandwidth product versus collector current Noise figure versus collector current MHz 7 f T BC6...BC9 T = C amb CE = F db 8 6 CE = f = Hz T amb = C BC9 R G= M k k k k. ma ma I C I C ITT INTERMETALL

41 BC6 BC9 Noise figure versus collector current Noise figure versus collector emitter voltage F db 8 6 CE = f = khz T = C amb BC9 F db 8 6 I C =. ma R G = k f = khz f = Hz T amb= C BC9 8 R G= M k k k ma - I C CE ITT INTERMETALL

42 BC87, BC88 NPN Silicon Epitaxial Planar Transistors for switching, AF driver and amplifier applications. Especially suited for automatic insertion in thick- and thin-film circuits. These transistors are subdivided into three groups -6, - and - according to their current gain. As complementary types, the PNP transistors BC87 and BC88 are recommended Top iew Pin configuration = Collector, = Base, = Emitter. Marking code Type BC BC Marking 6A 6B 6C 6E 6F 6G.. SOT- Plastic Package Weight approx..8 g Dimensions in mm. +. Absolute Maximum Ratings Symbol alue Unit Collector-Emitter oltage BC87 BC88 CES CES Collector-Emitter oltage BC87 BC88 CEO CEO Emitter-Base oltage EBO Collector Current I C 8 ma Peak Collector Current I CM ma Peak Base Current I BM ma Peak Emitter Current I EM ma Power Dissipation at T SB = C P tot ) mw Junction Temperature T j C Storage Temperature Range T S 6 + C ) Device on fiberglass substrate, see layout ITT INTERMETALL

43 BC87, BC88 Characteristics at T amb = C Symbol Min. Typ. Max. Unit DC Current Gain at CE =, I C = ma Current Gain Group at CE =, I C = ma h FE h FE h FE h FE h FE h FE Thermal Resistance Junction Substrate Backside R thsb ) K/W Thermal Resistance Junction to Ambient Air R tha ) K/W Collector Saturation oltage at I C = ma, I B = ma Base-Emitter oltage at CE =, I C = ma CEsat.7 BE. Collector-Emitter Cutoff Current at CE = at CE = at CE =, T j = C BC87 BC88 I CES I CES I CES na na µa Emitter-Base Cutoff Current at EB = Gain-Bandwidth Product at CE =, I C = ma, f = MHz Collector-Base Capacitance at CB =, f = MHz I EBO na f T MHz C CBO pf ) Device on fiberglass substrate, see layout Layout for R tha test Thickness: Fiberglass. mm Copper leads. mm ITT INTERMETALL

44 BC87, BC88 Admissible power dissipation versus temperature of substrate backside Device on fiberglass substrate, see layout Collector current versus base-emitter voltage mw BC87, BC88 ma C BC87, BC88 P tot I C C - C typical limits at T amb= C T SB C - BE Pulse thermal resistance versus pulse duration (normalized) Device on fiberglass substrate, see layout Gain-bandwidth product versus collector current r thsb. R thsb ν = BC87, BC s t p t p t ν = p T T P I MHz 7 f T 7 BC87, BC88 T amb = C f = MHz CE = ma I C ITT INTERMETALL

45 BC87, BC88 Collector saturation voltage versus collector current DC current gain versus collector current.. CEsat typical limits at T amb = C IC = I B BC87, BC88 7 h FE CE = C BC87, BC88. T amb = C - C. 7. C C - C - ma IC - ma I C Base saturation voltage versus collector current Common emitter collector characteristics BEsat typical limits at T amb = C IC = I B - C C BC87, BC88 ma I C. BC87, BC C. - ma IC CE I =. ma B ITT INTERMETALL

46 BC87, BC88 Common emitter collector characteristics Common emitter collector characteristics ma BC87, BC88 ma.9 BC87, BC I C I C I =. ma B.7 BE =.7 CE CE 6 ITT INTERMETALL

47 BC87, BC88 ITT INTERMETALL 7

48 BC86 BC89 NPN Silicon Epitaxial Planar Transistors for switching and AF amplifier applications. Especially suited for automatic insertion in thick- and thin-film circuits. +.. Top iew These transistors are subdivided into three groups A, B and C according to their current gain. The type BC86 is available in groups A and B, however, the types BC87 and BC88 can be supplied in all three groups. The BC89 is a low noise type available in groups B and C. As complementary types, the PNP transistors BC86 BC89 are recommended. Pin configuration = Collector, = Base, = Emitter. Marking code SOT- Plastic Package Weight approx..8 g Dimensions in mm. +. Type Marking Type Marking BC86A B BC87A B C A B E F G BC88A B C BC89B C J K L B C Absolute Maximum Ratings Symbol alue Unit Collector-Base oltage BC86 BC87 BC88, BC89 CBO CBO CBO 8 Collector-Emitter oltage BC86 BC87 BC88, BC89 CES CES CES 8 Collector-Emitter oltage BC86 BC87 BC88, BC89 CEO CEO CEO 6 Emitter-Base oltage BC86, BC87 BC88, BC89 EBO 6 EBO Collector Current I C ma Peak Collector Current I CM ma Peak Base Current I BM ma Peak Emitter Current I EM ma Power Dissipation at T SB = C P tot ) mw Junction Temperature T j C Storage Temperature Range T S 6 + C ) Device on fiberglass substrate, see layout 8 ITT INTERMETALL

49 BC86 BC89 Characteristics at T amb = C Symbol Min. Typ. Max. Unit h-parameters at CE =, I C = ma, f = khz, Small-Signal Current Gain Current Gain Group A B C Input Impedance Current Gain Group A B Output Admittance C Current Gain Group A B C Reverse oltage Transfer Ratio Current Gain Group A B C h fe h fe h fe h ie h ie h ie h oe h oe h oe h re h re h re kω kω kω µs µs µs DC Current Gain at CE =, I C = µa Current Gain Group A B C at CE =, I C = ma Current Gain Group A B C h FE h FE h FE h FE h FE h FE Thermal Resistance Junction to Substrate Backside R thsb ) K/W Thermal Resistance Junction to Ambient Air R tha ) K/W Collector Saturation oltage at I C = ma, I B =. ma at I C = ma, I B = ma CEsat CEsat 9 6 m m Base Saturation oltage at I C = ma, I B =. ma at I C = ma, I B = ma BEsat BEsat 7 9 m m Base-Emitter oltage at CE =, I C = ma at CE =, I C = ma BE BE m m Collector-Emitter Cutoff Current at CE = 8 BC86 at CE = BC87 at CE = BC88, BC89 at CE = 8, T j = C BC86 at CE =, T j = C BC87 at CE =, T j = C BC88, BC89 I CES I CES I CES I CES I CES I CES... na na na µa µa µa Gain-Bandwidth Product at CE =, I C = ma, f = MHz f T MHz ) Device on fiberglass substrate, see layout ITT INTERMETALL 9

50 BC86 BC89 Characteristics, continuation Symbol Min. Typ. Max. Unit Collector-Base Capacitance at CB =, f = MHz Emitter-Base Capacitance at EB =., f = MHz C CBO. 6 pf C EBO 9 pf Noise Figure at CE =, I C = µa, R G = kω, f = khz, f = Hz BC86, BC87, BC88 BC89 F F. db db at CE =, I C = µa, R G = kω, f = Hz BC89 F. db Layout for R tha test Thickness: Fiberglass. mm Copper leads. mm ITT INTERMETALL

51 BC86 BC89 Admissible power dissipation versus temperature of substrate backside Device on fiberglass substrate, see layout Pulse thermal resistance versus pulse duration (normalized) Device on fiberglass substrate, see layout mw BC86...BC89 BC86...BC89. r thsb. P tot R thsb ν = t p t ν = p T T P I T SB C s t p DC current gain versus collector current Collector-Base cutoff current versus ambient temperature CE = BC86...BC89 na BC86...BC89 h FE C T amb = C - C I CBO - - ma I C - Test voltage CBO: equal to the given maximum value CES typical maximum T amb C ITT INTERMETALL

52 BC86 BC89 Collector current versus base-emitter voltage Collector saturation voltage versus collector current ma CE = BC86...BC89. I C I B = BC86...BC89 I C. CEsat C. T amb = C - C. T amb = C. C -. BE - C - ma I C Collector base capacitance, Emitter base capacitance versus reverse bias voltage Relative h-parameters versus collector current pf BC86...BC89 BC86...BC89 6 C 8 CBO C EBO 6 C EBO h e (I C) h (I = ma) e C 6 h ie h re C CBO h fe 6 h oe. T = C amb.. CBO, EBO - CE = T amb= C - I C ma ITT INTERMETALL

53 BC86 BC89 Gain-bandwidth product versus collector current Noise figure versus collector current MHz 7 f T BC86...BC89 T = C amb CE = F db 8 6 CE = f = Hz T amb = C BC86...BC89 R G= M k k k k. ma ma I C I C Noise figure versus collector current Noise figure versus collector emitter voltage F db 8 6 CE = f = khz T amb = C BC86, BC89 F db 8 6 I C =. ma R G = k f = khz f = Hz T = C amb BC86, BC89 8 R G= M k k k ma - I C CE ITT INTERMETALL

54 BF, BF NPN Silicon Epitaxial Planar Transistors especially suited for application in class-b video output stages of T receivers and monitors..6.6 As complementary types, the PNP transistors BF and BF are recommended max... E B C TO-9 Plastic Package Weight approx..8 g Dimensions in mm Absolute Maximum Ratings Symbol alue Unit Collector-Base oltage BF BF CBO CBO Collector-Emitter oltage BF CEO Collector-Emitter oltage BF CER Emitter-Base oltage EBO Collector Current I C ma Peak Collector Current I CM ma Power Dissipation at T amb = C P tot 8 ) mw Junction Temperature T j C Storage Temperature Range T S 6 + C ) alid provided that leads are kept at ambient temperature at a distance of mm from case ITT INTERMETALL

55 BF, BF Characteristics at T amb = C Symbol Min. Typ. Max. Unit Collector-Base Breakdown oltage at I C = µa, I B = BF BF (BR)CBO (BR)CBO Collector-Emitter Breakdown oltage at I C = ma, I E = Collector-Emitter Breakdown oltage at R BE =.7 kω, I C = ma Emitter-Base Breakdown oltage at I E = µa, I B = Collector-Base Cutoff Current at CB =, I E = BF BF (BR)CEO (BR)CER (BR)EBO I CBO na Collector-Emitter Cutoff Current at R BE =.7 kω, CE = at R BE =.7 kω, CE =, T j = C I CER I CER na µa Collector Saturation oltage at I C = ma, I B = ma DC Current Gain at CE =, I C = ma Gain-Bandwidth Product at CE =, I C = ma Feedback Capacitance at CE =, I C =, f = MHz CEsat.6 h FE f T 6 MHz C re.6 pf Thermal Resistance Junction to Ambient Air R tha ) K/W ) alid provided that leads are kept at ambient temperature at a distance of mm from case ITT INTERMETALL

56 BF8, BF8 NPN Silicon Epitaxial Planar Transistors especially suited for application in class-b video output stages of T receivers and monitors. As complementary types, the PNP transistors BF8 and BF8 are recommended. Pin configuration = Collector, = Base, = Emitter. Marking code BF8 = BF8 = X Top iew. +. SOT- Plastic Package Weight approx..8 g Dimensions in mm Absolute Maximum Ratings Symbol alue Unit Collector-Base oltage BF8 BF8 CBO CBO Collector-Emitter oltage BF8 CEO Collector-Emitter oltage BF8 CER Emitter-Base oltage EBO Collector Current I C ma Peak Collector Current I CM ma Power Dissipation at T SB = C P tot ) mw Junction Temperature T j C Storage Temperature Range T S 6 + C ) Device on fiberglass substrate, see layout 6 ITT INTERMETALL

57 BF8, BF8 Characteristics at T amb = C Symbol Min. Typ. Max. Unit Collector-Base Breakdown oltage at I C = µa, I B = BF8 BF8 (BR)CBO (BR)CBO Collector-Emitter Breakdown oltage at I C = ma, I E = Collector-Emitter Breakdown oltage at R BE =.7 kω, I C = ma Emitter-Base Breakdown oltage at I E = µa, I B = Collector-Base Cutoff Current at CB =, I E = BF8 BF8 (BR)CEO (BR)CER (BR)EBO I CBO na Collector-Emitter Cutoff Current at R BE =.7 kω, CE = at R BE =.7 kω, CE =, T j = C I CER I CER na µa Collector Saturation oltage at I C = ma, I B = ma DC Current Gain at CE =, I C = ma Gain-Bandwidth Product at CE =, I C = ma Feedback Capacitance at CE =, I C =, f = MHz CEsat.6 h FE f T 6 MHz C re.6 pf Thermal Resistance Junction to Ambient Air R tha ) K/W ) Device on fiberglass substrate, see layout Layout for R tha test Thickness: Fiberglass. mm Copper leads. mm ITT INTERMETALL 7