7. DESIGN OF AC-COUPLED BJT AMPLIFIERS FOR MAXIMUM UNDISTORTED VOLTAGE SWING

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1 à 7. DESIGN OF AC-COUPLED BJT AMPLIFIERS FOR MAXIMUM UNDISTORTED VOLTAGE SWING Figure. AC coupled common emitter amplifier circuit ü The DC Load Line V CC = I CQ + V CEQ + R E I EQ I EQ = I CQ + I BQ I CQ =b EFF.I BQ I EQ = Hb EFF + L ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ.I CQ > I CQ b EFF These equations lead to a linear relationship between I CQ and V CEQ which is imposed on the DC operating point of the transistor by the circuit. V CC = i j + R Hb EFF + L y E ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ z.i CQ + V CEQ k { b EFF I CQ = HV CC - V CEQ Lì A + R i E j + y ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ ze k b EFF { or, the "DC Load Line Equation"

2 2 7.BJT Amps. for Undistorted VoltageSwing-X. Slope of DC Load Line : DI CQ ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ DV CEQ = -A + R i E j + y ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ k b EFF { - ze > + R E D - Figure 2. shows the DC load line of the circuit drawn on the collector characteristics of an NPN transistor. Figure 2. Collector characteristics of an NPN transistor and the DC load line ü AC Load Line Di C = f HDv CE L Dv CE =Dv OUT Assumptions: () The capacitors are all large enough to hold the voltage across their terminals constant during the signal's period, (2) Therefore, the operating point QHI CQ, V CEQ ) remains constant independent of the amplitude of the signal fluctuations in currents and voltages. If that is the case, the capacitors in the circuit can be taken to behave like DC voltage sources as shown in Figure 3.

3 7.BJT Amps. for Undistorted VoltageSwing-X.nb Figure 3. Behavioral equivalent of the common emitter stage with very large capacitors Dv CE =Dv C -Dv E and Di C =Di RC +Di RL, Dv E = 0 constant Di RC =D i j V CC - v C y ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ z =- Dv C ÄÄÄÄÄÄÄÄÄÄÄÄ k { Di RL =- Dv OUT ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ Dv OUT = v C - V CQ =Dv C îdi RL =- Dv C ÄÄÄÄÄÄÄÄÄÄÄÄ R L But, Dv C =D Hv CE + V EQ L = Dv CE \ Di C =- Dv CE ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ - Dv CE ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ R L or, Di C =- i j ÄÄÄÄÄÄÄÄÄÄ + y ÄÄÄÄÄÄÄÄ z Dv CE which defines the "AC load line" k R L { Slope of AC Load Line i j ÄÄÄÄÄÄÄÄÄÄ + y ÄÄÄÄÄÄÄÄ z ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ k R L { H R L L For smaller signals the resistance seen by the transistor at its collector can be found by employing the small sig ac equivalent of the circuit (given in Figure 4) is the same, i.e. ( êê R L ), which confirms the slope calcula above. R L

4 4 7.BJT Amps. for Undistorted VoltageSwing-X. Figure 4. Resistance seen by the collector during small signal operation In Figure 2. both AC and DC load lines are shown as drawn on the collector characteristics of an NPN transi Note that both of the lines have to pass through the operating point, Q. The AC load line defines the rang collector the current and voltage swings that can take place around the operating point, the range limited on the by the saturation region of the transistor characteristics and on the right by its cut-off point. If the swings ten exceed these limits, the waveform is clipped, creating severe distortion in the amplified signal. The undisto (unclipped) voltage swing is restricted to v MAX+ and v MAX+ around the operating point. (See Figure 5.). Dv MAX+ =Dv MAX- 2. Dv MAX+ = R AC.I CQ AC load line resistance R AC = H R L L Dv MAX+ = V CEQ - v CESAT

5 7.BJT Amps. for Undistorted VoltageSwing-X.nb Figure 5. AC load line and the maximum undistorted output swing

6 6 7.BJT Amps. for Undistorted VoltageSwing-X. ü 7. DESIGN OF COMMON EMITTER BJT AMPLIFIERS FOR MAXIMUM UNDISTORTED VOLTAGE SWING Rewriting the maximum peak undistorted swing conditions from above and using the condition of equal symmetric undistorted swings around the operating point an equation for maximum swing can be derived as shown below.. Dv MAX =Dv MAX+ =Dv MAX- 2. Dv MAX = R AC.I CQ Æ I CQ = Dv MAX ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ R AC 3. Dv MAX = V CEQ - V CESAT Æ V CEQ = Dv MAX + V CESAT 4. V CC = V EQ + V CEQ + I CQ Equations H2L and H3L when substituted in Equation H4L V CC = V EQ + Dv MAX + V CESAT + Dv MAX. H5. al Dv i MAX j + k ÄÄÄÄÄÄÄÄÄÄÄÄ R AC y ÄÄÄÄÄÄÄÄÄÄÄÄ z = V CC - V EQ - V CESAT R AC { or, H5. bl Dv i MAX j2 + y ÄÄÄÄÄÄÄÄÄÄ z = V CC - V EQ - V CESAT k R L { since ÄÄÄÄÄÄÄÄÄÄÄÄ = ÄÄÄÄÄÄÄÄÄÄ + ÄÄÄÄÄÄÄÄ R AC R L Equations 5.a and 5.b can be used as design guides to achieve a specified amount of symmetric undistorted voltage swings at the output of a common-emitter amplifier. Note that the maximum undistorted peak swing, v MAX cannot be greater than %50 of V CC even under the most favorable conditions of no load and no emitter drop, V EQ.

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