28V, 100mA, Low-Quiescent-Current LDO with Reset and Power-Fail Input/Output

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1 General Description The high-voltage linear regulator is designed to operate from a +5V to +28V input voltage, and withstands up to 4V transients. The device consumes only 45μA of quiescent current at μa output current. The delivers up to ma of output current with low 5mV maximum dropout voltage. The provides an active-low open-drain microprocessor RESET output. The reset timeout period is programmable and can be set with an external capacitor. The includes an uncommitted comparator for input voltage monitoring/powerfail indication. The device is available with a fixed +5V (A) or +3.3V (B) output. The is short-circuit protected and includes thermal shutdown. The operates over the -4 C to +25 C automotive temperature range and is available in 8-pin, thermally enhanced TDFN-EP and SO-EP packages. Applications Industrial Home Security/Safety Ordering Information Telecom/Networking +Denotes a lead(pb)-free/rohs-compliant package. *EP = Exposed pad. T = Tape and reel. Features +5V to +28V Wide Operating Input Voltage Range Withstands 4V Input Voltage Transients Guaranteed ma Output Current 45μA Typical Quiescent Current at μa Output Current Preset +5V (A) or +3.3V (B) Output Voltage Stable with Only μf Output Capacitance RESET Output with Adjustable Timeout Period Uncommitted Comparator for Voltage Monitoring/ Power-Fail Indication Output Overload and Short-Circuit Protection Thermal Shutdown Available in 8-Pin TDFN (.95W at T A = +7 C) and 8-Pin SO (.5W at T A = +7 C) Operates Over -4 C to +25 C Automotive Temperature Range PART TEMP RANGE PRESET VOUT (V) PIN-PACKAGE TOP MARK AATA+T -4 C to +25 C 5 8 TDFN-EP* +APB AASA+ -4 C to +25 C 5 8 SO-EP* BATA+T -4 C to +25 C TDFN-EP* +APC BASA+ -4 C to +25 C SO-EP* Typical Application Circuit Pin Configurations +5V TO +28V V IN RH 288kΩ RL kω OFF CIN µf ON CCT.µF V S EN SI CT GND RES SO +5V (A)/ +3.3V (B) ma RRES kω RSO kω COUT µf µc RESET POWER- FAIL TOP VIEW SO RES GND EXPOSED PADDLE V S SI EN CT TDFN (3mm x 3mm) Pin Configurations continued at end of data sheet ; Rev ; 5/4

2 Absolute Maximum Ratings V S to GND...-.3V to +28V V S to GND (t s)...-.3v to +4V to GND...-.3V to +2V V S to OUT...-.3V to +28V RES, SO to GND...-.3V to +2V RES, SO Output Sink Current...5mA Short Circuit (V S 6V)...Continuous EN, SI to GND...-.3V to +2V CT to GND...-.3V to the lower of or +2V Continuous Power Dissipation (T A = +7 C) SO-EP (derate 9.2mW/ C above +7 C)...538mW* Thermal Resistance (θ JA )...52 C/W Thermal Resistance (θ JC )...6 C/W TDFN-EP (derate 24.4mW/ C above +7 C)...95mW** Thermal Resistance (θ JA )...4 C/W Thermal Resistance (θ JC ) C/W Operating Junction Temperature Range...-4 C to +25 C Maximum Junction Temperature...+5 C Storage Temperature Range...-6 C to +5 C Lead Temperature (soldering, s)...+3 C *As per JEDEC5 Standard (single-layer board). **As per JEDEC5 Standard (multilayer board). Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (A) (V S = +4V, = 5V, EN unconnected, T A = T J = -4 C to +25 C, C IN = μf, C OUT = μf, unless otherwise noted. Typical specifications are at T A = +25 C.) (Note ) Output Voltage PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Dropout Voltage V DP V S = +4.75V V S to Difference in Undervoltage T A = +25 C, I OUT = ma V V S 28V, I OUT = ma to 5mA (Note 2) 5.6V V S 4V, t s, I OUT = ma to 3mA (Note 2) V S = +8V, I OUT = ma to ma I OUT = ma..25 I OUT = 5mA.2.4 I OUT = ma.3.5 V IO V S = +4V, I OUT = 35mA.4 V Line Regulation V OL +5.5V V S +28V, I OUT = ma.6 5 mv Load Regulation V OLO ma I OUT ma 7 5 mv Current Limit I LIM ma Quiescent Current I Q I OUT = 3µA 45 I OUT = µa 46 I OUT = ma 4.5 ma Shutdown Supply Current I SHDN V EN +.4V 7 3 µa Thermal-Shutdown Temperature T J(SHDN) Temperature rising +65 C Thermal-Shutdown Hysteresis ΔT J(SHDN) 2 C V V µa Maxim Integrated 2

3 Electrical Characteristics (A) (continued) (V S = +4V, = 5V, EN unconnected, T A = T J = -4 C to +25 C, C IN = μf, C OUT = μf, unless otherwise noted. Typical specifications are at T A = +25 C.) (Note ) RESET PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Reset Threshold Voltage V RT falling % Reset Threshold Hysteresis V RTH 3 65 mv Reset Pulse Delay t RD C CT = nf, t R µs 55 8 ms RES Output Low Voltage V RL V S +.5V, R RES = kω to.4 V RES Output High Leakage Current I RH V RES = 5V. µa Delay Comparator Threshold V CTTH V CT rising V Delay Comparator Threshold Hysteresis SENSE mv Sense Threshold V ST V SI falling V Sense Threshold Hysteresis 5 5 mv Sense Output Low Voltage V SL V SI.V, V S 4V, R SO = kω to.4 V Sense Output Leakage Current I SH V SO = 5V, V SI.5V µa Sense Input Current I SI V SI = 3.3V - + µa ENABLE EN = high, regulator on 2.4 Enable Voltage V EN EN = low, regulator off.4 Enable Internal Pullup Current I EN EN is internally pulled up to 3.6V (max) 3 µa V Maxim Integrated 3

4 Electrical Characteristics (B) (V S = +4V, = 3.3V, EN unconnected, T A = T J = -4 C to +25 C, C IN = μf, C OUT = μf, unless otherwise noted. Typical specifications are at T A = +25 C.) (Note ) Output Voltage PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS V S to Difference in Undervoltage T A = +25 C, I OUT = ma V V S 28V, I OUT = ma to 5mA (Note 2) V V S 4V, t s, I OUT = ma to 3mA (Note 2) V S = +8V, I OUT = ma to ma V IO V S = 3.5V, I OUT = 35mA.2.4 V Line Regulation V OL 5V V S 28V, I OUT = ma.6 5 mv Load Regulation V OLO ma I OUT ma 4 mv Current Limit I LIM ma Quiescent Current I Q I OUT = 3µA 45 I OUT = µa 45 I OUT = ma 4.4 ma Shutdown Supply Current I SHDN V EN.4V 7 3 µa Thermal-Shutdown Temperature T J(SHDN) Temperature rising +65 C Thermal-Shutdown Hysteresis ΔT J(SHDN) 2 C RESET CIRCUIT Reset Threshold Voltage V RT falling % Reset Threshold Hysteresis V RTH mv Reset Pulse Delay t RD C CT = nf, t R µs ms RES Output Low Voltage V RL V S.5V, R RES = 4kΩ to.4 V RES Output High Leakage Current I RH V RES = 3.3V. µa Delay Comparator Threshold V CTTH V CT rising V V µa Delay Comparator Threshold Hysteresis mv Maxim Integrated 4

5 Electrical Characteristics (B) (continued) (V S = +4V, = 3.3V, EN unconnected, T A = T J = -4 C to +25 C, C IN = μf, C OUT = μf, unless otherwise noted. Typical specifications are at T A = +25 C.) (Note ) SENSE PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Sense Threshold V ST V SI falling V Sense Threshold Hysteresis 5 5 mv Sense Output-Low Voltage V SL V SI.9V, V S 4V, R SO = kω to.4 V Sense Output Leakage Current I SH V SO = 3.3V, V SI.5V µa Sense Input Current I SI V SI = 3.3V - + µa ENABLE EN = high, regulator on 2.4 Enable Voltage V EN EN = low, regulator off.4 Enable Internal Pullup Current I EN EN is internally pulled up to 3.6V (max) 3 µa Note : Limits at T A = -4 C are guaranteed by design and not production tested. Note 2: Maximum output current is limited by the power dissipation capability of the package. V Typical Operating Characteristics (Typical Application Circuit, V S = +4V, C IN = μf, C OUT = μf, V SI = V, V EN = +2.4V, = +5V, T A = +25 C, unless otherwise noted.) 6 5 OUTPUT VOLTAGE vs. INPUT VOLTAGE AT NO LOAD, A, ma, ma, ma A toc 4 3 OUTPUT VOLTAGE vs. INPUT VOLTAGE AT NO LOAD, A, ma, ma, ma B toc2 OUTPUT VOLTAGE vs. OUTPUT CURRENT 5.4 A 5.2 V S = 4V 5. toc3 VOUT (V) 4 VOUT (V) 2 VOUT (V) V S = 6V V S (V) V S (V) I OUT (ma) Maxim Integrated 5

6 Typical Operating Characteristics (continued) (Typical Application Circuit, V S = +4V, C IN = μf, C OUT = μf, V SI = V, V EN = +2.4V, = +5V, T A = +25 C, unless otherwise noted.) I OUT = A OUTPUT VOLTAGE vs. TEMPERATURE I OUT = ma A toc4 QUIESCENT CURRENT vs. INPUT VOLTAGE T A = +25 C, +85 C T A = +25 C toc5 QUIESCENT CURRENT vs. INPUT VOLTAGE T A = +25 C T A = +25 C, +85 C toc6 VOUT (V) I OUT = ma IQ (µa) T A = -4 C IQ (µa) T A = -4 C RESET OUTPUT LOW (V) I OUT = ma RESET OUTPUT LOW vs. TEMPERATURE RRES = 4kΩ RRES = kω toc7 IQ (ma) EN = OPEN I OUT = NO LOAD V S = 4V T A = +25 C V S (V) QUIESCENT CURRENT vs. OUTPUT CURRENT toc8 ISHDN (µa) EN = OPEN I OUT = A V S (V) SHUTDOWN SUPPLY CURRENT vs. INPUT VOLTAGE V S = 4V T A = +25 C EN = V toc9 ISHDN (µa) SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE V S = 4V EN = V toc DROPOUT VOLTAGE (mv).. I OUT (ma) A V S = 4.75V DROPOUT VOLTAGE vs. LOAD CURRENT. I OUT (ma) toc DROPOUT VOLTAGE (mv) V S (V) DROPOUT VOLTAGE vs. LOAD CURRENT B V S = 3.3V I OUT (ma) toc2 Maxim Integrated 6

7 Typical Operating Characteristics (continued) (Typical Application Circuit, V S = +4V, C IN = μf, C OUT = μf, V SI = V, V EN = +2.4V, = +5V, T A = +25 C, unless otherwise noted.) DROPOUT VOLTAGE vs. TEMPERATURE RESET THRESHOLD vs. TEMPERATURE RESET VOLTAGE vs. OUTPUT VOLTAGE DROPOUT VOLTAGE (mv) A V S = 4.75V I OUT = ma I OUT = ma toc3 RESET THRESHOLD VOLTAGE (V) A RISING FALLING toc4 VRES (V) A R RES = kω TO OUT FALLING RISING toc (V) SENSE THRESHOLD vs. TEMPERATURE SENSE OUTPUT vs. SENSE INPUT POWER-SUPPLY REJECTION RATIO vs. SUPPLY CURRENT SENSE THRESHOLD (V) SI INPUT RISING SI INPUT FALLING toc6 SENSE OUTPUT (V) V SI FALLING V SI RISING toc7 PSRR (db) VIN = 4V IOUT = ma 5mVP-P toc SENSE INPUT (V) FREQUENCY (khz) LOAD-TRANSIENT RESPONSE toc9 C IN = µf C OUT = µf/mω ESR I STEP = µa TO 5mA 5V AC-COUPLED mv/div LINE-TRANSIENT RESPONSE toc2 5V AC-COUPLED 2mV/div I OUT = ma 5mA I OUT 2mA/div µa 4V V S V/div 4V 2µs/div 2µs/div Maxim Integrated 7

8 Typical Operating Characteristics (continued) (Typical Application Circuit, V S = +4V, C IN = μf, C OUT = μf, V SI = V, V EN = +2.4V, = +5V, T A = +25 C, unless otherwise noted.) STARTUP RESPONSE toc2 ENABLE RESPONSE toc22 SHUTDOWN RESPONSE toc23 V I OUT = ma 2V/div V I OUT = ma 5V/div I OUT = ma 2V/div V V V S 5V/div V EN 5V/div EN 2V/div V ms/div 2µs/div 2µs/div Pin Description PIN NAME FUNCTION V S Regulator Input. Operating supply range is from +5V to +28V and withstands 4V transients. Bypass V S to GND with a µf capacitor. 2 SI 3 EN 4 CT 5 GND 6 RES 7 SO Voltage Sense/Power-Fail Comparator Input. SI is the noninverting input of an uncommitted comparator. SO asserts low if V SI drops below the reference level, V ST. Enable Input. Leave unconnected (or pull EN high) to turn on the regulator. Pull EN low to place the device in shutdown mode. EN is internally pulled up to 3.6V. Reset Timeout Delay Capacitor Connection. Connect a capacitor from CT to GND to program the reset timeout period/reset pulse delay. During regulation, CT is pulled up to. CT is pulled low during reset, when EN is low, or when in thermal shutdown. Ground. Bypass the input and output capacitors to the GND plane. Solder to large pads or the circuit-board ground plane to maximize thermal dissipation. Active-Low Reset Output. Pull up externally to. Open-drain RES goes low when is below the reset threshold. Once output voltage is in regulation, RES goes high after the programmed reset timeout period is over. RES is low when EN is low or in thermal shutdown. Voltage Sense/Power-Fail Comparator Output. Pull up externally to. Open-drain SO asserts low when V SI drops below the reference level, V ST. SO also asserts low when EN is low or in thermal shutdown. 8 Regulator Output. Fixed at +5V (A) or +3.3V (B). Bypass with a µf ceramic capacitor to GND. EP EP Exposed Paddle. EP is internally connected to GND. Connect EP to GND to provide a low thermal-resistance path from the IC junction to the PC board. Do not use as the only electrical connection to GND. Maxim Integrated 8

9 LDO V S PASS ELEMENT V INT 3µA MAX V REF EN ENABLE ALWAYS-ON GND PREREGULATOR ALWAYS-ON ICT 2µA DELAY COMPARATOR RES V INT 3.6V (MAX) N 2.V N.9 x V REF CT FAULT DETECTION (TEMP AND SC) SCLIM SD V REF.25V V REF SI SO N V REF Figure. Functional Diagram Maxim Integrated 9

10 Detailed Description Regulator The high-voltage, LDO regulator operates from +5V to +28V input voltage. The device withstands up to 4V transients, providing protection against temporary overvoltage conditions like load dump. The incorporates internal feedback resistors for factory-preset voltages of either +5V (A) or +3.3V (B). The regulator is capable of driving up to ma of load current and features a typical current limit of 26mA. The regulator uses a pnp pass element and provides low.5v dropout while delivering ma load current. The output of the regulator follows closely to the input during turn-on. See the Output Voltage vs. Input Voltage graph in the Typical Operating Characteristics. This makes the usable input voltage range for 3.3V and 5V output down to 3.7V and 5.5V, respectively. The is designed to operate with very low quiescent current during always-on operation when not in dropout. The regulator is stable with a wide variety of capacitors including low-esr ceramic μf (63 case size). The load-transient response curves depict the stability of the LDO when using different capacitance and ESR ranges. See the Capacitor Selection and Regulator Stability section in the Applications Information. Reset Output (RES) The integrates a power-on-reset circuit. RES is an open-drain output that requires a pullup resistor to. The open-drain MOSFET can sink up to 825μA current while keeping the RES voltage below.4v. The internal reset circuit monitors the regulator output voltage and RES asserts an active-low output when the regulator output falls below a reset threshold of typically.9 x. The RES output remains low when is below the reset threshold, and remains low for the duration of the reset timeout period (t RD ). The reset timeout period is programmable and can be set with an external capacitor connected from CT to ground. The duration of the delay as a function of CT is: 6 ( ) CCT V t CCTH RD = + 35 ICT where V CCTH = 2.V and I CT = 2 x -6 A. The default reset timeout period is 35μs when no capacitor is connected from CT to ground. SI/SO Comparator The includes an uncommitted comparator for monitoring the input voltage or for detecting power-fail conditions. The input SI is the noninverting input of the comparator. The open-drain output SO asserts low when voltage at the input SI drops below the threshold voltage, V ST (see Figure ). The sense comparator typically has a hysteresis of mv. Use the following equation to calculate the resistor-divider for programming the trip voltage (V TRIP ) during power-fail. See the Typical Application Circuit. ( V R ) ST H VTRIP = + VST RL where V ST =.6V (typ). Choose R L between kω to 3kΩ. Enable Input The enable (EN) is a TTL-compatible logic input. Logic low at EN turns off the regulator and reduces the current consumption to 7μA (typ). It is internally pulled up to a logic-high voltage (3.6V max) by an internal resistor. Thus, the is enabled by default when V S is applied and EN is left unconnected. The regulator, reset supervisor circuit, and the sense comparator can be manually shut down by pulling EN low. For shutdown operation, the pulldown network must be capable of sinking 3μA max, since the internal pullup resistor sets the maximum pullup current at 3μA. The external pulldown device should not leak more than μa current when it is in the off-state. Current Limit The features a current limiter that monitors the output current and controls the pass transistor s gate voltage, limiting the output current to typically 26mA. The output can be continuously shorted to ground without damaging the device at V S 6V. Note that the output short-circuit current may increase the power dissipation significantly and raise the junction temperature to its thermal-shutdown threshold. In such a case, the is temporarily turned off. Thermal Shutdown When the junction temperature exceeds T J = +65 C (typ), an internal thermal sensor signals the shutdown logic to turn off the pass transistor and allow the IC to cool. The thermal sensor turns the pass transistor on again after the IC s junction temperature cools by +2 C (typ), resulting in a cycled output during continuous thermal-overload conditions. Thermal shutdown protects the in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature of T J = +5 C. Maxim Integrated

11 Applications Information Available Output Current Calculation The high-voltage regulator provides up to ma of output current. The input voltage extends to +28V. Package power dissipation limits the amount of output current available for a given input/output voltage and ambient temperature. Figure 2 depicts the maximum power dissipation curve for the 8-pin SO-EP package. The graph assumes that the exposed metal back of the package is soldered to copper on a single layer PCB according to the JEDEC5 standard. Use Figure 2 to determine the allowable package dissipation for a given ambient temperature. Alternately, use the following formula to calculate the allowable package dissipation:.538w for T A + 7 C P D = (T A 7 C) For + 7 C < T A + 25 C PD (W) W 8-PIN SO-EP DERATE 9.23mW/ C fig2 After determining the allowable package dissipation, calculate the maximum output current using the following formula: P I D OUT(MAX) VS VOUT The above equations do not include the power dissipation from self-heating due to the IC ground current. The junction-to-ambient thermal impedance depends on the area of the copper plane, its thickness, and the number of copper layers on PCB. For the higher power dissipation requirement, use multiple-layered PCBs with 2oz copper and a large copper area. Capacitor Selection and Regulator Stability For stable operation over the full temperature range and with load currents up to ma, use a μf output capacitor with a low ESR. Table shows a list of recommended output capacitor ESR for various load conditions. Table. Recommended Output Capacitor ESR RECOMMENDED C OUT ESR I OUT = 3.3V = 5.V I OUT ma C ESR <.66Ω C ESR < Ω I OUT 5mA C ESR <.32Ω C ESR <.2Ω I OUT ma C ESR < 66mΩ C ESR <.Ω Figure 2. 8-Pin SO-EP Maximum Power Dissipation vs. Temperature Maxim Integrated

12 Pin Configurations (continued) Chip Information PROCESS: BiCMOS TOP VIEW V S SI EN CT EXPOSED PADDLE SO RES GND Package Information For the latest package outline information and land patterns (footprints), go to Note that a +, #, or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. SO-EP PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 8 TDFN-EP T SO-EP S8E Maxim Integrated 2

13 Revision History REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED /6 Initial release 5/4 Removed Automotive from the Applications section For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim Integrated s website at Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. 24 Maxim Integrated Products, Inc. 3

28V, 100mA, Low-Quiescent-Current LDO with Reset and Power-Fail Input/Output

28V, 100mA, Low-Quiescent-Current LDO with Reset and Power-Fail Input/Output 19-654; Rev ; 11/6 General Description The high-voltage linear regulator is designed to operate from a +5V to +28V input voltage, and withstands up to 4V transients. The device consumes only 45µA of quiescent