Midterm 1 Announcements

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1 Midterm Announcements eiew session: 5-8pm TONIGHT 77 Cory Midterm : :30-pm on Tuesday, July Dwelle 45. Material coered HW-3 Attend only your second lab slot this wee EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu eiew: Second-Order Filter Circuits Band Pass Z /jωc jωl V S Low Pass High Pass C L Band eject H BP / Z H LP (/jωc) / Z H HP jωl / Z H B H LP H HP EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu

2 Lecture #9 OUTLINE The operational amplifier ( op amp ) Ideal op amp Feedbac Unity-ga oltage follower circuit Summg, difference, tegrator, differentiator, actie filter eadg Ch. 4 EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 3 The Operational Amplifier The operational amplifier ( op amp ) is a basic buildg bloc used analog circuits. Its behaior is modeled usg a dependent source. When combed with resistors, capacitors, and ductors, it can perform arious useful functions: amplification/scalg of an put signal sign changg (ersion) of an put signal addition of multiple put signals subtraction of one put signal from another tegration (oer time) of an put signal differentiation (with respect to time) of an put signal analog filterg nonlear functions lie exponential, log, sqrt, etc EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 4

3 Op Amp Termals 3 signal termals: puts and output IC op amps hae additional termals for DC power supplies Common-mode signal ( )/ Differential signal - V positie power supply Inertg put Non-ertg put - output V negatie power supply EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 5 Op Amp Termal Voltages and Currents All oltages are referenced to a common node. Current reference directions are to the op amp. i i V i c V cc i o i c- o V common node (external to the op amp) V cc EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 6 3

4 Model A is differential ga or open loop ga Ideal op amp A i 0 o Circuit Model i o i o Common mode ga 0 ( ) cm, d A A o cm cm d d Sce A( ), A 0 o cm i i A( ) o EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 7 Model and Feedbac Negatie feedbac connectg the output port to the negatie put (port ) Positie feedbac connectg the output port to the positie put (port ) Circuit Model i o i o i o i A( ) EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 8 4

5 Summg-Pot Constrat Chec if under negatie feedbac Small i result large o Output o is connected to the ertg put to reduce i esultg i 0 Summg-pot constrat i i 0 Virtual short circuit Not only oltage drop is 0 (which is short circuit), put current is 0 This is different from short circuit, hence called irtual short circuit. EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 9 Inertg Amplifier Negatie feedbac checed Use summg-pot constrat i - L Closed loop ga A 0, i i 0 Use KCL At Node. ( ) ( out ) i o Input impedance o i o Ideal oltage source dependent of load resistor EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 0 5

6 Non-Inertg Amplifier Ideal oltage amplifier -, i i 0. Closed loop ga A Use KCL At Node L ( 0 ) ( 0) i o ( ) A Input impedance i o EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu Voltage Follower - L 0 ( 0 ) ( 0) i o ( ) A EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 6

7 Example - i 4 i 3 i 5 i i L Switch is open, i 0 i 0 3 ( ) i3 i4 0 i5 0 ( 0 ) i 5 0 o A, Switch is closed 0, i 0 i 0 3 ( ) ( 0 ) i4 i 5 0 o A, EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 3 Example Design an analog front end circuit to an strument system equires to wor with 3 full-scale of put signals (by manual switch): 0 : ±,0 : ± 0,0 : ± 00 V For each put range, the output b a needs to be 0 : ± 0 V The put resistance is MΩ o ( ) Switch at c a b a b c Switch at b a Switch at a a b c c b a L EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 4 7

8 Example (cont d) MΩ a b c Max A 0 ( ) a b a b ( ) Switch at b 0. a b c a b c a a 0. ( ) 0.0 a b c a b c 0 Ω, 90 Ω, 900Ω a b c Switch at c A A Switch at a 9 EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 5 Summg Amplifier EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 6 8

9 Difference Amplifier EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 7 Integrator Want o K dt What is the difference between: - C V 0 - EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 8 9

10 Differentiator Want - C EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 9 Application: Digital-to-Analog Conersion A DAC can be used to conert the digital representation of an audio signal to an analog oltage that is then used to drie speaers -- so that you can hear it! Weighted-adder D/A conerter S4 0K 8V - S3 S S 4-Bit D/A 0K 40K 80K (Transistors are used as electronic switches) 5K V 0 S closed if LSB S " if next bit S3 " if " " S4 " if MSB Bary number (olts) MSB LSB EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 0 Analog output

11 Characteristic of 4-Bit DAC Analog Output (V) Digital Input EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu Actie Filter Conta few components Transfer function that is sensitie to component tolerance Easily adjusted equire a small spread of components alues Allow a wide range of useful transfer functions EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu

12 Actie Filter Example - 3 C C (-) f f o ( 3 ) Use KCL At Node A jωc ( 3) ( 3 ) Use KCL At Node B jωc( 3 o ) o ω C jωc(3 ) Let ωb / C o H ( ω) ω ω (3 ) ωb ωb ω 0, H( ω) DC ga ω ωb, H ( ω) 3 ω >> ωb, H ( ω) : ω ω ωb 0log H ( ω) decays at a rate of 40 db / decade EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 3 Cascaded Actie Filter Example C C - 3 C 0 3 (-) f C ( -) f f f o ω C jω C (3 ) ω C jωc(3 ) Let ω / C, ω / C B B o H ( ω) ω ω ω ω (3 ) (3 ) ωb ωb ωb ωb ω 0, H ( ω) DC ga ω ω, H ( ω) B ω >> ωb, H ( ω) : ω 4 ω ωb ωb 0log H ( ω) decays at a rate of 80 db / decade EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 4

13 Op Amp Voltage Transfer Characteristic The op amp is a differentiatg amplifier: V cc o slope A >> id negatie saturation -V cc lear positie saturation In the lear region, o A ( ) A id A is the open-loop ga Typically, V cc 0 V and A > 0 4 lear range: - mv id ( ) mv Thus, for an op amp to operate the lear region, There is a irtual short between the put termals.) EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 5 Achieg a Virtual Short ecall the oltage transfer characteristic of an op amp: Plotted usg different scales for o and p n Plotted usg similar scales for o and p n o o ~0 V V cc slope A >> p n ~0 V V cc slope A >> p n ~ mv -V cc ~0 V -V cc Q: How does a circuit mata a irtual short at the put of an op amp, to ensure operation the lear region? A: By usg negatie feedbac. A signal is fed bac from the output to the ertg put termal, effectg a stable circuit connection. Operation the lear region enforces the irtual short circuit. EE40 Summer 005: Lecture 9 Instructor: Octaian Florescu 6 3