Lecture 17: Designing Sequential Systems Using Flip Flops
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1 EE210: Switching Systems Lecture 17: Designing Sequential Systems Using Flip Flops Prof. YingLi Tian April 11, 2019 Department of Electrical Engineering The City College of New York The City University of New York (CUNY) 1
2 Designing Sequential Systems Goal: Given a problem statement a verbal description of the intended behavior of the system, design a block diagram of the system using the available components and meeting the design objectives and constraints. 2
3 Steps of Designing Sequential Systems -- 1 Step 1: From a word description, determine what needs to be stored in memory, that is, what are the possible states. Step 2: If necessary, code the inputs and outputs in binary. Step 3: Derive a state table to describe the behavior of the system. Step 4: Use state reduction techniques to find a state table that produces the same input/output behavior, but has fewer states. 3
4 Steps of Designing Sequential Systems -- 2 Step 5: Choose a state assignment, that is, code the states in binary. Step 6: Choose a flip flop type and derive the flip flop input maps or tables. Step 7: Produce the logic equation and draw a block diagram (as in the case of combinational systems). 4
5 Design Example 1 A system with one input x and one output z such that z=1 if and only if x has been 1 for at least three consecutive clock time. Step 1 3: create state table 5
6 Design Example 1: state assignments q has 4 states: A, B, C, D. Need two 1-bit memories q 1 and q 2 to represent all the states. 6
7 Design Example 1: Truth table 7
8 Design Example 1: output map and equations q 1 * = xq 2 + xq 1 q 2 * = xq 2 + xq 1 q 1 * q 2 * z = q 1 q 2 Conclusion: need 4 two-input AND gates, 2 two-input OR gates. q 1 * and q 2 * share one gate: xq 1 8
9 Designing Systems Using Flip Flops Method 1: truth table-based method Method 2: map-based method Method 3: quick method (only works for JK flip flops). We use previous example: A system with one input x and one output z such that z=1 if and only if x has been 1 for at least three consecutive clock time. 9
10 Designing based on Truth Table D Flip Flops D Flip Flop: q* = D From Slide 8: D 1 = x q 2 + x q 1 D 2 = x q 2 + x q 1 q 1 * = xq 2 + xq 1 q 2 * = xq 2 + xq 1 z = q 1 q 2 10
11 D Flip Flops The output depends only on the input. The D flip flop behavior table: 11
12 Designing based on Truth Table D Flip Flops D 1 = q 1 * = xq 2 + xq 1 D 2 = q 2 * = xq 2 + xq 1 z = q 1 q 2 12
13 JK Flip Flop JK flip flop is a combination of the SR and T flip flops. It behaves like a SR flip flop (J as S, K as R). However, if J=K=1, it behaves like a T flip flop. q* = Jq + K q 13
14 Designing by JK Flip Flops q* = Jq + K q From Slide 8: q 1 * = xq 2 + xq 1 q 2 * = xq 2 + xq 1 z = q 1 q 2 14
15 Designing by JK Flip Flops J 1 = xq 2 K 1 = x z = q 1 q 2 J 2 = x K 2 = x + q 1 Conclusion: need 2 two-input AND gates, 1 two-input OR gate, and a NOT gate for x. A volunteer to draw the circuit diagram!! 15
16 SR Flip Flop hold reset set q* = S + R q S and R cannot be 1 at the same time. 16
17 Designing by SR Flip Flops q* = S + R q 17
18 Designing by SR Flip Flops S 1 = xq 2 R 1 = x z = q 1 q 2 S 2 = xq 2 R 2 = x + q 1q 2 Conclusion: need 4 two-input AND gates, 1 two-input OR gate, and a NOT gate for x. 18
19 Designing by T Flip Flops 19
20 Designing by T Flip Flops T 1 = x q 1 + xq 1q 2 T 2 = x q 2 + xq 2 + xq 1q 2 z = q 1 q 2 Conclusion: need 4 two-input AND gates, 1 three-input AND gate, 1 two-input and 1 three-input OR gate, and a NOT gate for x. 20
21 Quick method of implementation by using JK Flip Flops Using SR flip flop q* = S + R q Using JK flip flop with more Xs than SR. q* = Jq + K q 21
22 Quick method of implementation by using JK Flip Flops q* = Jq + K q If q = 0, we have q* =J If q = 1, we have q* =K 22
23 Quick method of implementation by using JK Flip Flops Computation of J1 and K1 J 1 = xq 2 K 1 = x both J 1 and K 1 do not depend on q 1. 23
24 Quick method of implementation by using JK Flip Flops 11 J 2 = x, K 2 = x + q 1, both J 2 and K 2 do not depend on q 2. 24
25 Quick method of implementation by using JK Flip Flops J 1 = xq 2, K 1 = x or K 1 = x J 1 = xq 2 K 1 = x J 2 = x K 2 = x + q 1 z = q 1 q 2 25
26 Quick method of implementation by using JK Flip Flops J 2 = x, K 2 = x + q 1 q* = Jq + K q J 1 = xq 2 K 1 = x J 2 = x K 2 = x + q 1 z = q 1 q 2 If q = 0, we have q* =J; If q = 1, we have q* =K 26
27 Practice 1: A system with one input x and one output z such that z=1 if and only if x has been 1 for at least three consecutive clock time. Step 1 3: create state table 27
28 Use a different state assignment q has 4 states: A, B, C, D. Need two memories q 1 and q 2 to represent all the states. 28
29 Designing by Using JK Flip Flops q* = Jq + K q Using quick method 29
30 Practice 2: A system with one input x and one output z such that z=1 if and only if x = 1 and has been 1 for at least two consecutive clock time. Step 1 3: create state table 30
31 Announcement HW7 is due on 4/18/2019 Practice: P430 Example 7.4 Read Chapter 7.1 Designing Sequential Systems using Flip Flops Next Class (Chapter 7.2 and 7.3) Design of Counters 31
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