BUL45D2G. High Speed, High Gain Bipolar NPN Power Transistor. with Integrated Collector Emitter Diode and Built in Efficient Antisaturation Network
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1 High Speed, High Gain Bipolar NPN Power Transistor with Integrated Collector Emitter Diode and Built in Efficient Antisaturation Network The is state of art High Speed High gain BiPolar transistor (HBIP). High dynamic characteristics and lot to lot minimum spread (± ns on storage time) make it ideally suitable for light ballast applications. Therefore, there is no need to guarantee an h FE window. It s characteristics make it also suitable for PFC application. Features Low Base Drive Requirement High Peak DC Current Gain ( I C = ma Extremely Low Storage Time Min/Max Guarantees Due to the HBIP Structure which Minimizes the Spread Integrated Collector Emitter Free Wheeling Diode Fully Characterized and Guaranteed Dynamic CE(sat) 6 Sigma Process Providing Tight and Reproductible Parameter Spreads These Devices are Pb Free and are RoHS Compliant* MAXIMUM RATINGS Rating Symbol alue Unit Collector Emitter Sustaining oltage CEO dc Collector Base Breakdown oltage CBO 7 dc Collector Emitter Breakdown oltage CES 7 dc Emitter Base oltage EBO dc Collector Current Continuous I C Adc Peak (Note ) I CM Base Current Continuous Peak (Note ) Total Device Dissipation C = C Derate above C I B I BM P D 7.6 Adc W W/ C Operating and Storage Temperature T J, T stg 6 to C THERMAL CHARACTERISTICS Characteristics Symbol Max Unit Thermal Resistance, Junction to Case R JC.6 C/W Thermal Resistance, Junction to Ambient R JA 6. C/W Maximum Lead Temperature for Soldering Purposes /8 from Case for Seconds T L 6 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Pulse Test: Pulse Width = ms, Duty Cycle %. *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. POWER TRANSISTOR. AMPERES, 7 OLTS, 7 WATTS TO AB CASE A 9 STYLE MARKING DIAGRAM A Y WW G AY WW = Assembly Location = Year = Work Week = Pb Free Package Device Package Shipping ORDERING INFORMATION TO (Pb Free) Units / Rail Semiconductor Components Industries, LLC, April, Rev. Publication Order Number: BULD/D
2 ELECTRICAL CHARACTERISTICS (T C = C unless otherwise noted) ÎÎ Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Collector Emitter Sustaining oltage CEO(sus) ÎÎ (I C = ma, L = mh) dc Collector Base Breakdown oltage CBO 7 9 ÎÎ dc (I CBO = ma) Emitter Base Breakdown oltage (I EBO = ma) EBO. dc Collector Cutoff Current I CEO Î Adc ( CE = Rated CEO, I B = ) Collector Cutoff Current ( CE = Rated CES, EB = ) ÎÎ C = C I CES Î Adc Collector Cutoff Current ( CE =, EB = ) ÎÎ C = C C = C Î Emitter Cutoff Current I EBO ( EB = dc, I C = ) Adc ÎÎ ON CHARACTERISTICS Base Emitter Saturation oltage Î BE(sat) (I C =.8 Adc, I B = 8 madc) ÎÎ C = C C = C ÎÎ dc ÎÎ (I C = Adc, I B =. Adc) ÎÎ C = C C = C Collector Emitter Saturation oltage Î CE(sat) (I C =.8 Adc, I B = 8 madc) ÎÎ C = C ÎÎ dc.8. C = C.. (I C = Adc, I B =. Adc) ÎÎ C = C ÎÎ.. C = C.8.6 (I C =.8 Adc, I B = madc) ÎÎ C = C ÎÎ.6.7 C = C.6 DC Current Gain h (I C =.8 Adc, CE ÎÎ = dc) C FE = C C = C 9 ÎÎ (I C = Adc, CE = dc) ÎÎ C = C C = C 7 9. ÎÎ DIODE CHARACTERISTICS Forward Diode oltage Î EC (I EC = Adc) ÎÎ C = C.. C = C ÎÎ.7 ÎÎ (I EC ÎÎ = Adc) C Î = C..6 C = C (I EC =. Adc) ÎÎ C = C ÎÎ.8. C = C.6 Forward Recovery Time (see Figure 7) T (I F ÎÎ = Adc, di/dt = A/ s) C fr ns = C (I F ÎÎ = Adc, di/dt = A/ s) C ÎÎ = C 6 (I F ÎÎ =. Adc, di/dt = A/ s) C ÎÎ = C
3 ELECTRICAL CHARACTERISTICS (T C = C unless otherwise noted) ÎÎ ÎÎ Characteristic Symbol Min Typ Max Unit DYNAMIC CHARACTERISTICS Current Gain Bandwidth f T ÎÎ MHz (I C =. Adc, CE = dc, f = MHz) ÎÎ Output Capacitance C ob 7 pf ( CB = dc, I E =, f = MHz) Input Capacitance C ( EB = 8 dc) ib ÎÎ pf DYNAMIC SATURATION s Î C = C CE(dsat).7 ÎÎ I C = A Dynamic Saturation I B C = CÎÎ 9. ÎÎ = ma oltage: Î CC s Î C = C ÎÎ. ÎÎ Determined s and C = C.7 ÎÎ s respectively s rising I B reaches Î I C = A C = C 9% of final I C = C.9 B Î I B =.8 s Î C = C. ÎÎ CC = C = CÎÎ. ÎÎ SWITCHING CHARACTERISTICS: Resistive Load (D.C. %, Pulse Width = s) Turn on Time C = C t on 9 ns I C = Adc, I B =. Adc C = C I B = Adc Turn off Time CC = dc Î C = t C = C off... ÎÎ s Turn on Time C = C t on 9 I C = Adc, I B =. Adc Î C = CÎÎ ÎÎ ns I B =. Adc Turn off Time CC = dc Î C = C t off.. s C = C. SWITCHING CHARACTERISTICS: Inductive Load ( clamp =, CC =, L = H) ÎÎ Fall Time C = t C = C f 9 9 ÎÎ ns Storage Time I C = Adc Î C = C t s.7.9 I B = madc I B = madc Î C = CÎÎ. ÎÎ s Crossover Time C = C t c 9 ns C = C 9 ÎÎ Fall Time C = t C = C f ÎÎ 8 ÎÎ ns I C = Adc Î Storage Time C = C t s I B =. Adc I B Î C = C ÎÎ.9..9 ÎÎ s =. Adc Crossover Time C = C t c ns C = C
4 TYPICAL STATIC CHARACTERISTICS 8 CE = T J = C 8 CE = T J = C h FE, DC CURRENT GAIN 6 T J = C T J = - C h FE, DC CURRENT GAIN 6 T J = C T J = - C Figure. DC Current olt Figure. DC Current olt CE, OLTAGE (OLTS). A A A A I C = ma.. I B, BASE CURRENT (AMPS) T J = C A CE, OLTAGE (OLTS).. I C /I B = T J = C T J = C T J = - C.. Figure. Collector Saturation Region Figure. Collector Emitter Saturation oltage I C /I B = I C /I B = CE, OLTAGE (OLTS) T J = - C T J = C CE, OLTAGE (OLTS) T J = - C T J = C T J = C T J = C Figure. Collector Emitter Saturation oltage Figure 6. Collector Emitter Saturation oltage
5 TYPICAL STATIC CHARACTERISTICS I C /I B = I C /I B = BE, OLTAGE (OLTS) T J = C T J = C T J = - C BE, OLTAGE (OLTS) T J = - C T J = C T J = C Figure 7. Base Emitter Saturation Region Figure 8. Base Emitter Saturation Region BE, OLTAGE (OLTS) I C /I B = T J = C T J = - C T J = C FORWARD DIODE OLTAGE (OLTS) C C REERSE EMITTER-COLLECTOR CURRENT (AMPS) Figure 9. Base Emitter Saturation Region Figure. Forward Diode oltage C ib (pf) T J = C f (test) = MHz 9 ma T J = C C ob (pf) BCER (OLTS) ma R, REERSE OLTAGE (OLTS) R BE ( ) Figure. Capacitance Figure. BCER = f(icer)
6 TYPICAL SWITCHING CHARACTERISTICS 8 CC = PW = s T J = C T J = C I C /I B = CC = PW = s t, TIME (ns) 6 I C /I B = t, TIME ( s) μ I C /I B = T J = C T J = C I C /I B = Figure. Resistive Switch Time, t on Figure. Resistive Switch Time, t off I C /I B = CC = Z = L C = H CC = Z = L C = H t, TIME ( s) μ t, TIME ( s) μ T J = C T J = C T J = C T J = C Figure. Inductive Storage Time, t I C /I B = Figure 6. Inductive Storage Time, t I C /I B = 6 CC = Z = L C = H T J = C T J = C t c I Boff = I Bon CC = Z = L C = H t, TIME (ns) t, TIME (ns) t fi T J = C T J = C Figure 7. Inductive Switching, t c & t I C /I B = Figure 8. Inductive Switching, t I C /I B = 6
7 TYPICAL SWITCHING CHARACTERISTICS t, TIME (ns) I Boff = I Bon CC = Z = L C = H T J = C T J = C tsi, STORAGE TIME ( μs) T J = C T J = C I C = A CC = Z = L C = H I C = A h FE, FORCED GAIN Figure 9. Inductive Switching, t I C /I B = Figure. Inductive Storage Time t fi, FALL TIME (ns) I Boff = I Bon CC = Z = L C = H T J = C T J = C I C = A t c, CROSSOER TIME (ns) 8 6 CC = Z = L C = H T J = C T J = C I C = A I C = A h FE, FORCED GAIN I C = A h FE, FORCED GAIN Figure. Inductive Fall Time Figure. Inductive Crossover Time 6 t, TIME (ns). I B = ma I B = ma I B = ma I B = ma I B = A I B = I B.. CC = Z = L C = H. t fr, FORWARD RECOERY TIME (ns) di/dt = A/ s T C = C.. I F, FORWARD CURRENT (AMP) Figure. Inductive Storage Time, t si Figure. Forward Recovery Time t fr 7
8 TYPICAL SWITCHING CHARACTERISTICS CE dyn s dyn s I C t si 9% I C t fi 6 clamp % clamp t c % I C 9% I B s I B 9% I B I B s TIME 6 7 TIME 8 Figure. Dynamic Saturation oltage Measurements Figure 6. Inductive Switching Measurements FRM FR (. F unless otherwise specified) F t fr F. F I F % I F 6 8 Figure 7. t fr Measurements 8
9 TYPICAL SWITCHING CHARACTERISTICS Table. Inductive Load Switching Drive Circuit + F W W MTP8P F CE PEAK I C PEAK + MPF9 MPF9 MUR MTP8P R B A I out CE I B I B COMMON - off F W MJE MTPN R B F (BR)CEO(sus) L = mh R B = CC = olts I C(pk) = ma I B Inductive Switching L = H R B = CC = olts R B selected for desired I B RBSOA L = H R B = CC = olts R B selected for desired I B TYPICAL CHARACTERISTICS 6. DC s ms ms s EXTENDED SOA -. T C C GAIN L C = mh CE, COLLECTOR-EMITTER OLTAGE (OLTS) CE, COLLECTOR-EMITTER OLTAGE (OLTS) Figure 8. Forward Bias Safe Operating Area Figure 9. Reverse Bias Safe Operating Area 9
10 TYPICAL CHARACTERISTICS POWER DERATING FACTOR THERMAL DERATING SECOND BREAKDOWN DERATING 6 8 T C, CASE TEMPERATURE ( C) Figure. Forward Bias Power Derating 6 There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I C CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 8 is based on T C = C; T J(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to % but must be derated when T C > C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 8 may be found at any case temperature by using the appropriate curve on Figure. T J(pk) may be calculated from the data in Figure. At any case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. For inductive loads, high voltage and current must be sustained simultaneously during turn off with the base to emitter junction reverse biased. The safe level is specified as a reverse biased safe operating area (Figure 9). This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. TYPICAL THERMAL RESPONSE r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) SINGLE PULSE P (pk) t t DUTY CYCLE, D = t /t R JC (t) = r(t) R JC R JC =. C/W MAX D CURES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T J(pk) - T C = P (pk) R JC (t)... t, TIME (ms) Figure. Typical Thermal Response (Z JC (t)) for BULD
11 PACKAGE DIMENSIONS TO AB CASE A 9 ISSUE AF H Q Z L G B N D A K F T U S R J C T SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 98.. CONTROLLING DIMENSION: INCH.. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G H J K L..6.. N Q.... R S....9 T U Z STYLE : PIN. BASE. COLLECTOR. EMITTER. COLLECTOR SWITCHMODE is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Denver, Colorado 87 USA Phone: 67 7 or 8 86 Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative BULD/D
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