Semiconductor Electronics

Transcription

1 - CHPTER 14 Semicnductr Electrnics Chapter nalysis w.r.t, Last 3 Year's ard Exams The analysis given here gives yu an analytical picture f this chapter and will helpyu t identify the cncepts f the chapter that are t befcussed mre frm exam pint f view. Very Shrt nswer ( mark) f-- Shrt Type nswer (2 marks) Number f Questins asked in last 3 years Delhi ll ndia Delhi ll ndia Delhi ll ndia - Q Shrt Type nswer (3 marks) 2 Qs Q Q 2 Qs 2 Qs Lng nswer (5 marks) Value ased Questins (4 marks) --- n 2015, n Delhi set, tw questin f 3 marks each based n Fabricatin and CE-Transistrs were asked. n ll ndia set, ne questin f 2 marks based n ntrinsic and Extrinsic Semicnductrs and ne questins f 3 marks based n Lgic Gates were asked. n 2016, nly ne questin f3 marks based n p-n hmctin Dide in ll ndia set. n 2017, in Delhi set, 2 questin f 3 marks each based n p -n Junctin and ther is numerical questin based CE-Transistr were asked. n ll ndia set, tw questin f 3 marks based n Frward and Reverse iased, Slar Cell and Circuit based numerical were asked. On the basis f abve analysis, it can be said that frm exam pint f view Fabricatin, ntrinsic and Extrinsic Semicnductrs, Lgic Gates, p-n Junctin and Slar C-ellare mst imprtant cncepts f the chapter.

2 [TOPC 1] Semicnductr, Dide and ts pplicatins 1.1Classificatin f Metals, Semicnductrs and nsulatrs On the basis f the relative value f electrical cnductivity (cr)r resistivity (p = ~ J the slids are bradly classify as Metals They pssess very lw resistivity r high cnductivity. p _1O- 2 _1O- 8 Qm, cr-10 2 _10 8 Sm- 1. Semicnductrs They have resistivity r cnductivity intermediate t metals and insulatrs. p_1o- 5 _1O- 6 Qm, cr-1o- 5 t 10 0 Sm- 1 nsulatrs They have high resistivity r lw cnductivity. p _10 11 _10 19 Qm, _10-11 _10-19 Sm- 1 Types f Semicnductrs n the basis f their chemical cmpsitin are given belw (i) Elemental Semicnductrs These semicnductrs are available in natural frm, e.g. silicn and germanium. (ii) Cmpund Semicnductrs These semicnductrs are made by cmpunding the metals, e.g. CdS, Gas, CdSe, np, anthracene, plyaniline, ete. 1.2 Energy and n a crystal due t interatmic interactin, valence electrns f ne atm are shared by mre than ne atm. Nw, splitting f energy level takes place. The cllectin f these clsely spaced energy levels are called an energy band. Valence and Valence band is the highest energy band which includes the energy levels f the valence electrns. Cnductin and Cnductin band is the energy band abve the valence band. The lwest unfilled allwed energy band next t valence band is called cnductin band. Energy and Gap The minimum energy required fr shifting electrns frm ~~:' valence band t cnductin band is called energy band gap (E 9)'!lEg Frbidden Energy Gap (LVJ 9) Energy gap between cnductin band and valence V max. band, LVJ 9 = (C)min- (V)max min. Fermi Energy The highest energy level in the cnductin band filled up with electrns at abslute zer is called Fermi level and the energy crrespnding t the Fermi level is called Fermi Energy. t is the maximum pssible energy pssessed by free electrns f a material at abslute zer temperature (i.e. 0 K).

3 CHPTER 14 : Semicnductr Electrnics 425 Differences between cnductr, insulatr and semicnductr n the basis f energy bands Cnductr (Metal) nsulatr Semicnductr n cnductr, either there is n energy gap between the cnductin band which is partially filled with electrns and valence band r the cnductin band and valence band verlap each ther. Thus, many electrns frm belw the fermi level can shift t higher energy levels abve the fermi level in the cnductin band and behave as free electrns by acquiring a little mre energy frm any ther surces. Cnductin Electrn,( band b~d energyec Ev JiJiiffi{UjiiJJii d Valence band Fr metals Cnductin 1.3 Semicnductrs n insulatr, the valence band is cmpletely filled, the cnductin band is cmpletely empty and energy gap is quite large that small energy frm any ther surce cannt vercme it. Thus, electrns are bund t valence band and are nt free t mve and hence, electric cnductin is nt pssible in this type f material. Empty cnductin! band e> >-EC~! leg >3 ev e ~ Ev Valence UJ band n semicnductr als, like insulatrs the valence band is ttally filled and the cnductin band is empty but the energy gap between cnductin band and valence band, unlike insulatrs is very small. Thus, at rm temperature, sme electrns in the valence band acquire thermal energy greater than energy band gap and jump ver t the cnductin band where they are free t mve under the influence f even a small electric field and acquire small cnductivity. Semicnductrs are the materials whse cnductivity lies between metals and insulatrs. They are characterised by narrw energy gap (- 1eV) between the valence band and cnductin band. Classificatin f Semicnductr n the asis f Purity ntrinsic Semicnductrs t is a pure semicnductr withut any significant dpant species present. ne = nh = n i where, ne and nh are number densities f electrns and hles respectively and n i is called intrinsic carrier cncentratin. n intrinsic semicnductr is als called an undped semicnductr r i-type semicnductr. The ttal current is the sum f the electrn current, and hle current h. =e+ h where, L, = electrn current, h = hle current Extrinsic Semicnductrs Pure semicnductr when dped with the impurity, it is knwn as extrinsic semicnductr.

4 426 Chpterwise CSE Slved Ppers PHYSCS Extrinsic semicnductrs are basically f tw types: n-type Semicnductr n this type f extrinsic semicnductr majrity charge carriers are electrns and minrity charge carriers are hles, i.e. ne > nh' Here, we dpe Si r Ge with a pentavalent element, such as s, P r Sb f grup V, then fur f its electrns bnd with the fur silicn neighburs, while fifth remains very weakly bund t its parent atm. Frmatin f n-type semicnductr is shwn belw:.: ~. :, V.... V... V i ". ~ ': ~ e \ ~~e-unbndedfree electrn dnated...:+:.... : ~..... by pentavalent i) : \ i) (+5 valency) atm ~ i ~ i...~ :::::~e:~:::::~e:~::::~:e::::~::::: i. ~ ~'. ~. \....,.. Pe;:tavalent tetravalent danr atam (s. sb, P. etc.) daped fr Si r Ge giving n-type semicnductr Dnr energy level lies just belw the cnductin band Cnductin band - 1. Eg= 1 evl~~~~; :v :s Valence band n-type p-type Semicnductr... T Ed= 0.01 ev n this semicnductr, majrity charge carriers are hles and minrity charge carriers are electrns i.e. nh > ne' n a p-type semicnductr, dping is dne with trivalent impurity atms. i.e. Thse atms which have three valence electrns in their valence shell. Frmatin f p-type semicnductr is shwn belw: :~:::8:~:::::~e~:::::~:8~:::::::: '.. :..: ~... ~... i ~., ( ~.... r k ~:- <~!t~..... i>c,. ::::~e:~:::::~e:~:~~~:(3::::~:::: ~... ~. :..... ".... " " : Trivalent acceptr atm (n.. 8. etc) dped in tetravalent Si r Ge lattice giving p -type semicnductr cceptr energy level lies just abve the valence band Cnductin band Eg= 1 evl t 1. ~:::~~~~~7~~'~-::' T e,= 0.01 ev Valence band p-type t equilibrium cnditin, nenh = n; Minimum energy required t create a hle-electrn pair, hv e E9 where, Egis energy band gap.. h hc 1.e.E g = v rrtin =-- max Electric current, = e (neve + nhvh) where, is area f crss-sectin and ve and vh are speed f electrn and hle respectively. Mbility f charge carriers.u electric field. Hence, ve =!lee and vh =!lhe = 2:., where E is applied E Electrical cnductivity, =.!. = e (Jlene + nhllh) p where, ne and nh are cncentratin f electrn and hle respectively and u, and u, are mbilities f electrn and hle, respectively, applying the frmula V Ex! E 1= R = p! = P =!(neve + nhvh)

5 CHPTER 14 : Semicnductr Electrnics p-n Junctin p-n junctin is an arrangement made by a clse cntact f n-type semicnductr and p-type semicnductr. Frmatian f Depletin Regin in p-n.junctin During frmatin f p-n junctin, due t the cncentratin gradient acrss p and n-sides, hles diffuse frm p-side t n-side(p ~ n) and electrns diffuse frm n-side t p-side (n ~ pl. This space charge regin n either side f the junctin tpr. ier is knwn as depletin regin. ift E d Electrndiffusin lectrn r - eeellell~~:?%~.m<'1 0< c 1\6{ X 00 "ill '~~;'~7. ~~:: v/.. eeellell Hlediffusirl- -Hle eeellell ~ t"--'-::-,--=-~'-'" drift Depletin regin is the small regin in the vicinity f the junctin which is depleted f free charge carriers. Width f depletin regin is f the rder flo- 6 m. The ptential difference devel; j acrss the depletin regin is called the pterr' barrier. Semicnductr Didel p-n Junctin Dide semicnductr dide is basically a p-n junctin with metallic cntacts prvided at the ends fr the applicatin f an external vltage. p-n junctin dide is represented as ~ nde Cathde. The directin f arrw indicates the cnventinal directin f current (when the dide is under frward bias). The graphical relatins between vltage applied acrss p-n junctin and current flwing thrugh the junctin are called -V. -V (Current-Vltage) Characteristic f p-n Junctin Dide Frward iased Characteristic Junctin dide is said t be frward bias when the psitive terminal f the external battery is cnnected t the p -side and negative terminal t the n-side f the dide. Similarly, if the psitive terminal f a battery is cnnected t n-side and negative terminal t the p-side, then the p-n junctin is said t be reverse biased. The circuit diagram and -V characteristics f a frward biased dide is shwn belw: ~ (a) attery Frward bias 8 : n : ~ 3 Li: Frw~sM (i) n frward biasing width f depletin layer decreases. (ii) n frward biasing resistance ffered RFrward '" n -25n Reverse iased Characteristic n reverse biased, the applied vltage supprts the flw f minrity charge carriers acrss the junctin. S, very small current flws acrss the junctin due t minrity charge carriers. (b)

6 428 Chapterwise CSE Slved Papers PHYSCS The circuit diagram and 1- V characteristics f a reverse biased dide is shwn belw. p n attery ' ~~f--:-+_...j (a) --- Reverse bias M ~~~~~~O~ ~ 2.s reakdwn vltage (b) 4 ~l l 10~ <ll a: Transfrmer + 51 : p-n ::; c. ::; 1 8 " _._. Circuit diagram fr Dide as a half-wve rectifier The input and utput wavefrms have been given belw: (a) nputc (i) n reverse biasing width f depletin layer increases. (ii) n reverse biasing resistance ffered RReverse "" (iii) Reverse bias supprts the ptential barrier and n current flws acrss the junctin due t the diffusin f the majrity carriers. The DC resistance f a junctin dide, rdc = ~ The dynamic resistance r C-resistance f.. di d LlV junctin 10 e, rc = - M 1.5 Dide as a Rectifier The prcess f cnverting alternating vltage/current int direct vltage/current is called rectificatin. Dide is used as a rectifier fr cnverting alternating current/vltage int direct current/vltage. There are tw ways f using a dide as a rectifier i.e. Dide as a Half-Wave Rectifier Dide cnducts crrespnding t psitive half cycle and des nt cnduct during negative half cycle. Hence, C is cnverted by dide int unidirectinal pulsating DC. This actin is knwn as half-wave rectificatin...j a: (/) (/) e <t <ll F g (b) nput and utput wavefrms Dide as a Full-Wave Rectifier n the full-wave rectifier, tw p-n junctin dides, D j and D2 are used. ts wrking is based n the principle that junctin dide ffer very lw resistance in frward bias and very high resistance in reverse bias. Transfrmer 01, -.-: --r:., :-. ---j.;.t------, :P1 51: Circuit diagram f full-wve rectifier

7 CHPTER 14 : Semicnductr Electrnics 429 The input and utput wavefrms have been given belw: <:( Cil E.2 ts symbl is ~ ~hv ~ c Cil E j Due tldue t Due toidue t 0 1 : O2 : 0 1 : 02 : : p The average value r DC value btained half-wave rectifier, 10 DC =- 1t The average value r DC value btained full-wave rectifier, 21 0 DC =- 1t frm a frm a The pulse ~uency f a half-wave rectifier is equal t frequency f C. The pulse frequency f a full-wave rectifier is duble t that f C. 1.6 Optelectrnic Junctin Devices Semicnductr dides in which carriers are generated by phtns. i.e. pht-excitatin, such devices are knwn as ptelectrnic devices. These are as fllws: Light Emitting Dide (LED) t is a heavily dped frward biased p-n junctin dide which spntaneusly cnverts electrical energy int light energy, like infrared and visible light. V- characteristics frward Metaliised cntact biased LED f LED are shwn belw: J(m) 30 Silicn V t--"""'-' ,..,...- V (vlt) LEDs has the fllwing advantages ver cnventinal incandescent lw pwer lamps. (a) Fast actin and n warm up time required (b) t is nearly mnchrmatic (c) Lw peratinal vltage and less pwer cnsumed, lng life, ruggedness (d) Fast ON-OFF switching capability in nansecnds. Phtdide pht dide is a special type f junctin dide used fr detecting ptical signals. t is a reverse biased p-n junctin made frm a phtsensitive material. Such a way that light can fall n its junctin.

8 430 Chpterwise CSE Slved Papers PHYSCS V- characteristics f phtdide are shwn belw: J(m) Reverse bias v The materials Zener Dide used fr slar cell are Si and Gas. Zener dide is a reverse biased heavily dped p-n junctin dide. t is perated in breakdwn regin. ts symbl is-cf-- V- characteristics f Zener dide are shwn belw: J(m) [(ml We bserve frm the figure that current in phtdide changes with the change in light intensity (), when reverse bias is applied. n light perated switches. Slar Cell Slar cell is a p-n junctin dide which cnverts slar energy int electrical energy. t is based n the phtvltaic effect. ts symbl is ~~,.. Reverse bias Frward bias V z -v / (JJ.). Zener Dide as a Vltage Regulatr When the applied reverse vltage (V) reaches the breakdwn vltage (V,) f the Zener dide there is a large change in the current. S, after the breakdwn vltage V" a large change in the current can be prduced by almst insignificant change in the reverse bias vltage i.e. Zener vltage remains cnstant even thugh the current thrugh the Zener dide varies ver a wide range. The circuital arrangement is shwn here. This breakdwn band tunneling in a dide due t the band t is called Zener breakdwn. p Pht current thrugh an illuminated p-n junctin V- characteristics f slar cell are shwn belw: / Open circuit vltage(vc) -, _--V Unregulated vltage Lad RL Regulated vltage, Vz ec Circuit diagram af Zener dide as vltage regulatr

9 PREVOUS YERS' EXMNTON QUESTONS TOPC 1 1 Mark Questins 1. The graph shwn in the figure represents a plt f current versus vltage fr a given semicnductr. dentify the regin, if any ver which the semicnductr has a negative resistance. ll ndia Figure shws the - V characteristics f a given device. Name the device and write where it is used. Reverse bias V z /(m) /(m) 2 Marks Questins Frward bias V(vlt) Oelhl The V- characteristic f a silicn dide is as shwn in the figure. Calculate the resistance f the dide at (i) = 15 m and (ii) V = -10V (1 ml 30 Vltage01) 2. What is the difference between an n-type and a p- type extrinsic semicnductr? Oelhl2012C 3. What happens t the width f depletin layer f a p- n junctin when it is (i) frward biased? (ii) reverse biased? ll ndia Why cannt we take ne slab f frtype semicnductr and physically jin it t anther slab f n-type semicnductr t get p-n junctin? ll ndia 2010C -2V~ What is the mst cmmn use f pht dide? ll ndia State the relatin between the frequency v f radiatin emitted by LED and the band gap energy E f the semicnductr used t fabricate it. ll ndia 2009C -10V Freign Silicn r-: \ V 9. Distinguish between 'intrinsic' and 'extrinsic' semicnductrs? ll ndia Explain, with the help f a circuit diagram, the wrking f a p-n. junctin dide as a half-wave rectifier. ll ndia Draw energy band diagram f n-type and p-type semicnductr at temperature T> OK.Mark the dnar and acceptr energy level with their energies. Freign Distinguish between a metal and an insulatr n the basis f energy band diagram. Freign Explain, with the help f a circuit diagram, the wrking f a phtdide. Write briefly hw it is used t detect the ptical signals. Oelhl 2013

10 432 Chapterwise CSE Slved Papers PHYSCS 14. ssuming that the tw dides Dl and D2 used in the electric circuit shwn in the figure are ideal, find ut the value f the current flwing thrugh 1 n resistr. 01 2Q... v 6V 2Q 1 Q Delhi 2013C 15. Mentin the imprtant cnsideratins required while fabricating a p-ri junctin dide t be used as a Light Emitting Dide (LED). What shuld be the rder f, band gap f an LED, if it is required t emit light in the visible range? Delhi Write tw characteristics features t distinguish between n-type and p-type semicnductrs. ll ndi Give tw advantages f LED's ver the cnventinal incandescent lamps. Freign The current in the frward bias is knwn t be mre (- m) than the current in the reverse bias (- J.l). What is the reasn, t perate the phtdide in reverse bias? Delhi 2D Hw des a light emitting dide (LED) wrk? Give tw advantages f LED's ver the cnventinal incandescent lamps. Freign 2D (i) Why are Si and Gas preferred materials fr fabricatin in slar cells? (ii) Draw V- characteristic f slar cell and mentin its significance. ll ndi 2012C 21. Name the semicnductr device that can be used t regulate an unregulated DC pwer supply. With the help f -V characteristics f this device, explain its wrking principle. Delhi Hw is frward biasing different frm reverse biasing in a p- n junctin dide? Delhi 2D Explain, hw a depletin regin is frmed in a junctin dide? Delhi Draw the circuit diagram shwing hw a p-n junctin dide is (i) frward biased (ii) reverse biased Hw is the width f depletin layer affected in the tw cases? ll ndi 2011C 25. Carbn and silicn bth have fur valence electrns each, then hw are they distinguished? Delhi 2DllC 26. Name the device, D which is used as a vltage regulatr in the given circuit and give its symbl. + Fluet uating vl tage Delhi 2011C R 12 R~O 1 Cnst ant vlta ge Draw the circuit diagram f an illuminated phtdide in reverse bias. Hw is phtdide used t measure light intensity? Delhi 201D 28. Write the main use f the (i) phtdide (ii) Zener dide. ll ndi 2010C 3 Marks Questins 29. (i) n the fllwing diagram, which bulb ut f ~ and ~ will glw and why? 0 1 O 2 ~ tjr2 (ii) Draw a diagram f an illuminated p-ri junctin slar cell. (iii) Explain briefly the three prcesses due t which generatin f emf takes place in a slar cell. ll ndi 2017

11 CHPTER 14 : Semicnductr Electrnics (i) n the fllwing diagram, is the junctin dide frward biased r reverse biased? ~v (ii) Draw the circuit diagram f a full wave rectifier and state hw it wrks? ll ndi Write the tw prcesses that take place in the frmatin f a p-n. junctin. Explain with the help f a diagram, the frmatin f depletin regin and barrier ptential in a p-ri junctin. Delhi Zener dide is fabricated by heavily dping bth p- and n- sides f the junctin. Explain, why? riefl~plain the use f Zener dide as a DC vltage regulatr with the help f a circuit diagram. Delhi (i) Explain with the help f a diagram the frmatin f depletin regin and barrier ptential in a p - n junctin. (ii) Draw the circuit diagram f a half-wave rectifier and explain its wrking. ll ndi (i) Describe the wrking principle f a slar cell. Mentin three basic prcesses invlved in the generatin f emf. (ii) Why are Si and Gas preferred materials fr slar cells? Freign With what cnsideratins in view, a phtdide is fabricated? State its wrking with the help f a suitable diagram. Even thugh the current in the frward bias is knwn t be mre than in the reverse bias, yet the pht dide wrks in reverse bias. What is the reasn? Deihl (i) Distinguish between n-type and p- type semicnductrs n the basis f energy band diagrams. (ii) Cmpare their cnductivities at abslute zer temperature and at rm temperature. Delhi 2015C 37. Draw the energy band diagrams f (i) n -type and (ii) p-type semicnductr at temperature, T> OK. n the case n-type Si semicnductr, the dnr energy level is slightly belw the bttm f cnductin band whereas in p-type semicnductr, the acceptr energy level is slightly abve the tp f the valence band. Explain, what rle d these energy levels play in cnductin and valence bands. ll ndi 2015C 38. Write any tw distinguishing features between cnductrs, semicnductrs and insulatrs n the basis f energy band diagrams. ll ndi (i) Hw is a pht dide fabricated? (ii) riefly explain its wrking. Draw its V- characteristics fr tw different intensities f illuminatin. Freign Draw the circuit diagram f a full-wave rectifier using p-ti junctin dide. Explain its wrking and shw the utput input wavefrms. Delhi Draw V- characteristics f a p-ri junctin dide. nswer the fllwing questins, giving reasns. (i) Why is the current under reverse bias almst independent f the applied ptential upt a critical vltage? (ii) Why des the reverse current shw a sudden increase at the critical vltage? Name any semicnductr device which perates under the reverse bias in the breakdwn regin. ll ndi Draw a labelled diagram f a full-wave rectifier circuit. State. ts wrking principle. Shw the input-utput wavefrms. ll ndi Name the imprtant prcesses that ccurs during the frmatin f a p- n junctin. Explain briefly, with the help f a suitable diagram, hw a p- n junctin is frmed. Define the term 'barrier ptential'? Freign 2011

12 434 Chapterwise CSE Slved Papers PHYSCS 44. (i) Why is a pht dide perated in reverse bias mde? (ii) Fr what purpse is a pht dide used? (iii) Draw its -V characteristics fr different intensities f illuminatin. HOTS; ll ndia 2011C 45. (i) Why are Si and Gas preferred materials fr slar cells? (ii) Describe briefly with the help f a necessary circuit diagram, the wrking principle f a slar cell. ll ndia 2011C 46. (i) Describe the wrking f Light Emitting Dides (LEDs). (ii) Which semicnductrs are preferred t make LEDs and why? (iii) Give tw advantages f using LEDs ver cnventinal incandescent lw pwer lamps. ll ndia n C signal is fed int tw circuits 'X' and 'Y' and the crrespnding utput in the tw cases have the wavefrms as shwn. (i) dentify the circuits 'X and 'Y'. Draw their labelled circuit diagrams. (ii) riefly explain the wrking f circuit Y. (iii) Hw des the utput wavefrm frm circuit Y get mdified when a capacitr is cnnected acrss the utput terminals parallel t the lad resistr? 0, ~[}-~ ll ndia With the help f a suitable diagram, explain the frmatin f depletin regin in a p-ti junctin. Hw des its width change when the junctin is (i) frward biased and (ii) reverse biased? ll ndia (i) With the help f circuit diagrams, distinguish between frward biasing and reverse biasing f p-ti junctin dide. (ii) Draw V- characteristics f a p-n junctin dide in (a) frward bias. (b) reverse bias. ll ndia Explain with the help f a circuit diagram hw a Zener dide wrks as a DC vltage regulatr? Draw its V- characteristics. ll ndia Hw is a Zener dide fabricated s as t make it a special purpse semicnductr dide? Draw the circuit diagram f a Zener dide as a vltage regulatr and explain its wrking. ll ndia 2009C 5 Marks Questins 52. (i) State briefly the prcesses invlved in the frmatin f p-ri junctin, explaining clearly hw the depletin regin is frmed. (ii) Using the necessary circuit diagrams, shw hw the V- characteristics f a p-ri junctin are btained in (a) frward biasing (b) reverse biasing Hw are these characteristics made use f in rectificatin? Delhi (i) Draw the circuit arrangement fr studying the V- characteristics f a p-n junctin dide in (a) frward and (b) reverse bias. riefly explain hw the typical V- characteristics f a dide are btained and draw these characteristics. (ii) With the help f necessary circuit diagram, explain the wrking f a phtdide used fr detecting ptical signals. ll ndia 2014C 54. (i) Explain with the help f diagram, hw a depletin layer and barrier ptential are frmed in a junctin dide. (ii) Draw a circuit diagram f a full-wave rectifier. Explain its wrking and draw input and utput wavefrms. Delhi 2014C

13 CHPTER 14 : Semicnductr Electrnics (i) Hw is a depletin regin frmed in p-n junctin? (ii) With the help f a labelled circuit diagram. Explain hw a junctin dide is used as a full-wave rectifier. Draw its input, utput wavefrms. (iii) Hw d yu btain steady DC utput frm the pulsating vltage? Delhi 2D13C 56. Why is a Zener dide cnsidered as a special purpse semicnductr dide? Draw the -V characteristics f Zener dide and explain briefly, hw reverse current suddenly increase at the breakdwn vltage? Describe briefly with the help f a circuit diagram, hw a Zener dide wrks t btain a cnstant DC vltage frm the unregulated DC utput f a rectifier. Delhi 2009C; Freign (i) Describe briefly, with the help f a diagram, the rle f the tw imprtant prcesses invlved in the frmatin f a p-ri junctin. (ii) Name the device which is used as a vltage regulatr. Draw the necessary circuit diagram and explain its wrking. HOTS; ll ndi (i) Draw the circuit diagram f a p-n junctin dide in (a) frward bias. (b) reverse bias. Hw are these circuits used t study the V- characteristics f a silicn dide? Draw the typical V- characteristics. (ii) What is a Light Emitting Dide (LED)? Mentin tw imprtant advantages f LEDs ver cnventinal lamps. Delhi 2010C; ll ndi (i) Draw -V characteristics f a Zener dide. (ii) Explain with the help f a circuit diagram, the use f a Zener dide as a vltage regulatr. (iii) phtdide is perated under reverse bias althugh in the frward bias, the current is knwn t be mre than the current in the reverse bias. Explain, giving reasn. HOTS; Freign (i) Draw a circuit arrangement fr studying V- characteristics f a p-n junctin dide in (a) frward bias and (b) reverse bias. Shw typical V- characteristics f a silicn dide. (ii) State the main practical applicatin f LED. Explain, giving reasn, why the semicnductr used fr fabricatin f visible light LEDs must have a band gap f at least (nearly) 1.8 ev. Delhi 2010C 61. (i) Hw is a Zener dide fabricated s as t make it a special purpse dide? Draw -V characteristics f Zener dide and explain the significance f breakdwn vltage. (ii) Explain briefly, with the help f a circuit diagram, hw a p-n junctin dide wrks as a half-wave rectifier. Delhi 2009C 62. (i) Draw the typical shape f the V- characteristics f a p-ti junctin dide bth in (a) frward (b) reverse bias J r L 'r: cnfiguratin. Hw d we infer, frm these characteristics that a dide can be used t rectify alternating vltages? (ii) Draw the circuit diagram f a full-wave rectifier using a centre-tap transfrmer and tw p-ti junctin dides. Give a brief descriptin f the wrking f this circuit. Delhi 2009C Explanatins 1. Resistance f a material can be fund ut by the slpe f the curve V versus. Part e f the curve shws the negative resistance as with the increase in current and uecrease in vltage.

14 436 [21 Chapterwise CSE Slved Papers PHYSCS 2. n-type p-type Semicnductr Semicnductr 9. ntrinsic semicnductr Extrinsic semicnductr (i) (ii) t is frmed by dping pentavalent impurities. The electrns are majrity carriers and hles are minrity carriers. (n,»n h ) t is frmed by dping trivalent impurities. (112) The hles are majrity carriers and electrns are minrity carriers (n h > >n,) (112) 3. (i) Width f depletin layer decreases in frward bias. (ii) Width f depletin layer increases in reverse bias. 4. n this way;-c6ntinuus cntact cannt be prduced at atmic level and junctin will behave as a discntinuity fr the flwing charge carrier. 5. The phtdide can be used as a phtdetectr t detect ptical signals. n light perated switches. 6. n LED, energy f the phtn shuld be equal t r less than the band gap energy i.e. hv s; Es where, Es = band gap energy, v = frequency f emitted phtn. 7. Zener dide, which is used as a DC vltage regulatr. 8. (i) Frm the given curve, we have (ii) vltage, V = 0.8 vlt fr current, = 20 m fr vltage, V = 0.7 vlt fr current, =10m => LV = (20-10) m = 10x 10-3 => ~V= ( ) =0.1 V. ~V :. Resistance, R = - LV => R = x 10 3 => R=10n Fr V = -10V, we have 1= -1 J.L= -1 Xl0-6 => R=_1_0_=1.OX07n 1X t is a pure semicnductr material with n impurity atms in it. 2. The number f free electrns in the cnductin band and the number f hles in valence band is exactly equal. n, = n h = nj t is prepared by dping a small quantity f impurity atms t the pure semicnductr. The number f free electrns and hles is never equal. There is an excess f electrns in n-type n, > nj semicnductrs and excess f hles in p-type n h > nj semicnductrs. p-n Junctin Dide as a Half-Wave Rectifier C vltage t be rectified is cnnected t the primary cil f a step-dwn transfrmer. Secndary cil is cnnected t the dide thrugh resistrs Ru acrss which utput is btained. Transfrmer Wrking During psitive half cycle f the input C, the p-n junctin is frward biased. Thus, the resistance in p-n junctin becmes lw and current flws. Hence, we get utput in the lad. During negative half cycle f the input C, the p-n junctin is reverse biased. Thus, the resistance f p-n junctin is high and current des nt flw. Hence, n utput in the lad. S, fr cmplete cycle f C, current flws thrugh the lad resistance in the same directin. (2) (a) nputc (b) t nput and utput wavefrms x Y (2)

15 CHPTER 14 : Semicnductr Electrnics The required energy band diagram is shwn belw: Cnductin band ~."",,.':,., cceptr V~~D9.~ba.Dd (a) p-type energy level ',.:':.':'.,,',.. :' ev 13. Wrking f phtdide junctin dide made frm light sensitive semicnductr is called a phtdide. pht dide is a p-n junctin dide arranged in reverse biasing. hv Cnductin band 1 _.'\ _ ev Dnr energy level HV~~r,9~6~g81 (b) n-type 12. (i) Metal Fr metals, the valence band is cmpletely filled and the cnductin band can have tw pssibilities either it is partially filled with an extremely small energy gap between the valence and cnductin bands r it is empty, with tw bands verlapping each ther as shwn belw: Partiallyfilled { Cnductin band cnductin band Filledvalence band{.;x~f~~~~:~~~p~~~ Overlapping ~. cnductin band Cnductin band Filledvalence band~.;!yaw6.1.f ~ri ;. On applying small even electric field, metals can cnduct electricity. (ii) nsulatrs Fr insulatr, the energy gap between the cnductin and valence bands are very large, als the cnductin band is practically empty, as shwn belw: When an electric field is applied acrss such a slid, the electrns find it difficult t acquire. S, a large amunt f energy is required t reach the cnductin band. Thus, the cnductin band cntinues t be empty. That is why n current flws thrugh insulatrs. 14. R The number f charge carriers increases when light f suitable frequency is made t fall n the p-n junctin, because new electrn hles pairs are created by absrbing the phtns f suitable frequency. ntensity f light cntrls the number f charge carriers. Due t this prperty phtdides are used t detect ptical signals. ccrding t the questin 01 z n O 2 2n 0 C E R + - 6V = 2+1;= 3n =-+- R' n = 3+2=2n-1; 6 6 R'=~n S V 6 EF =-=-= S R 6/ S (2) 15. Fr LEDs, the threshld vltages are much higher and slightly different fr different clurs. The reverse breakdwn vltages f LEDs are lw generally arund 5V. t is due t this reasn, the care is taken that high reverse vltages d nt appear acrss LEDs. There is very little resistance t limit the current in LED. Therefre, a resistr must be used in series with the LED t avid any damage t it. F

16 438 Chapterwise esse Slved Papers PHYSCS u Q5 3: c When we apply sufficient vltage t LED, electrn ~ u.q Ql Ql E = :.c Ql ::::l mve acrss the junctin int p-regin and get ~ a: Ql <{ ~ 000 ~ attracted t the hles there hles are sent frm 50 p regin t n regin (where they are minrity <{.. carriers). Thus, electrns and hles recmbine. 40 During each recmbinatin, the electric ptential - C energy is cnverted int the electrmagnetic ~ 30 energy and a phtn f light with a characteristic ::::l frequency is emitted, this is hw, LED wrks. 12 <l ~ 20 Li9h~ u, 0 p 10 RL V The semicnductr used fr fabricatin f visible LEDs must at least have a band gap f 1.8eV (spectral range f visible light is frm abut O.41lm t 0.71lm i.e. frm abut 3 ev t 1.8 ev). [1) 16. (i) n n-type semicnductr, the semicnductr is dped with pentavalent impurity. n it the electrns are majrity carriers and hles are minrity carriers r n, > > nil (n,= number density f electrns, n h = number density f hles). n energy band diagram f n-type semicnductr, the dnr energy level ED is slightly belw the bttm f Ee cnductin band and thus, the electrn can mve t cnductin band, even with small supply f energy. Ec +.}.ED 0.01 ev E g j n-type [1) (ii) n p-type semicnductr, the semicnductr is dped with trivalent impurity. n this semicnductr, the hles are the majrity carriers and electrns are the minrity carriers i.e. nil» n,. --:"j---'--- Ec Eg 0.01 ev {--i E ~ Ev p-type n energy band diagram f p-lype, the acceptr energy level is slightly abve the tp f valence band Ev' Thus, even with small supply f energy electrn frm valence band can jump t level, E and inise the acceptr, negatively. [1) 18. n dvantages f LEDs ver incandescent lamps (i) Since, LEDs d nt have a filament that can burn ut, hence, they last lnger. (ii) They d nt get ht during use, hence fast actin, n warm up time required. Hand calculatrs, cash registers, digital clcks, ete. use seven-segment red r green displays. Each segment is an LED and depending n which segment is energised, the display lights up the numbers 0 t 9, as shwn in figure. LED segment ~ - n ::U. U " 1,-, CC _11_1U_ When phtdide is illuminated with light due t breaking f cvalent bnds, equal number f additinal electrns and hles cme int existence whereas fractinal change in minrity charge carrier is much higher than fractinal change in majrity charge carrier. Since, the fractinal change f minrity carrier current is measurable significantly in reverse bias than that f frward bias. Therefre, phtdide are cnnected in reverse bias. [2) 19. light emit ting dide is simply a frward biased p-n junctin which emits spntaneus light radiatin. t the junctin, energy is released in the frm f phtns due t the recmbinatin f the excess minrity charge carrier with the majrity charge carrier. dvantages: (i) Lw peratinal vltage and less pwer. (ii) Fast actin and n warm up time required. [1) [1) [1)

17 CHPTER 14 : Semicnductr Electrnics (i) The energy fr the maximum intensity f the slar radiatin is nearly 1.5 ev. n rder t have pht excitatin, the energy f radiatin (hv) must be greater than energy band gap (E g ), i.e., hv» E g Therefre, the semicnductr with energy band gap abut 1.5 ev r lwer and with higher absrptin cefficient, is likely t give better slar cnversin efficiency. The energy band gap fr Si is abut 1.1 ev, while fr Gas, it is abut 1.43 ev. The gas Gas is better inspite f its higher band gap than Si because it absrbs relatively mre energy frm the incident slar radiatins being f relatively higher absrptin cefficient. 21. (ii) t sc Open circuit vltage (Vc) (Vd -V Shrt circuit current characteristic f a slar cell (i) V- curve is drawn in the frth quadrant, because a slar cell des nt draws current but supply current t the lad. (ii) n V- curve, the pint indicates the maximum vltage Vc being supplied by the given slar cell when n current is being drawn frm it. Vc is called the pen circuit vltage. (iii) n V- curve, the pint indicates the maximum current lsc which can be btained by shrt circuiting the slar cell withut any lad resistance. lsc is called the shrt circuit current. Zener dide is used as vltage regulatr. (112) Principle Zener dide is perated in the reverse breakdwn regin. The vltage acrss it remains cnstant, equal t the breakdwn vltage fr large charge in reverse current. m Jl Frward bias (1/2) 22. Differences between frward and reverse biases are given belw: Frward bias Psitive terminal f battery is cnnected t p-type and negative terminal t n- type semicnductr. Depletin thin. layer is very p-n junctin ffers very lw resistance. n ideal dide have zer resistance. Reverse bias Psitive terminal f battery is cnnected t n-type and negative terminal t p- type semicnductr. Depletin thick. layer is p-njunctin ffers very high resistance. n ideal dide have infinite resistance. (1/2 x 4 = 2) 23. With the frmatin f p-njunctin, the hles frm p-regin diffuse int the n-regin and electrns frm n-regin diffuse int p-regin and electrn-hle pair cmbine and get annihilated. This in turn, prduces ptential barrier, V acrss the junctin which ppses the further diffusin thrugh the junctin. Thus, small regin frms in the vicinity f the junctin which is depleted f free charge carrier and has nly immtile ins is called the depletin regin. (2) 24. Circuit diagram f frward biased and reverse biased p-n junctin dide is shwn belw: The width f depletin layer (i) decreases in frward bias. (ii) increases in reverse bias. (1/2 1 =1) 25. The fur valence electrns f carbn are present in secnd rbit while that f silicn in third rbit. S, energy required t extricate an electrn frm silicn is much smaller than carbn. Therefre, the number f free electrns fr cnductin in silicn is significant n cntrary t the carbn. This makes silicns is cnductivity much higher than carbn. This is the main distinguishable prperty. (2)

18 440 Chpterwise CSE Slved Papers PHYSCS 26. Device, D is a Zener dide. Symbl f Zener dide -t>f Circuit diagram f illuminated phtdide in reverse bias is shwn belw: 1(~) (b) These electrn hle pair mve in ppsite directin due t junctin field. Their mvement in ppsite directin creates ptential difference (pht-vltage). (c) When lad is cnnected in the external circuit, current starts flwing thrugh it due t pht-vltage. 30. (i) The given diagram shwn belw. Reverse bias h > h > 12> 11 (m) Reverse bias currents thrugh a phtdide v ~v The circuit abve can be redrawn , R as fllws 28. Hence, frequency f light v such that hv» E 9' where E 9 i/i band gap f increasing intensity ] ')2,1 3, ete. The value freverse saturatin current increases with the increase f intensity f light. Thus, the measurement f charge in the reverse saturatin current can give the intensity f incident light. (i) Main use f pht dide n demdulatin f ptical signal and detectin f ptical signal. n light perated switches, electrnic cunters. (ii) Main use f Zener dide s DC vltage regulatr. 29. (i) D] dide is frward biased, hence current will flw in ] bulb and D2 is reverse biased, s there will be n current in 2. Hence, ] will glw. (ii) The diagram f illuminated p-n junctin slar cell is given belw s the p-sectin is cnnected t negative terminal f the battery, the dide shwn is reverse biased. (ii) During the first half f input cycle, the upper end f the cil is at psitive ptential and lwer end at negative ptential. The functin dide D] is frward biased and D2 in reverse biased. Current flws in utput lad in the directin shwn in figure. During the secnd half f input cycle, D2 is frward biased. n this way, current flws in the lad in the single directin as shwn in figure. (2) 0 1 p n (iii) Prcesses due t generatin f emf takes place in a slar cell are given belw (a) When light phtn reach the junctin, the excited electrns frm the valence band t cnductin band creating equal number f hles and electrns. 31. Tw prcesses that takes place during the frmatin f p-njunctin are diffusin and drift f charge carriers. n an n-type semicnductr, the cncentratin f electrns is mre than that f hles. Similarly, in a p-type semicnductr, the cncentratin f hles is mre than that f electrns. Frmatin f depletin regin during frmatin f p-n junctin and due t the cncentratin gradient acrss p and n-sides, hles diffuse frm p-side t n-side

19 CHPTER 14 : Semicnductr Electrnics (p -t n) and electrns diffuse frm n-side t p-side (n -t p). The diffused charge carriers cmbine with their cunterparts in the immediate vicinity f the junctin and neutralise each ther. Thus, near the junctin, psitive charge is built n n-side and negative charge n p-side. - Electrndiffusin Electrndrift - eee9e9 eee9e9 : : - Depletin regin Hle diffusin- -Hle drift p-n junctin frmatin prcess This sets up ptential difference acrss the junctin and an internal electric field E, directed frm n-side t p-side. The equilibrium is established when the field E, becmes strng enugh t stp further diffusin f the majrity charge carriers (hwever, it helps the minrity charge carriers t drift acrss the junctin). The regin n either side f the junctin which becmes depleted (free) frm the mbile charge carriers is called depletin regin r depletin layer. The ptential difference develped acrss the depletin regin is called the ptential barrier. n Zener dide, bth p and n-side f the functin are heavily dped. Heavy dping ensures high junctin field and lw breakdwn vltage. The circuit diagram f a vltage regulatr using a Zener dide is shwn in figure. The unregulated DC vltage is cnnected t the Zener dide thrugh a series resistance R, in reverse biased. Thus, any charge in the input vltage result is charge vltage drp acrss R, withut any change in vltage acrss the Zener dide. Therefre, Zener dide acts as a vltage regulatr. r---~~vv~~-r-----'---o+ Lad Unregulated Output -=- vltage (cnstant vltage) (V z ) Excess current bypass when V.Xl ~ V, 33. (i) Hle p-type ~ n-type Depletin layer Electrn drift~electrn pli diffusin j - - : ::f-depletin regin Hle diffusin'~ :. --Hle drift v :. ~ : : ve X1: :X2 : : : The small regin in the vicinity f the junctin which is depleted f free charge carriers and has nly immbile ins is called depletin regin. The accumulatin f negative charges in the p-regin and psitive charge in the n-regin sets up a ptential difference acrss the junctin. This acts as a barrier and is called barrier ptential V' V'~ '-----\,...-~----.l.- 0 T/2 T t 0110' Step dwn Transfrmer Wrking (a) During psitive half cycle f input alternating vltage, the dide is frward biased and a current flws thrugh the lad resistr RL and we get an utput vltage. (b) During ther negative half cycle f the input alternating vltage, the dide is reverse biased and it des nt cnduct (under break dwn regin). Hence, C vltage can be rectified in the pulsating and unidirectinal vltage.

20 442 Chapterwise CSSE Slved Papers PHYSCS 34. (i) Principle slar cell wrks n the principle f pht vltaic effect accrding t which when light phtns f energy greater than energy band gap f a semicnductr are incident n p-n junctin f that semicnductr, electrn-hle pairs are generated which give rise t an emf. Thus, wrking principle f a slar cell is same as that f a phtdide. Hwever, n bias is applied in a slar cell and the junctin area is kept much larger s that mre cc;;j slar radiatin may be incident. Depletin layer Generatin f emf: Three basic prcesses are invlved in the generatin f emf by a slar cell when slar radiatins are incident n it. These are,(a) t generatin f electrn-hle pairs clse t the junctin due t incidence f light with pht energy hv ~ E b' (1'12) (b) the separatin f electrns and hles due t the electric field f the depletin regin. S, electrns are swept t n-side and hles t p-side. (c) the electrns reaching the n-side are cllected by the frnt cntact and hles reaching p -side fe ~llected by the back cntact. Thl!sL.p"''.,,~!<!e btcmes psitive and n-side becme negative giving rise t a phtvltage. When a4 external lad R L is cnnected as shwn in figure, a phtcurrent L begins.cnflcw thrugh the lad. ' "'.' y/ (ii) Refer t ns. 45 (i). (1'/2) 35. The phtdide is a special purpse silicn dide. t is fabricated with a transparent windw t expse its junctin t light radiatins. t always wrks n the reverse bias cnditin belw the breakdwn vltage. hv>eg '--v---' p-side - + '--v---' n-side R When visible light f energy (hv > E 9) enters its depletin regin, the electrn-hle pairs are generated. These charge carriers are separated by the junctin's electric field and are made t flw acrss the junctin and causes reverse saturatin current. The value f the reverse saturatin current depends n the intensity f incident radiatin and is independent f reverse bias. The pht dide is perated in reverse bias cnditin because in the reverse bias cnditin, the change in the reverse saturatin current is directly prprtinal t the change in incident light intensity. Thus, phtdide can be used t detect the ptical signals. t cannt be dne, if the phtdide is frward biased. 36. (i) ~Q) c Q) c e t5 Q) m >- Ec ~:; ~vnn.n.n..m.~[eo -----<>--<> <>--<>--- (a) Energy band diagram f n-type semicnductr at T>O K ~Q) c Q) c e t5 Q) m (b) Energy band diagram f p-type semicnductr at T>O K (1%) n n-type extrinsic semicnductrs, the number f free electrns in cnductin band is much mre than the number f hles in valence band. The dnr energy level lies just belw the cnductin band. n p-type extrinsic semicnductr, the number f the hles in valence band is much mre than the number f free electrns in cnductin band. The acceptr energy level lies just abve the valence band.

21 CHPTER 14 : Semicnductr Electrnics 443 (ii) :>.!? Ql c Ql Eel C e Ev ~ tn E g Energy band diagram f semicnductr at T =0 K t abslute zer temperature (0 K) cnductin band f semicnductr is cmpletely empty, i.e., 0=0. Hence, the semicnductr behaves as an insulatr. t rm temperature, sme valence electrns acquire enugh thermal energy and jump t the cnductin band where they are free t cnduct electricity. Thus, the semicnductr acquires a small cnductivity at rm temperature. (1'10) 37. The required energy band diagrams are given in ns.36. (2) The dnr energy level ED is just belw the bttm f the cnductin band. t rm temperature this small energy gap is easily cnverted by the thermally excited electrns. The cnductin band has mre electrns as they have been cntributed bth by thermal excitatin and dnr impurities. Whereas the acceptr energy level E lies slightly abve the tp f the valence band. t rm temperature, many electrns f the valence band get excited t these acceptr energy levels, leaving behind equal number f hles in the valence band. These hles can cnduct current. Thus, the valence band has mre hles than the electrns in the cnductin bandrn 38. Refer t text. (Pg-425) (3) 39. (a) phtdide is fabricated by allwing light t fall n a dide thrugh a transparent windw. t is fabricated such that the generatin f e-h pairs take place near the depletin regin. (b) Refer t ns. 13. V- characteristics: currentt Reverse bias m '1-----~1 Vltage '2-----' 40. n these type f questins, we have t mind that in full-wave rectifier, full cycle f the input will be used. 41. The circuit diagram f full-wave rectifier is shwn belw: + + The input and utput wavefrms have been given belw: ~~ ~~Or t----t ~ ~Ql Due t:due t: Due t'due t: 01 : 02 : 01 : O2 :, ~ Ol Or---'--+.;...;.--.f----f-' "S ~ : Time ~, ts wrking.based n the principle that junctin dide ffer very lw resistance in frward bias and very high resistance in reverse bias. V- characteristic f p-n junctin dide (2) (2)

22 444 Chnpterwise ese Slved Papers PHYSCS (i) Under the reverse bias cnditin, the hles f p-side are attracted twards the negative terminal f the battery and the electrns f the n-side are attracted twards the psitive terminal f the battery. This increases the depletin layer and the ptential barrier. Hwever, the minrity charge carriers are drifted acrss the junctin prducing a small current. t any temperature, the number f minrity carriers \5 cnstant, s there is the small current at any applied ptential. This is the reasn fr the current under reverse bias t be almst independent f applied ptential. t the critical vltage, avalanche breakdwn takes pl~ce which results in a sudden flw f large current. (1] (ii) t the critical vltage, the hles in the n-side and cnductin electrns in the p-side are accelerated due t the reverse bias vltage. These minrity carriers acquire sufficient kinetic energy frm the electric field and cllide with a valence electrn. Thus, the bnd is finally brken and the valence electrns mve int the cnductin band resulting in enrmus flw f electrns and thus, frmatin f hle-electrn pairs. Thus, there is a sudden increase in the current at the critical vltage. Zener dide is a semicnductr device which perates under the reverse bias in the breakdwn regin.. (1] Refer t ns. 40. (3] /' ve " \ p _ 0 --<> eee (±)(±)(±), eee (±)(±)(±)_ 0 _ r 0 -eee (±)(±)(±)--<> l- --<> 0 eee (±)(±)(±) 0 _ 0 --<> eee (±)(±)(±)_0 Depletin layer - + During the frmatin f p-n junctin, diffusin f charge takes place. s, sn as p-type semicnductr is jined with n-type semicnductr, diffusin f free charges acrss the junctin starts. (2] n Fr explanatin f frmatin f p-n junctin Refer t ns. 23. Ptential barrier The accumulatin f =ve' charges in the p-regin and +ve charges in the n-regin sets up a ptential difference acrss the junctin (p-n) is called ptential barrier (V) which ppses the further diffusin f electrns and hles. (1] 44. n these type f questins, we shuld mind that the dide is cnnected reverse biased r frward biased. (i) Phtdide is cnnected in reverse bias and feeble reverse current flws due t thermally. generated electrn-hle pair, knwn as dark current. When light f suitable frequency (v) such that hv» E 9' where E 9 is band gap is. incident n dide, additinal electrn-hle pair generated and current grws in the circuit. ( 1) (ii) Refer t ns. 28 (i) (2] (iii) Refer t ns. 27. (1] 45. (i) The energy fr the maximum intensity f the slar radiatin is nearly1.5 ev. n rder t have phtexcitatin, the energy f radiatin (hv) must be greater than energy band gap (E 9)' Therefre, the semicnductr with energy band gap abut 1.5 ev r lwer than it and with higher absrptin cefficient is likely t give better slar cnversin efficiency. The energy band gap fr Si is abut 1.1 ev, while fr Gas, it is abut 1.53 ev. The Gas is better inspite f its higher band gap than Si because it absrbs relatively mre energy frm the incident slar radiatins being f relatively higher absrptin cefficient. (1] (ii) When light f frequency, v such that hv» E 9 (band gap) is incident n junctin, then electrn-hle pair liberated in the depletin regin drifts under the influence f ptential barrier. The gathering f these charge carriers make p-type as psitive electrde and n-type as negative electrde and hence, generating pht-vltage acrss slar cell. RL t ~v (2]

23 CHPTER 14 : Semicnductr Electrnics (i) Wrking f LED LED is a frward biased p-njunctin which cnverts electrical energy int ptical energy f infrared and visible light regin. eing in frward bias, thin depletin layer and lw ptential barrier facilitate diffusin f electrn and hle thrugh the junctin when high energy electrn f cnductin band cmbines with the lw energy hles in valence band, then energy is released in the frm f phtn, may be seen in the frm f light. (ii) Semicnductrs with apprpriate band gap (E 9) clse t 1.5 ev are preferred t make LED size Gas, CdTe, ete. The ther reasns t select these materials are high ptical absrptin, availability f raw material and lw cst. (iii) Uses f LEOs (a) LED can perate at very lw vltage and cnsumes less pwer in cmparisn t incandescent lamps. (b) Unlike the lamps, they take very less peratinal time and have lng life. 47. (a) X = Half-wave rectifier Y = Full-wave rectifier Transfrmer x remained charged t the peak vltage f the rectified utput. Hwever, when there is n lad and the rectified vltage starts falling, the capacitr gets discharged thrugh the lad and the vltage acrss capacitr begins t fall slwly. Filtered utput 48. Refer t ns. 23 and 24. (3) 49. (i) Refer t ns. 24 fr circuit diagram. (ii) (a) Refer t ns. 22 fr difference between frward and reverse bias. (b) Reverse bia~ (V) Primary RL Output (Half-wave rectifier) Centre-Tap Transfrmer r , Dide (0,), r-~'----~~.~----, Centre Tap, L--+,~~--~>r----~, , Dide (02) RL x y y Output Reverse bias characteristic curve V- characteristic f a p-n junctin in reverse bias is shwn abve. Fr frward bias V- characteristic curve Refer t ns. 41 (ii). Explanatin refer t ns. 21. (2) (Full-wave rectifier) (b) Refer t ns. 40. (c) capacitr flarge capacitance is cnnected in parallel t the lad resistr RL. When the pulsating vltage supplied by the rectifier is rising, the capacitr C gets charged. f there is n external lad, the capacitr wuld have Unregulated vltage (Vz) z Regulated vltage (V)!

24 446 Chapterwise CSSE Slved Papers PHYSCS 51. Zener dide fabricatin Zener dide is made by heavily dping f bth p and n-type semicnductrs and hence, the width f depletin layer becmes thin which lead t prduce large electric field t increase the current even n applying reverse vltage f 4 r 5 V. (2) Fr circuit diagram Refer t ns (i) p-n Junctin p-n junctin is an arrangement made by a clse cntact f n-type semicnductr and p-type semicnductr. There are varius methds f frming p-n junctin dide. n ne methd, an n-type germanium crystal is cut int thin slices called wafers. n aluminium film is laid n an n-type wafer which is then heated in an ven at a temperature f abut 600 C. luminium then diffuses int the surface f wafer. n this way, a p-type semicnductr is frmed n n-type semicnductr. Frmatin f Depletin Regin in p-n Junctin n an n-type semicnductr, the cncentratin f electrns is mre than cncentratin f hles. Similarly, in a p-type semicnductr, the cncentratin f hles is mre than that f cncentratin f electrns. During frmatin f p-n junctin and due t the cncentratin gradient acrss p and n-sides, hles diffuse frm p-side t n-side (p ~ n) and electrns diffuse frm n-side t p-side (n ~ pl. - Electrndrift - Electrndiffusin p' D iiiidn' eeee. eeee : : - Depletin regin Hle diffusin- -Hlednft The diffused charge carriers cmbine with their cunterparts in the immediate vicinity f the junctin and neutralise each ther. Thus, near the junctin, psitive charge is built n n-side and negative charge n p-side. This sets up ptential difference acrss the junctin and an internal electric field E; directed frm n-side t p-side. The equilibrium is established when the field E; becmes strng enugh t stp further diffusin f the majrity charge carriers (hwever, it helps the minrity charge carriers t diffuse acrss the junctin). The regin n either side f the junctin which (ii) becmes depleted (free) frm the mbile charge carriers is called depletin regin r depletin layer. The width f depletin regin is f the rder flo-6 m The ptential difference develped acrss the depletin regin is called the ptential barrier. Ptential barrier depends n dpant cncentratin in the semicnductr and temperature f the junctin. (a) Frward iased Characteristics The circuit diagram fr studying frward biased characteristics is shwn in the figure. Starting frm a lw value, frward bias vltage is increased step by step (measured by vltmeter) and frward current is nted (by ammeter). graph is pltted between vltage and current. The curve s btained is the frward characteristic f the dide. P n 8 ~7 t: 4 'E ~ 3 ~2 attery (a) Ge FO~M t the start when applied vltage is lw, the current thrugh the dide is almst zer. t is because f the ptential barrier, which ppses the applied vltage. Till the applied vltage exceeds the ptential barrier, the current increases very slwly with increase in applied vltage (O prtin f the graph).with further (b)

25 CHPTER 14 : Semicnductr Electrnics 447 increase in applied vltage, the current increases very rapidly ( prtin f the graph), in this situatin, the dide behaves like a cnductr. The frward vltage beynd which the current thrugh the junctin starts increasing rapidly with vltage is called knee vltage. f line is extended back, it cuts the vltage axis at ptential barrier vltage. (b) Reverse iased Characteristics The circuit diagram fr studying reverse biased characteristics is shwn in the figure. P attery L j.:...+ -l (a) Reverse bias (\) a c 2 -c 4.. reakdwn vltage (b) n C 6 ~ 8 8 ~ Q) 105i a: n reverse biased, the applied vltage supprts the flw f minrity charge carriers acrss the junctin. S, a very small current flws acrss the junctin due t minrity charge carriers. Mtin f minrity charge carriers is als supprted by internal ptential barrier, s all the minrity carriers crss ver the junctin. Therefre, the small reverse current remains almst cnstant ver a sufficiently lng range f reverse bias, increasing very little with increasing vltage (OC prtin f the graph). This reverse current is vltage independent up t certain vltage knwn as breakdwn vltage and this vltage independent current is called reverse saturatin current. Use f p-n Junctin Characteristics in Rectificatin Frm frward and reverse characteristics, it is clear that current flws thrugh the junctin dide nly in frward bias nt in reverse bias i.e. current flws nly in ne directin. 53. (i) Refer t ns. 52 (ii). (3) (ii) Refer t ns. 27. (2) 54. (i) Refer t ns. 43. (3) (ii) Refer t ns. 40. (2) 55. (i) Refer t ns. 52 (i). (ii) Refer t ns. 42. (iii) full-wave bridge rectifier using fur dides (full-wave bridge rectifier) gives a cntinuus, unidirectinal but pulsating utput vltage r current. The rectified utput is passed thrugh a filter circuit which remves the ripple and an almst steady DC vltage (r current) is btained. (2) 56. Zener dide wrks nly in reverse breakdwn regin that is why it is cnsidered as a special purpse semicnductr. - V characteristics f Zener dide is given belw: (m) Frward bias -VM (l) Reverse current is due t the flw f electrns frm n -+ p and hles frm p s, the reverse biased vltage increase the electric field acrss the junctin, increases significantly and when reverse bias vltage V = V z ' then the electric field strength is high enugh t pull the electrns frm p-side and accelerated it t n-side.

26 448 Chapterwise CSE Slved Papers PHYSCS These electrns are respnsible fr the high current at the breakdwn. Unregulated vltage -_. h_-. ---e Regulated vltage, Vz Vltage regulatr cnverts an unregulated DC utput f rectifier int a cnstant regulated DC vltage, using Zener dide. The unregulated vltage is cnnected t the Zener dide thrugh a series resistance Rs such that the Zener dide is reverse biased. f the input vltage increases, then current thrugh Rs and Zener dide increases. Thus, the vltage drp acrss Rs increases withut any change in the vltage drp acrss Zener dide. This is because f the breakdwn regin, Zener vltage remain cnstant even thugh the current thrugh Zener dide changes. Similarly, if the input vltage decreases, the current thrugh Rs and Zener dide decreases. The vltage drp acrss R s ' decreases withut any change in the vltage acrss the Zener dide. Nw, any change in input vltage results the change in vltage drp acrss Rs, withut any change in vltage acrss the Zener dide.thus, Zener dide acts as a vltage regulatr. 57. When we are dealing with depletin layer frmatin we have t keep in mind the majrity charge carriers, diffusin will always happens frm high cncentratin t lw cncentratin. (i) Hle Junctin cceptr in Fictitius battery Va e e e e:e:0: e e e e:e:0: e e e e:e:0: e e e e:e:0: p-type n-type The tw prcess invlved in the frmatin f p-n junctin. (a) Diffusin (b) Drift. (112 x 2 = 1) Hles and electrns diffuse frm p t n and n t p respectively. The majrity charge carrier drifts under the influence f applied electric field such that (a) hles alng applied Eand (b) electrn ppsite t E (1/2 x 2 = 1) (ii) Zener dide is used as vltage regulatr fr explanatin Refer ns. 21 and ns. 50 fr circuit. (3) 58. (i) Refer t ns. 52. (2) (ii) Refer t ns. 46 (i) and (ill). (3) 59. (i) Refer characteristics curve f ns. 21. (ii) Frm the figure, it is clear that the device, X is a full-wave rectifier. Circuit diagram as shwn in figure belw: R1 + Unregulated vltage 1 z f RL Regulated vltage (V) 1 Zener dide cnnected with unregulated DC vltage in reverse bias. When the input vltage increases, then current thrugh R\ increase and hence, vltage drp acrss R\, increases while vltage acrss the Zener dide remains cnstant. The vltage acrss Zener dide remains cnstant beynd Zener vltage and hence, same/cnstant regulated vltage is btained acrss R L. (ill) n n-type semicnductr, n, > n h... (i) On incidence f light f suitable frequency, there is equal rise in number f electrns and hles [i.e. ill! (say) 1 ~ 1 1 tin ill! -<-r-<-», n h n, n h where, ill! = change in electrn r hle charge carrier. Thus, fractinal change in minrity charge carrier (hle) is much higher than fractin change in majrity charge carrier (electrn). ls, minrity charge carrier cntribute in drift current in reverse bias. Thus, with incidence f light, fractinal change in minrity charge carrier is significant. Therefre, phtdide shuld be cnnected in reverse bias fr measuring light intensity.

27 CHPTER 14 : Semicnductr Electrnics (i) Refer t m. 52. (ii) Refer t m (i) Refer t m. 56. (ii) Circuit diagram f p-n junctin dide as half-wave rectifier is shwn belw: p-n + R + T:50- :5 1 (3) (2) (3) This actin is knwn as half-wave rectificatin. ~~l r r E -g Time ~~O~ T-- c3 -g Time 62 (i) Refer t m. 52. (3) Frm these tw graphs we see that the Dide cnducts crrespnding t psitive half junctin dides perates mainly in frward cycle and des nt cnduct during negative half bias, this characteristic f junctin dide can cycle, hence C is cnverted by dide int be used t make it a rectifier. unidirectinal pulsating DC. (ii) Refer t ns. 40. (2) [TOPC 2] Transistrs and ts pplicatins and Lgic Gates 2.1 Junctin Transistr junctin transistr is three terminal semicnductr device cnsisting f tw p-n junctins frmed by placing a thin layer f dped semicnductr (p-type r n-type) between tw thick similar layers f ppsite type. There are tw types f transistr: p-n-p transistr Here, tw thicker segments f p-type (termed as emitter and cllectr) are separated by a segment f n-type semicnductr (base). E Emitter ase Cllectr C n-p-n transistr Here, tw thicker segments f n-type semicnductr (emitter and cllectr) are separated by a segment f p-type semicnductr (base). E Emitter ase Cllectr n P n n-p-n transistr Transistrs Schematic Representatin n- p- n transistr p -n- p transistr E C E P P C C

28 450 ehpterwise ese Slved Papers PHYSCS Transistr ctin r Wrking f Transistr p-n-p Transistr Frm given figure, we can see that, the emitter-base junctin is frward biased. Cllectr-base junctin is reverse biased. n-ase p-emitter p-clleetr ' p:::: ~ :::: p e E :::: J.. 0--: :::: 0-- c VES VEE e e Vcc Flw f charge carriers in p lc n p trnststr n-p-n Transistr n the base, e and c flw in ppsite directins. n this transistr, the emitter-base junctin is frward biased and its resistance is very lw. S, the vltage f V EE is quite small. p-ase E n-emitter n-cllectr '--0. ' n -:::: n C - -VC- a - + -~+---' VE E h e vcc Flw f charge carriers in n-p-n transistr n-p-n E C ie L- f--~+ - Vca ctin f p-n-p transistr and its biasing The resistance f emitter-base junctin is very lw. S, the vltage f V EE (VE) is quite small (i.e., 1.5 'V). The current in p-n-p transistr is carried by hles and at the same time their cncentratin is mmtrned.,. ut in external circuit, the currentis due t the flw f electrns. n this case,, = b + l, [using Kirchhff's law] where, e = emitter current and b = base current, = cllectr current VEa t-----<~- + Vcs ctin f n-p-n transistr and its biasing The cllectr base junctin is reverse biased. The resistance f this junctin is very high. S, the vltage f Vcc (VC) is quite large (45 V). n n-p-n transistr, the current is carried inside as well as in external circuit by the electrns. Thus, in this [ b «e] case als, E = + c [Kirchhff's first law] n the base, E and e flw in ppsite directin. Transistrs Cnfiguratin (i) Cmmn ase (C) mde (ii) Cmmn Emitter (CE) mde (iii) Cmmn Cllectr (CC) mde 2.2 Characteristics f a Transistr The graphical representatin f the variatins amng the varius current and vltage variables f a transistr are called transistr characteristics.

29 CHPTER 14 : Semicnductr Electrnics 45t Cmmn ase Transistr Characteristics Here emitter-base circuit is frward biased with battery VEEand cllectr-base circuit is reverse biased with battery Vcc. e p-n-p C ' Cmmn Emitter Transistr Characteristics Here, base-emitter circuit is frward biased with battery V E and emitter- cllectr circuit is '"' reverse biased with battery Vcc. The cmmn base characteristics f a transistr are f tw types: (i) Emitter r nput Characteristics graphical relatin between the emitter vltage and emitter current at cnstant cllectr vltage, is called emitter r input characteristics. The graph is pltted between emitter current and crrespnding emitter vltage. e (m) V E = - 4 V, V C = -2 V t--i-- - ~---~-- """"-Q.)t a' f - - :- -:- - -:- -- ~ 6 : : P: : : :J --i--i- ai--i-- "JC\", Ci " t- -- t: : v,c:: 'E '- -- W '----L--,.L..:...-':-'-:-'---::-'-:,...,...".-..., '0.5' 0.7', VEM (ii) Cllectr r Output Characteristics graphical relatin between the cllectr vltage and cllectr current at cnstant emitter current, is called cllectr r utput characteristics. The graph is pltted between cllectr current and crrespnding cllectr vltage. e (m) (/8) ase current, ~20,e =20m C,,,,, ~15 'e =15m :J, ', e,,,,, ', e,,, ' ' = = 10 m ~ 5 =5m 8 Om 5V10V15V20V25V VcM Cllectr vltage Emitter-base vltage (VE)- (VC)- These tw characteristics as shwn belw: can be studied (i) Emitter r nput Characteristics graphical relatin between the emitter vltage and the emitter current by keeping cllectr vltage cnstant is called input characteristics f the transistr. b(ll) VCE=10V VSEM ~ nput resistance t is defined as the rati f change in base-emitter vltage 1 (VE)t the resulting change in the base, 21 current ( b ) at cnstant cllectr-emitter vltage (VCE)'t is reciprcal f slpe f b - V E cu:e. ~n(p:~:e)sistance, b V CE = cnstant (ii) Cllectr r Output Characteristics graphical relatin between the cllectr vltage and cllectr current by keeping base current cnstant is called utput.characteristics f the transistr.

30 452 Chpterwise CSE Slved Papers PHYSCS ~ 10.s ~ 8 C ~ 6 :;.9 4 ~ "0 lb 60 J. r: 50 J. " 40 J. 30 J. 20 J. 10 J Cllectr t emitter vltage (VcE!in vlts NOTE Frm the utput characteristics, we define utput resistance f transistr as the rati f change in cllectr-emitter vltage t the resulting change in cllectr current at cnstant base current. Thus, utput resistance, Regin ra =(~VCE) ~/c b = cnstant = Reciprcal f slpe f e - VCEcurve. The current amplificatin factr (~) f a transistr in CE cnfiguratin is defined as the rati f change in cllectr current t the change in base current at a cnstant cllectr-emitter vltage when the transistr is in active state... ~C=(~;:tE=cnstant ts value is very large (~C> > 1) Regin f Operatin f Junctins Cllectr junctin Emitter junctin Cut-ff Reverse biased Reverse biased ctive Reverse biased Frward biased Saturatin Frward biased Frward biased 2.3 Transistr as an mplifier (CE cnfiguratin) n amplifier is a device which is used fr increasing the amplitude f input signal. The circuit diagram fr p-n-p transistr as an amplifier is shwn in the figure given belw: /~P 1 C\ CE -.!c V cp e nput 1 :vcc Output C + C L signal b e signal V SE Circuit diagram f transistr RL as n amplifier When n C vltage is applied t the input circuit, we have e=b+,... (i) Due t cllectr current " the vltage drp acrss lad resistance (R L ) is,r L. Therefre, the cllectr-emitter vltage V CE is given by VCE = Vcc - erl... (ii) Gains in Cmmn-Emitter mplifier a and ~ parameters f a transistr are defined as a =!. and ~ =!..a is abut 0.95 t 0.99 and ~ is e b abut 20 t 100. The varius gains in a cmmn-emitter amplifier are as fllws: (i) DC Current Gain t is defined as the rati f the cllectr-current t the base current and is dented by ~DC- Thus, ~DC =!. = _1_, _ =,/e i, e-, -,/e ~=~ -a [':e=b+,l [.:a =,el (ii) C Current Gain t is defined as the rati f the change in the cllectr-current t the change in the base-current at a cnstant cllectr t emitter vltage and is dented by ~C' () Thus, ~C = ~' b VCE The value f~ is frm 15 t 100, fr a transistr. (iii) C Vltage Gain t is defined as the rati f the change in the utput vltage t the change in the input vltage and is dented by v.

31 CHPTER 14 : Semicnductr Electrnics 453 Suppse, n applying an C input vltage signal, the input base-current changes by M b and crrespndingly the utput cllectr-current changes by Me' f Rin and Rut be the resistances f the input and the utput circuits respectively, then _Me X Rut Me Rut v- x-- si, xrin si, Rin Nw, Me/ si, is the C current gain ~C' (iv) C Pwer Gain t is defined as the rati f the change in the utput pwer t the change in the input pwer. Since, pwer = current x vltage, we have. Change in utput pwer C pwer gam = --"'-----"----'-- Change in input pwer = C current gain x C vltage gain = ~C xv. Relatinship between a and ~ sinusidally varying alternating vltage as shwn in figure is the simplest analg signal. The electrnic circuits which prcess analg signals are called analg circuits. Vb /\ /" \J\J Digital Circuits Circuits use tw discrete level f current r vltage which are termed as binary signals. These tw values are represented as 0 and 1 (lw r high i.e. ON r OFF) The electric circuits which prcess digital signals are called digital circuits. V Level1 ~=~ -a and a=-~- +~ Vltage gain = Current gain x Resistance gain Feedback When a prtin f the utput pwer is returned back t the input in phase, this is termed as psitive feedback. nput.r-=-iftrairisiertor'l , Transistr amplifier 1f r~Output '----= FeedbackU 1 netwrk ~ 2.4 nalg and Digital Circuits nalg Circuits Circuits use signals (current r vltage) in the frm f cntinuus, time-varying vltage r current. 2.5 Lgic Gate gate is a digital circuit that fllws certain relatinship between input and utput vltage. Lgic gates are building blcks f electrnic circuits. n lgic gates, there exist a lgical relatinship between utput and input(s). t has ne utput but ne r mre inputs. Truth Table t is a table that shws all pssible input cmbinatins and the crrespnding utput cmbinatins fr a lgic gate..~ lean Operatrs Just as in rdinary algebra, mathematical peratrs like additin, subtractin and multiplicatin are used, similarly, in lean algebra three basic peratrs like OR, ND and NOT are used. lean Expressin The expressin shws the cmbinatin f tw lean variables that results int a new lean variable is knwn as lean expressin.

32 454 Chpterwise CSE Slved Papers : PHYSCS asic Lgic Gates There are three basic lgic gates: OR Gate lean expressin f OR gate is given as Y=+. (a) t has tw r mre inputs and ne utput. (b) n this gate, if anyne f the input r all the inputs are 1, then utput is 1. Symbl Truth Table..~~ \,,, \, \, 0 1,, y r:, C r R / /, -=... / -;'..J:...5V ~ --_L?2..-, ~' '-- --,- ~ y / Realisatln f ORgate ND Gate lean expressin f ND gate is given as Y= (a) t has tw r mre inputs and ne utput. (b) t has utput 1, nly when all inputs are 1. ~y Symbl ~ Truth Table y 0 ~ ~ ,, \ ~r 5V.:r ~ Realisatian f ND gate \ 0, \ y L ~~ ~~~~~_// -L NOT Gate lean expressin f NOT gate is given as Y = it. (a) t has ne input and ne utput. (b) t gives an inverted versin f its input i.e. if input is 1, then utput is 0 and vice-versa. Symbl ~. Truth Table Reallsatlan f NOTgate Cmbinatin f Gates Varius cmbinatins f three basic gates can be used t prduce cmplicated digital circuits, which are als called gates. Different cmbinatins f basic gates are given belw: NOR Gate lean expressin Y=+. f NOR gate is given as y r ~

33 CHPTER 14 : Semicnductr Electrnics 455 Here NOT peratin is applied after OR gate. f all its inputs are 0, then its utput will be l. Symbl Truth Table ~- ~Y= nput Output Y= NND Gate (NOT ND) lean expressin Y = f NND gate is given as Here, ND gate fllwed by a NOT gate. f all the inputs are 1, then utput will be O. Symbl ~~Y Truth Table ~=--- Y= NND and NOR gates are called universal gates. XDR Gate lean expressin Y=-+ =E9 Symbl Truth Table f XOR gate is given as Y=Ea XNDR Gate lean expressin f XNOR gate is given as Y = = +. Here, XOR gate is fllwed by a NOT gate. Symbl Truth Table Y= 0 0 Sme Useful Laws f lean lgebra (i) de-mrgan's Therem t states that the cmplement f the whle sum is equal t the prduct f individual cmplements and vice-versa. (a) += (b) =+ de-mrgan's therem als states that (a) + = = (b) = = + (ii) Cmmutative laws (a) +=+ (b) = (iii) ssciative laws (iv) (v) (a) +(+C) = (+)+C (b) ( C) = ( ) C Distributive laws (a) (+C) = + C (b) (+) (+C) = + C bsrptin laws (a) + = (b) (+) = (c).(+) =

34 PREVOUS YERS' EXMNTON QUESTONS TOPC 2 1 Mark Questins 1. n a transistr, dping level in base is increased slightly. Hw will it affect (i) cllectr current and (ii) base current? Delhi Draw the lgic circuit f a NND gate and write its truth table. Freign Draw the lgic circuit f ND gate and write its truth table. Freign Draw the lgic circuit f NOT gate and write its truth table. Freign Write the truth table fr the fllwing circuit. Name the equivalent gate that this circuit represents. ;~y Freign given lgic gate inverts the input applied t it. Name this gate and give its symbl. Delhi 2010C 7. The truth table f a lgic gate has the frm given here. Name this gate and draw its symbl. y ll ndi 2010C 8. The truth table f a lgic gate has the frm given here. Name this gate and draw its symbl Y ll ndia 2010C 9. Give the lgic symbl f NOR gate. ll ndia Give the lgic symbl f NND gate. ll ndia Give the lgic symbl f ND gate. ll ndia Define current amplificatin factr in cmmn-emitter mde f transistr. ll ndia 2010C, Delhi 2009C 2 Marks Questins 13. Draw a circuit diagram f n-p-ri transistr amplifier in CE cnfiguratin. Under what cnditin des the transistr act as an amplifier? ll ndia Write the truth table fr the cmbinatin f the gates shwn. Name the gates used. ll ndia dentify the lgic ~ gates marked P and Q X Q in the given circuit. Write the truth table fr the cmbinatin. Delhi The utputs f tw NOT gates are fed t a NOR gate. Draw the lgic circuit f the cmbinatin f gates. Give its truth table. dentify the gate represented by this cmbinatin. Delhi 2014C 17. The input wavefrms and and the utput wavefrm Yf a gate are shwn belw.

35 CHPTER 14 : Semicnductr Electrnics 457 ' Name the gate it represents, write its truth table and draw the lgic symbl f this gate. ri.l. Yu t = ljr----;-----; ll ndi 2014C 18. dentify the equivalent gate represented by the circuit shwn in the figure. Draw its lgic symbl and write the truth table. Freign n the given circuit diagram, a vltmeter V is cnnected acrss a lamp L. Hw wuld (i) the brightness f the lamp and (ii) vltmeter reading V be affected, if the value f resistance R is decreased? Justify yur answer. R L + ~ i 9V -' Draw a typical utput characteristics f an n-p-ri transistr in CE cnfiguratin. Shw hw these characteristics can be used t determine utput resistance? ll ndi n the circuit shwn in the figure, identify the equivalent gate f the circuit and make its truth table. Y ll ndi n the circuit shwn in the figure, identify the equivalent gate f the circuit and make its truth table. Y ll ndi n the circuit shwn in the figure, identify the equivalent gate f the circuit and make its truth table. ll ndi Describe briefly with the help f a circuit diagram, hw the flw f current carriers in a p-n- p transistr is regulated with emitter-base junctin in frward biased and base-cllectr junctin in reverse biased. ll ndi Distinguish between analg signal and digital signal. ll ndi Draw the utput wavefrm at X using the given inputs, and fr the lgic circuit shwn belw. ls, identify the lgic peratin perfrmed by this circuit. x

36 458 ehapterwise esse Slved Papers PHYSCS t1 1 1 U n i 1 < t2! t3 t4 ts t6. t7!! Delhi 2012; n the given circuit, a vltmeter V is cnnected acrss lamp L. What changes wuld yu bserve in the lamp L and the vltmeter V if the value f resistr R is reduced? Delhi +2DllC 28. Draw the transfer characteristic curve f a base-biased transistr in CE cnfiguratin. Explain clearly hw the active regin f the V versus Vi curve, in a transistr is used as an amplifier? Delhi Draw the utput wavefrm at X using the given inputs, and fr the lgic circuit shwn belw. ls, identify the lgic peratin perfrmed by this circuit. Delhi 2011; 2DD. U i !!! t1 tz t3 t4 ts t6 t7 x 30. Write the truth table fr the lgic circuit shwn belw and identify the lgic peratin perfrmed by this circuit. 34. Delhi dentify the lgic gates X and Y in the figure. Write dwn the truth table f utput Z fr all pssible inputs and. ll ndia 2011C 32. (i) Fr the digital circuit given belw, write the truth table shwing utputs Y 1 and Y 2 fr all pssible inputs f and. (ii) Shw utput wavefrm fr all pssible inputs f and. ll ndia 2011C 33. (i) dentify the lgic gates marked P and Q in the given lgic circuit. (ii) Write dwn the utput at X fr the inputs, = 0, = 0 and =, = 1. ll ndia 2010 ~~x (i) dentify the lgic gates marked P and Q in the given lgic circuit. Y1 ~ Q X z y

37 CHPTER 14 : Semicnductr Electrnics 459 (ii) Write dwn the utput at X fr the inputs = 0, = 0 and = 1, = 1. ll ndi Define the fllwing terms. (i) nput resistance ri' (ii) Current amplificatin factr 13 f a transistr used in its CE cnfiguratin. ll ndi 2010C 36. The fllwing figure shws the input wavefrms, and the utput wavefrm Y f a gate. dentify the gate, write it,.ruth table and draw its lgic symbl. Deihl 2009 h...,--- 8 yu U The utput f a 2-input ND gate is fed t a NOT gate. Give the name f the cmbinatin and its lgic symbl. Write dwn its truth table. Deihl 2009, Freign (i) Sketch the utput wavefrm frm an ND gate fr the inputs, and shwn in the figure. LJ LJ, n 8 '!!! (ii) f the utput f the abve ND gate is fed t a NOT gate, name the gate f the cmbinatin, s frmed. Delhi Draw the lgic symbl f the gate whse truth table is given as belw: nputs Output y f this, lgic gate is cnnected what will be the utput t NOT gate, when (i) = 0, = 0 and (ii) = 1, = 1? Draw the lgic symbl f the cmbinatin. Freign lgic gate is btained by applying utput f OR gate t a NOT gate. Name the gate s frmed. Write the symbl and truth table f this gate. Freign lgic gate is btained by applying utput f ND gate t a NOT gate. Name the gate s frmed. Write the symbl and truth table f this gate. Freign The tw circuits shwn here are a cmbinatin... r (i) Three NND gates. (ii) Three NOR gates. Write truth tables fr each f these cmbinatins. Delhi 2009C 3 Marks Questins 43. Fr a CE transistr amplifier, the audi signal vltage acrss the cllectr resistance f 2 kn is 2V. Given, the current amplificatin factr f the transistr is 100, find the input signal vltage and base current, if the base resistance is 1 kn. Deihl 2017 y

38 460 Chapterwise CSE Slved Papers PHYSCS 44. (i) Write the functins f the three segments f a transistr. (ii) The figure shws the input wavefrms and fr 'ND' gate. Draw the utput wavefrm and write the truth table fr this lgic gate. t, t2 t3 t4 t5 t6 t7 t8, 49. Output characteristics f an n-p-ri transistr in CE cnfiguratin is shwn in the figure. Determine 50m (nput) ~n ll ndia (i) Write the functins f three segments f a transistr. (ii) Draw the circuit diagram fr studying the input and utput characteristics f n-p-n transistr in cmmn emitter cnfiguratin. Using the circuit, explain hw input, utput characteristics are btained. Delhi dentify the gates P and Q shwn in the figure. Write the truth table fr the cmbinatin f gates shwn in figure belw: ----1;\.-~ ~ Name the equivalent gate representing this circuit and write its lgic symbl. Deihl Draw a circuit diagram f a CE transistr amplifier. riefly explain its wrking and write the expressin fr (i) current gain, (ii) vltage gain f the amplifier. Deihl Draw a circuit diagram f a transistr amplifier in CE cnfiguratin. Define the terms (i) input resistance and (ii) current amplificatin factr. Hw are these determined using typical input and utput characteristics? ll ndia 2015 Y a VCE(V) - (i) dynamic utput resistance (ii) DC current gain and (iii) C current gain at an perating pint V CE = 10 V, when = 30 ~. Delhi 2D Draw the transfer characteristic f a base-biased transistr in CE cnfiguratin. Mark the regins where the transistr can be used as switch. Explain briefly its wrking. 51. Yu are given a circuit belw. Write its truth table. Hence, identify the lgic peratin carried ut by this circuit. Draw the lgic symbl f the gate which crrespnds t ll ndia Yu are given a circuit belw. Write its truth table. Hence, identify the lgic peratin carried ut by this circuit. Draw the lgic symbl f the gate which crrespnds t ll ndia 2011 X z z

39 CHPTER 14 : Semicnductr Electrnics 53. Draw transfer characteristics f a cmmn-emitter n- p-n transistr. Pint ut the regin in which the transistr perates as an amplifier. Define the fllwing terms used in transistr amplifiers: (i) nput resistance (ii) Output resistance (iii) Current amplificatin factr. Freign Draw the general shape f the transfer characteristics f a transistr in its CE cnfiguratin. Which regins f this characteristic f a transistr are used when it wrks as an amplifier? ll ndi 2010C 55. Give the circuit diagram f a cmmn-emitter amplifier using an n-p-ri transistr. Draw the input and utput wavefrms f the signal. Write the expressin fr its vltage gain. HOTS. ll ndi The inputs and shwn here are used as the inputs fr three different gates G 1, G 2 and G 3 The utputs btained in the three cases have the frms shwn. dentify the three gates and write their truth tables. ll ndia 2009C Lil!1JJ1j ', 1TlrTllJ,,, G 2, LLLf1JJlj ' G3 _ The inputs and shwn here are used as the inputs fr three different gates G 1, G 2 and G 3 ne by ne. The utputs btained in the three cases have the frms shwn. dentify the three gates and write their symbls. ll ndia 2009C tt1jjlljj ~--+-- : '--- : : : LlJT1tj! --i---{--- l. 1 G 1 '! : : : :,,,,,, '+--'-+--, G2: GJ---~--~--LJ--U---~---; Draw the labelled circuit diagram f a cmmn-emitter transistr amplifier. Explain clearly, hw the input and utput signals are in ppsite phase? ll ndia The inputs and are inverted by using tw NOT gates and their utputs are fed t the NOR gate as shwn belw: nalyse the actin f the gates and (2) and identify the lgic gate f the cmplete circuit s btained. Give its symbl and the truth table. ll ndia Marks Questins 60. (i) Differentiate between three segments f a transistr n the basis f their size and level f dping. (ii) Hw is a transistr biased t be in active state? (iii) With the help f necessary circuit diagram, describe briefly, hw n-p-ri transistr in CE cnfiguratin amplifies a small sinusidal input vltage. Write the expressin fr the C current gain. Delhi (i) Explain briefly with the help f a circuit diagram, hw an n- p-n transistr in CE cnfiguratin is used t study input and utput characteristics. y

40 462 ehpterwise esse Slved Papers PHYSCS (ii) Describe briefly the underlying principle f a transistr amplifier wrking as an scillatr. Hence, use the necessary circuit diagram t explain hw self sustained scillatins are achieved in the scillatr. Delhi 2D14C 62. (i) Draw the circuit diagram f an n-p-ri transistr with emitter-base junctin frward biased and cllectr-base junctin reverse biased. Describe briefly, hw the mtin f charge carriers in the transistr cnstitutes the emitter current E' the base current and the cllectr current e. Hence, deduce the relatin, E = + e (ii) Explain with the help f a circuit diagram, hw a transistr wrks as an amplifier? ll ndi 2D14C 63. (i) Why is the base regin f a transistr thin and lightly dped? (ii) Draw the circuit diagram fr studying the characteristics f an n-p-n. transistr in cmmn-emitter cnfiguratin. Sketch the typical (a) input and (b) utput characteristics in this cnfiguratin. (iii) Describe briefly, hw the utput characteristics can be used t btain the current gain in the transistr? Deihl 2D13C 64. The set-up shwn belw can prduce an C utput withut any external input signal. dentify the cmpnents 'X' and 'Y' f this set up. Draw the circuit diagram fr this set-up. Describe briefly its wrking. il ndi 2D12C nput Output ~ ~ 65. Draw a simple circuit f a CE transistr amplifier. Explain its wrking. Shw that the vltage gain v f the amplifier is given by v = 13cR L / rj' where 13C is the current gain, RL is the lad resistance and rj is the input resistance f the transistr. What is the significance f the negative sign in the expressin fr the vltage gain. Deihl (i) Draw the circuit fr studying the input and utput characteristics f a transistr in CE cnfiguratin. Shw hw frm the utput characteristics the infrmatin abut the current amplificatin factr (13C) can be btained. (ii) Draw a plt f the transfer characteristics (V, versus Vi) fr a base-biased transistr in CE cnfiguratin. il ndi 2010; Freign (i) Using the necessary circuit diagram, draw the transfer characteristics f a base-biased transistr in CE cnfiguratin. With the help f these characteristics, explain briefly hw the transistr can be used as an amplifier? (ii) Why are NND gate called universal gates? dentify the lgical peratins carried ut by the circuit given as belw: Freign 2011 ~--,'---" 68. (i) Draw the circuit diagram f a base-biased n-p-n transistr in CE cnfiguratin. Explain, hw this circuit is used t btain the transfer characteristic V - Vi characteristic. (ii) The typical utput characteristics e versus VCEf an n -;r n transistr in CE cnfiguratin is shwn in the figure. Calculate (a) the utput resistance r and (b) the current amplificatin factr 3C' Frelan 2010 y

41 CHPTER 14 : Semicnductr Electrnics 463 ~ 10 c ;g 6 4 '.. V / 60m 50m 40m 30m 20m 10m 2 / Cllectr t emitter vltage (VC8 in vlts 69. (i) Draw the circuit diagram used fr studying the input and utput characteristics f an n- p-re transistr in the CE cnfiguratin. Shw the typical shapes f these tw characteristics. (ii) Hw are the (a) input resistance (b) current amplificatin factr f the transistr determined frm these characteristics? Delhl2010C 70. (i) Draw a circuit diagram t study the input and utput characteristics f an n -p -n transistr in its cmmnemitter cnfiguratin. Draw the typical input and utput characteristics. (ii) Explain with the help f a circuit diagram, the wrking f an n -p- n transistr as a cmmn-emitter amplifier. Delhl2009C 71. Draw a circuit diagram f an n- p-ri transistr with its emitter base junctin frward biased and base- cllectr junctin reverse biased. Describe briefly its wrking. Explain, hw a transistr in active state exhibits a lw resistance at its emitter-base junctin and high resistance at its base-cllectr junctin? Freign Draw a labelled circuit diagram f a base-biased transistr in cmmn-emitter cnfiguratin. Plt the transfer characteristics f this base biased transistr indicating the different regins f its peratin. Delhl2009C Explanatins 1. (i) Cllectr current decreases. (ii) ase current increases. 2. Lgic circuit f a NND gate Truth table Y= Lgic circuit :=O-y f a ND gate Truth table Y= Lgic circuit f a OT gate --t>----y (1/2 x 2 = 1) (1/2 x 2 = 1) (1/2 x 2 = 1) Output is high when input is lw and vice-versa. Truth table nput Output Y= (112x 2 = 1) 5. The given cmbinatin cnsists f NOR gate and NOT gate, s equivalent gate is OR gate. Truth table Y= (112 x 2 = 1)

42 464 Chpterwise C8SE Slved Papers PHYSCS Frm the truth table, it is clear that the utput is 1 nly when at least ne f the inputs is at the high state i.e This lgic gate is NOT gate and its symbls y =i ----{:> Lgic gate is NOR gate. :=>-y Symbl 8. Lgic gate is NND gate. NOR gate (112" 2 = 1) Refer t ns. 2. (1/2 " 2 = 1) 9. Lgic gate is NOR gate. Symbl Refer t ns Refer t ns Refer t ns Current amplificatin factr in cmmn emitter mde, PC = tilc ti V CE = cnstant Circuit diagram f n-p- n transistr amplifier in CE cnfiguratin is given belw: The cnditin fr the amplifier t wrk is that the base-emitter junctin shuld be frward biased and cllectr-base junctin shuld be reversed biased. (2) The truth e e table is given as shwn belw: Y'=+ Y = ( + ) e The lgic gates used are R is OR gate and S is ND gate. Vec 15. The lgic gates are P is NND gate and Q is OR gate. The truth 16. Refer t ns table is given as shwn belw: X= )<0---'-'--\ ---- ")(}---'"'---{ 17. Refer t ns Refer t ns. 23. and lgic symbl is :~Y=+ :---y 19. The given figure in questin is cmmn-emitter (CE) cnfiguratin f an n-p-n transistr. The input circuit emitter is frward biased and cllectr circuit is reverse biased. 20. s, the base resistance R decreases, the input circuit will becme mre frward biased thus, decreasing the base current ( ) and increasing the emitter current (E). This will increase the cllectr current (cl as E =~ + c. When c increases which flws thrugh the lamp, the vltage acrss the bulb will als increase thus making the lamp brighter and as the vltmeter is cnnected in parallel with the lamp, the reading in the vltmeter will als increases. Output characteristics is the plt between cllectr-emitter vltage (VCE) and the cllectr current (e) at different cnstant values f base current (1 8 ). ~ 10.s ~ 8 c ~ 6 :.. / ase current (s) :s 4 U ~ (2) (2) 60 jl 50 jl 40 jl 30 jl 20 jl, 10 jl Cllectr t emitter vltage {VcE! in vlts

43 CHPTER 14 : Semicnductr Electrnics Output resistance is defined as the rati f variatin f cllectr-emitter vltage (dd and crrespnding change in cllectr current (d d when base current remains cnstant. nitially with the increase in V ee the cllectr current increases almst linearly. this is because the junctin is nt reverse biased. When the supply is mre than required t reverse bias. the base-cllectr junctin. e increases very little with V ee. The reciprcal f slpe f the linear part f the curve gives the value f utput resistance. i.e. r = (d V ee ) = cnstant si; '= ~ Y'= ''. '= Y =y= ' + ' Y 23. Y=' '=+=+ Truth table '= Y=' ' ' = Y = = Thus. the equivalent gate is OR gate. 24. Emitter-base Cllectr-base juncti~ \ n ( ~unctin ()--+ ()--+ ()--+ ()--+ ()--+ ()--+ ~ = = The equivalent gate f the given circuit is ND gate. Truth table ' ' Y' Y Y 1 = and Y 2 = 13.. Y = Y 1 + Y 2 = Y 1. Y 2 = = The equivalent gate f the given circuit is ND gate. Truth table E Frward Reverse c biasing 18 biasing + VE VC Heavily dped emitter is subjected t electric field by emitter-base battery and cnsequently. hles gets drifted twards cllectr thrugh thin and lightly dped base regin. Nearly 5% hle. which drifted frm emitter cmbined with electrn in base regin and remaining nearly 95% hle reaches t cllectr under the influence V ee. 25. signal in which current r vltage changes cntinuusly with the time is called analg signals. signal in which current r vltage can take nly tw discrete values is called a digital signal. Example f analg circuit amplifier. radi. scillatr etc. Examples f digital circuit VCR. electrnic watches. rbts. mdern cmputers. (lx2=2) Yz Y Erl ~~--~--, ~-- nalgsignal (sinusidallyvaryingalternatingvltage)

44 466 Z ehapterwise ese Slved Papers PHYSCS Pulse duratin l 1 fr Pulse 1Pulse rise\ amplitude O~--~O----~--~O----~--~--~~ Time- Digital signal 26. Equivalent gate is OR gate. f input r r bth are 1. then the utput f OR gate is 1. lean expressin f OR gate is given as + = X ::=[>---0 X Lgic symbl f OR gate and the utput wavefrm as shwn belw: Truth table ~ : : 1 1 : ~ X : t-----:---t---i ~ ~ii}---1i... nputs = + Output X= (2) 27. Lamp glws brighter and vltmeter reading increases with the decrease f R. nput current increases in turn by transistr actin which will lead t increase in cllectr current. This makes lamp brighter and hence. vltmeter reading ges up. (2) 28. The transfer characteristic curve f base biased transistr in CE cnfiguratin as shwn belw: Cut-ff ctive 1 Saturatin regin regin: regin " V Rs pplying Kirchhff's rule t the input and utput circuits separately. we get V = V E + [R VCC= V CE + ere V CE = Vee - ere V = DC input - vltage (V;) V CE = DC utput - vltage (V) s. V; increases slightly abve 0.6 V. a current e flws in the utput circuit and the transistr arrives in active state... V=Vcc-eRe with the grwth f e. Ve decrease linearly. ls. vltage gain in active state is given by v = - ~V (':~V > ~V;) ~V; There is vltage gain and hence amplificatin f vltage takes place. Thus. transistr used as an amplifier. 29. Lgic circuit behaves like an ND gate Fr truth table Refer t ns. 3. t, tz t3 t4 ts t6 t7 t8 r :. : M : r-r--: ~ l--...:.-.l : : : (nputs): : :,"1: : r---i1 : r--i ~ : l--...:.-.l : : 1 n X ", 1 ' (Output)!!! Lgic peratin f the graphic circuit X= = Vj-

45 CHPTER 14 : Semicnductr Electrnics The truth table f given system is as fllws: (1/2) C= D= Y=C D (l1/a) The crrect perfrms the lgic peratin f OR gate. 31. X: ND gate Y: NOT gate Z: Y= (112 x 2) z 32. (i) s, Y 1 = +, Y 2 = + Y 1 Y (U) t1 t2 ts t4 ts te t7 (np:t:l Y2 (Output) 33. (i) P: NND gate; Q: OR gate (U) X= + (12x2= 1) Fr = 0, = 0, X = = = 1 Fr =1, = 1, X = = = (i) P: NOT gate and Q: OR gate (U) X = ( + ) Fr = = 0, X = = = 1 Fr = 1, = 1, X = T + 1 = = (i) The input resistance, rj f transistr in CE cnfiguratin is defined as the rati f small change in base-emitter vltage t the crrespnding small change in the base current, when the cllectr emitter vltage is kept cnstant, i.e. r. = (~:LE= cnstant [1/2x2= 1) (U) The current amplificatin factr f a transistr in CE cnfiguratin is equal t the rati f the small change in the cllectr current (Md t the small change in base current when cllectr-emitter vltage is kept cnstant, i.e. ~ = (Me) M vce ::::cnstant 36. Gate Frm the given utput wavefrm, it is clear that utput is zer nly when bth inputs are 1, s the gate is NND gate. (112) Truth table Y 0 Lgic symbl ~:=[J-Y Y= (1/2) 37. When utput f a tw inputs ND gate is fed t a NOT gate, then the cmbinatin is called NND gate Lgic symbl ~=cr-y Fr truth table, refer ns. 36.

46 468 ehpterwise ese Slved Papers PHYSCS 38. (i) Output f ND gate is Y =. n this case, utput will be nly when bth inputs are 1. ihj i H 8 -~--+---! nil --+- (nputs) X :: (Output) 0 1 ; ; 4 5 ~ ~ nput and utput wavefrms fr an ND gate (ii) NND gate will be frmed. 39. NOR gate Symbl On cnnecting the utput the given gate with NOT gate, Y=+=+ (i) f =O,=O~Y=+=O+O=O (ii) f =l,=1 40. Lgic gate Y=+=1. ~=D---v-Y Equivalent s frmed gate is NOR gate. Symbl ~=D-Y Truth table Y = + Y= NND gate will be frmed fr lgic symbl and truth table, refer t ns. 36. (2) 42. (i) 44. (ii) Y=+= Y=+= Given, amplificatin factr = il = 100 ib i = cllectr vltage = 2_ = 10-3 c cllectr resistance 2 x _ i, _ b ls given, base resistance = 10 3 Q nput signal vltage = ib x R = 10-5 X 10 3 y = 10-2 v input signal vltage ase current = = -- = base resistance 10 3 (i) The functins f all the three segments f transistr are given belw. The emitter supplies the majrity carriers fr current flw. The cllectr cllects them. The base acts as an acceleratr fr charge carriers and send them t cllectr. t als regulates the flw f majrity carriers in the circuit. (ii) Output f an ND gate is at high ptential when bth inputs and are supplied with high ptential. S, wavefrm is t1,,,,, :, (nput) l,, 8'i-, --;.-,,,,, (Output) (Y) :;-----;.-,,,,,, t2 t3 t8,,,,,,,,,,, ~n,,,,

47 CHPTER 14 : Semicnductr Electrnics 469 Truth table fr ND gate is given belw. nputs Output y VCE = 1 V VCE = 5 V VcE=10V 45. (i) Functins f three segments f a transistr as fllws: R8 V (1] are Emitter t supplies a large number f majrity charge carriers fr the flw f current thrugh the transistr. ase t cntrls the flw f majrity charge carriers frm emitter t cllectr. Cllectr t cllects a majr prtin f the majrity carriers supplied by emitter fr the circuit peratin. Vcc Circuit arrangement fr studying the input and utput characteristics f transistr in CE cnfiguratin (1] (a) nput characteristics nput characteristic means we have t plt the graphical representatin between and V E. V E is the emitter t base vltage r the frward bias vltage and is the base current. n this frward biasing, E is at lwer ptential than. We will be pltting versus V E because base is at higher ptential than emitter, s that will be reflected here. Nw g n varying V E. Fr silicn dide we have knee vltage arund 0.7 V. fter vercming the knee vltage, current will rise sharply. The input characteristic will be different if we g n increasing the V CE. t will be shifting right, means fr the same VEwe will be getting lwer input current l. nput resistance VSE(V) (1] (r;) This is defined as the rati f change in base-emitter vltage (6V E ) t the resulting change in base current (M ) at cnstant cllectr-emitter vltage (VCE). This is dynamic (C resistance) and as its value varies with the perating current in the transistr. r; = (~E) (b) Output characteristics graph shwing the variatin f cllectr current e with cllectr emitter vltage V CE at cnstant base current is called the utput characteristic f the transistr. study f these curves reveals the fllwing features. (i) When the vltage V CE increases frm 0 t abut 0.2 V, the cllectr current e increases rapidly. (ii) Once the vltage V CE exceeds the knee vltage the utput current e varies very slwly but linearly with V CE fr a given base current l. ~12.5.~ ~ 10 C 7.5 ~ ::::l j (5 u (ill) /' 5 V 2.5 VCE ase current (/a) Cllectr t emitter vltage (VCE) in vlts 60 J. 50 J. 40 J. 30 J. 20 J. 10 J. Output resistance (r) This is defined as the rati f change in cllectr-emitter vltage (6V CE ) t the change in cllectr current (Mcl at a cnstant base current :

48 Chapterwise CSSE Slved Papers PHYSCS 46. Cnsider the given figure, -----l;'\~ ~ P is ND gate and Q is a NOT gate. Truth Table X X=y The equivalent gate representing this circuit is NND gate. ts lgic symbl is ~ - ~Y=. 47. Circuit diagram f a CEtransistr amplifier e p-n-p RL y 48. Due t cllectr current e' the vltage drp acrss the lad resistance (Rd is erl. Therefre, the cllectr emitter vltage V CE is given by V CE '"' Vcc - erl... (ii) when the input C vltage signal is applied acrss the base-emitter circuit, it changes base-emitter vltage and hence, emitter-current E changes which in turn changes the cllectr current c. S, the cllectr-emitter vltage V CE varies in the accrdance with Eq. (ii). This variatin in V CE appears as an amplified utput. Current gain and vltage gain f amplifier (i) DC current gain, ~DC = e s C current gain, ~C = (!Hc )VCE lls (ii) Cvltage gain, v = e X R t, X R = lle x~ st, R VCE 0 ~ V E L OutputC nputc ::=:: Vcc signal signal -=- + e Wrking VE The emitter-base circuit is frward biased by a lw vltage battery V SE ' that means the resistance f input circuit is small. The cllectr-emitter circuit is reversed biased by a high vltage battery Vc that means the resistance f the utput circuit is high. RL is a lad resistance cnnected in cllectr-emitter circuit. The weak input C signal is applied acrss the base-emitter circuit and the amplified utput is btained acrss the cllectr emitter circuit. When n C vltage is supplied t the input circuit, we have... (i) (i) nput resistance may be defined as the rati f the small change in the base - emitter vltage (lvse) t the resulting change in base current (s) at cnstant cllectr-emitter vltage (VCE). nput resistance, R; = VE si, (ii) Current amplificatin factr (r) is defined as the rati f change in emitter current (ME) t the change in base current (M ).. r=me u. m si, 49. (i) Dynamic utput resistance is given as R" t = (lvce) 12-8 u llc ~ cnstant ( ) X = 20kn 0.2 x 10-3

49 CHPTER 14 : Semicnductr Electrnics (ii) DC current gain, ~DC = e = 3.5 m 8 30~ = 350 = (iii) C current gain, ~ = Me = (4.7-15)m = 1.2x 10-3 =120 DC M8 (40-30)~ 10xlO-6 n the linear regin f utput characteristics ~C is clse t ~DC' Transfer characteristics The graph between Vi) and Vi is called the transfer characteristics f the base-biased transistr, is shwn in figure. Cut-ff ctive V regin i regin a 3.5 X X 10-6" Saturatin regin 51. Truth table f given circuit is as shwn belw: X= Y= Z=X+Y This circuit carries ut by the lgic peratin f ND gate which can als be verified by de-mrgan's therem Z=X+Y =+ =+= S, the circuit crrespnds Symbl =D--Z=.a 52. Z = + = = t ND gate. (2) Transfer characteristic When the transistr is used in the cut-ff r saturatin state. t acts as a switch. V = Vcc -crc ~ Vi = l8r8 + VE Transistr as a switch The circuit diagram f transistr as a switch is shwn in figure. e Rc + Va 53. Refer t ns. 51. (3) Cut-ff ctive regin regin v, : : : Saturatin : re-"9'-i_n _ vcc Sase-biased transistr in CE cnfiguratin s lng as Vi is lw and unable t frward bias the transistr, V is high (at Vd. if Vi is high enugh t drive the transistr int saturatin, then V is lw, very near t zer. When the transistr is nt cnducting it is said t be switched ff and when it is driven int saturatin it is said t be switched n. This shws that if we defme lw and high states as belw and abve certain vltage levels crrespnding t cut-ff and saturatin f the transistr, then we can say that a lw input switches the transistr ff and a high input switches it n. Transfer characteristic f bse-biased transistr (W2) The active regin f transfer characteristic curve perates as an amplifier. (1/2) (i) Refer t ns. 35 (i). (1/2) (ii) Output resistance The rati f variatin f cllectr emitter vltage (VCE) and crrespnding change in cllectr current (Me) when base current remains cnstant is called utput characteristic curve. R - (~VCE) ut - -- Me 18 =cnslant (ill) Refer t ns. 35 (i), (ill). (112)

50 412 Chapterwise CSE Slved Papers PHYSCS 54. Fr curve, refer ns. 53. Truth table 55. The active regin f transfer characteristic curve 'Sfused as an amplifier. (2), Whenever CE circuit is used as an amplifier the j~~~~;f~~;~li~~i~f;r~i;~~~:hr:~ ( Circuit diagram f a cmmn-emitter amplifier (1'12) FrG e 3 Gate ND gate Truth table (112 x 2= 1) (tl V = C\ V nput C vltage VeE e Output - Vcc 1 ~d utput (1'1.) Vltage gain t is equal t the rati f small ch~rige'in 'utput vltage at the cllectr t that f change in input vltage, i.e. v = Output vltage nput vltage : ' =,ivce = (MdRut = ~C X 'Rut,iV E ME Rm Rm => Vltage gain = ~C X Rut m where, ~C is C current gain. 56. Fr G 1 Gate Truth table Fr G 2 NND gate Gate NOR gate (1'1.) (112 x 2 = 1) G 3 = (i) G 1 : ND gate (ii) G 2 : NOR gate (112 x 2 = 1) (iii) G 3 : OR gate. (112 x 3) Truth table G 1 G 2 G (1'12) 58. Fr figure refer t ns. 55. (2) Relatinship between input and utput signals f n -p- n transistr amplifier. When psitive half cycle is fed int input circuit, frward bias f emitter base circuit decreases. This lead t decrease E and by transistr actin, cllectr current decreases. Since, utput vltage, V = VCE - e Ru therefre, decrease in cllectr current, ircreases the utput vltage. s, the cllectr is cnnected with the negative terminal f battery V ee, the ircrease in cllectr vltage imply that negatively f cllectr increases. Thus, crrespndirg t psitive half cycle f input C, a negative amplified cycle is btained at cllectr and vice-versa. This shws that utput and input signals are in ppsite phase.

51 CHPTER 14 : Semicnductr Electrnics The gates 1 and 2 are NOR gates acting as NOT gate. Fr and 2, When = 0, = 0, Y = + = 0 = Similarly, = 0, = 0, Y = + 0= 0 = Lgic gate f cmplete circuit is ND gate. Truth table Refer t ns. 3. (2) 60. (i) The base regin f the transistr is physically lcated between the emitter and the cllectr regin and is made frm lightly dped high resistivity material. The emitter and cllectr regins are heavily dped. ut the dping level in emitter is slightly greater than that f cllectr and the area f cllectr regin is slightly mre than that f emitter. n term f dping level, Emitter regin> cllectr regin> base regin n term f area f the regin, Cllectr regin> emitter regin> base regin. The area f the cllectr regin is greater than that f emitter. This is because the cllectr regin has t handle mre pwer than the emitter and als it has t cllect mre number f charge carriers t cnstituent the current. Emitter is heavily dped t prvide large number f majrity charge carriers, while base and cllectr are lightly dped t accept these charge carriers frm emitter. (ii) The cnditins f a transistr fr t be in active state are belw: (a) The input circuit shuld be frward biased by using a lw vltage battery. (b) The utput circuit shuld be reverse biased by using a high vltage battery. (ill) CE cnfiguratin refer t ns (i) Cmmn-emitter Transistr Characteristics T study the characteristics f an n-p-n transistr in cmmn-emitter mde, required circuit is shwn in the figure. Here, base-emitter circuit is frward biased with battery V E and emitter- cllectr circuit is reverse biased with battery Vce. Frm circuit diagram, we cme acrss t knw that it is made up f tw sectins, i.e. input and utput. These tw characteristics can be studied as shwn belw: (a) Emitter r nput Characteristics graphical relatin between the emitter vltage and the emitter current by keeping cllectr vltage cnstant is called input characteristics f the transistr. djust cllectr-emitter vltage at a suitable high value VCE (say = + 10 V). t is necessary s as t make the base-cllectr junctin reverse biased. Nw, with the help f rhestat gradually increases, the value f base-emitter vltage V E in small steps and nte the crrespnding values f base current l' '~) lc VeE=10V VEM nput resistance t is defined as the rati f change in base-emitter vltage (L~.vE)t the resulting change in the base current (!V) at cnstant cllectr-emitter vltage (VeE)' t is reciprcal f slpe f -V E curve. nput resistance, R i = (~E) VCE = cnstant Vee

52 474 ehapterwise ese Slved Papers PHYSCS (b) Cllectr r Output Characteristics graphical relatin between the cllectr vltage and cllectr current by keeping base current cnstant is called utput characteristics f the transistr. T study utput characteristics f transistr we keep value f base current fixed (say at 10 J.1) with the help f V E. Nw, gradually change the value f V CE and nte the values f cllectr current t.. Plt e - V CE graph. Repeat the prcess fr different cnstant values f l' The utput characteristics are as shwn belw: ~ 10.5: ;g 8 C ~ 6 'S / ase current (18) 60~ 50~ 40~ 30~ ~ 4 20~.!l1 (5 10~ Cllectr t emitter vltage (VcElin vlts (ii) Feedback When a prtin f the utput pwer is returned back t the input in phase this is termed as psitive feedback. nput 'r=--i Transistr r-i amplifier ~ Output ' Feedback U netwrk ~ Feedback netwrk The phenmenn f mutual inductance is used t take a part f utput in cil (L') back int input cil (L). When the switch K is clsed, cllectr current begin t flw thrugh L', which in turn increases the magnetic flux linked with L' and hence with L. This leads t prduce an induce emf in L, which increases the frward bias. This als increases the base current and hence cllectr current alng with the charging f capacitr takes place with upper plate as psitive. This phenmenn is repeated again and again till the cllectr current reaches t its maximum value. nductive cupling n-p-n '----l~kj- V Circuit diagram f trnsistr as n scillatr t maximum value f e' current thrugh L' des nt change and therefre flux remains unchanged and emf in L' and L reduces t zer. Nw, the discharging f capacitr begins thrugh L. The psitivity f upper plate decreases and frward bias decrease, which results in the frm f decrease in base current and hence, decrease in cllectr current. This phenmenn repeats till cllectr current reduces t zer and emf in the cil L als reduces t zer. Thus, the time duratin in which cllectr current grws frm zer t maximum, the current in cil L f tank circuit cmplete its half cycle. The duratin in which cllectr current reduces frm maximum t zer, the current in L' cmpletes its next half cycle. e Cllectrl'---+--J(--...;--+current in L' Current in cilf ,---t-- L f input circuit t- Rise and fall f currents The frequency f scillatin is given by 1 V=--- 2rc.JLC Thus, the C f desired frequency and amplitude can be btained by taking apprpriate value f inductance, capacitance and strength f battery. +

53 CHPTER 14 : Semicnductr Electrnics (i) n this transistr, the emitter-base junctin is frward biased and its resistance is very lw. S, the vltage f V EE is quite small. The cllectr-base junctin is reverse biased. The resistance f this junctin is very high. S, the vltage 'f Vee (Ve) is quite large ('" 45 V). Electrns in emitter are repelled twards base by negative ptential f V EE n emitter, resulting emitter current 1. The base being thin and lightly dped has lw density f hles, thus when electrns enter the base regin, then nly a few hles get neutralised by electrn hle cmbinatin, resulting in base current (s). The remaining electrns pass ver t the cllectr, due t high psitive ptential f cllectr, resulting in cllectr current ( cl. s, ne electrn reaches t cllectr. it gets neutralised by the flw f ne electrn frm the negative terminal f the battery Vee t cllectr thrugh cnnecting wire. Then, ne electrn flw frm negative terminal f battcry Vce t psitive terminal f battery V EE and ne electrn flw frm negative terminal f V EE t emitter. When the electrn cming frm emitter cmbines with the hles in base, then deficiency f hle in the base is cmpensated by the breaking f cvalent bnd there. The electrn, s released flws t the psitive terminal f battery V EE, thrugh cnnecting wire. Thus, in n-p-n transistr, the current is carried inside as well as in external circuit by the electrns. Thus, in this case als, 1 = s + e [Kirchhff's first law] n the base, E and e flw in ppsite directin. p-base n-emitter regin n-cllectr,,.,-----'--,,, --- :::::.e :--- ~n - nl : i:= VE 18 VC :+ 1 VEE E lc vcc Flw f charge carriers in n-p-n transistr (ii) Refer t ns. 61. ic 63. (i) Thin and lightly dped base regin cntains a smaller number f majrity charge carriers, reducing rate f recmbinatin resulting small s and cllectr current almst equal t 1 resulting large vltage and pwer gain. (ii) Refer t m. 61 (i). (iii) Refer t ns. 68 (i). (3) 64. X ~ mplifier, Y ~ Feedback netwrk Transistr as an scillatr: n an scillatr, the utput at a desired frequency is btained withut applying any external input vltage. The cmmn emitter n - p - n transistr as an scillatr is shwn in the fllwing figure. variable capacitr C f suitable range is cnnected in parallel t cil L t give the variatin in frequency. f-.--:f-:::output Oscillatr actin s in an amplifier, the base-emitter junctin is frward biased while the base cllectr junctin is reverse biased. When the switch S is put n, a surge f cllectr, current flws in the cil T 2. The inductive cupling between cil T2 and i cause a current t flw in the emitter circuit i.e., feedback frm input t utput. s a result f psitive feedback, the cllectr current reaches at maximum. When there will be n further feedback frm T2 t i, the emitter current begins t fall and cllectr current decreases. Therefre, the transistr has reverted back t its riginal state. The whle prcess nw repeats itself.the resnance frequency (f) f the scillatr is given by 1=_1_ 21tfLC (2) The tank f tuned circuit is cnnected in the scillatr side. Hence, it is knwn as tuned cllectr scillatr.

54 476 Chpterwise CSE Slved Papers PHYSCS 65. While finding gain fr CE cnfiguratin we shuld mind that it will depend upn the lad resistance, input resistance as well as utput will be inverted. Fr circuit diagram refer t ns. 55. Wrking n the circuit, emitter is frward biased and cllectr is reversed biased. This makes input resistance (R;n) very lw and utput resistance (Rut) high. During the psitive half cycle f input C decrease the frward bias. Hence, emitter current, E and by transistr actin cllectr current decreases. This tend t increase the cllectr vltage which is given by V = V CE = Vcc - erl The high value f RL prduces large change ill V crrespnding t lw change in Vi' Thus, amplified pulse is btained at cllectr. Vltage gain t is equal t the rati f change in utput vltage (VeE) crrespnding t the change in input vltage (~VE)' i.e. Vltage gain, v = ~VCE,;, (Md RL ~VE (M8) Vi where, RL and R, are utput resistances (lad resistance) and input resistance f transistr respectively. V=(Me)RL =~erl M8 r i r i where, ~e is C current gain = Me M8 (112) The utput vltage f CE amplifier differ in phase frm the input vltage by r n rad. The ppsite phase is represented by negative sign. Current amplificatin factr (J3d is the rati f change in cllectr current (Md t the change is based current (M ) at cnstant cllectr vltage, i.e.. ~C = Me M VCE = cnstant Output characteristics represent the variatin f t c with V e ' keeping 18 cnstant ~_r_--- la = 400 m.-...&.---- la = 300 m -r--- le= 200 m la=100m Vc(vlt) - Frm abve graph at Ve = V, the value f cllectr current increases with the increase in the base current, l' Thus, ~C = Me [C current gain] M vce = cnstant (U) Transfer characteristics curve fr a base-biased transistr in CE cnfiguratin. Cut-ff regin ctive regin Saturatin regin.. Vltage gain = - ~e RL ri (112) 66. (i) The circuit is as shwn belw: V Ra te c Rc vcc /' + V 67. '------' '----_ Hence, lw input give high utput and high input gives lw utput. (i) Fr curve refer t ns. 53, CE amplifier circuit ns.55. (2) The active regin f a transfer characteristics curve can be used t explain the transistr as an amplifier. Vi (2)

55 CHPTER 14 : Semicnductr Electrnics The resistance f utput circuit is large being in reverse bias and resistance f input circuit is lw being in frward bias. When input vltage, V E cmes in active regin, e flws in utput and V varies significantly as V = VCE = Vcc - erl This change in utput vltage is btained as amplified frm. (ii) NND gates are termed as universal gates because all three basic gates namely ND, OR and NOT can be made using NND gate. The given circuit perfrm the lgic peratins f ND gate as Y = ( ) = (i) Fr n-p- n transistr in CE cnfiguratin circuit diagram. (ii) (a) Refer t ns. 66 (ii). Fr transfer characteristic curve Refer t ns.28. (2) (b) The utput resistance (r) _ (L'l.VCE) Me s = cnstant Frm the given graph, at = 60~, VCE = 2V, VCE = 16 V Cllectr current changes frm 8 m t 8.5 m, i.e. L'l.V CE =16-2=14 V Me = = 0.5 m = 5 x r =(:~t=60~ sx1:0-4 r = 2.8 x 10 4 n r = 28 kn The current amplificatin ~C= (Me) M VCE = cnstant factr, t VCE= 2 V, = 10 ~ t 60 ~.. M=(60-1O)=50~ e changes frm 1.5 m t 8 m.. M e =8-1.5=6.5m => ~ =(Me) 6.5x 10-3 C M 50x 10 6 VCE 69. (i) Refer t ns. 66 (ii), 28. (3) (ii) Refer t ns. 35 (i), (ii). (2) 70. (i) Refer t ns. 57. (3) (ii) Fr circuit refer t ns. 51. Wrking f n-p-n transistr as CE amplifier n the circuit, utput resistance is very high whereas input resistance is very lw being reverse and frward bias, respectively. When current, e grws in utput circuit, ptential difference acrss the cllectr decreases significantly as per relatin V ;= VCE = Vcc - erl When input vltage is fed int input circuit, V E changes, which in turn change and E' y transistr actin, e change and thus, utput vltage changes in amplified manner. 71. n -p- n transistr in C cnfiguratin Since, the base is cmmn in input and utput circuits, therefre transistr is cnnected in C cnfiguratin. h --..,---{/}---,-=-T nput =} r VSE s VSS 1,=} Output =vcc (2%) Wrking When input vltage, V E is sufficient t make flw f emitter current, cllectr current flws in utput circuit. n this cnditin, the circuit is said t be in active state. The small change in V E, prduces sufficient change in emitter current and hence, in cllectr current. The input circuit ffers very small resistance as ample change in emitter current ccurs crrespnding t small change in input vltage. This lead t prduce large change in utput vltage in spite f smaller change in cllectr current (E < d. This shws that utput circuit ffer high resistance. (2%) 6.5 X ~C= =1.3xlO=>~c=130 50

56 478 Chapterwise CSE Slved Papers PHYSCS 72. Refer t (first part) V =- RL e V 1 (H) Secnd part 66 (ii). V nput Cvltage n-p-n transistr ~ ~ as a cmmn emitter amplifier (5) Value ased Questins (Frm Cmplete 4 Marks Questins 1. Meeta's father was driving her t the schl. t the traffic signal she nticed that each traffic light was made f many tiny lights instead f a single bulb. When Meeta asked this questin t her father, he explained the reasn fr this. nswer the fllwing questins based n abve infrmatin: (i) What were the values displayed by Meeta and her father? ' (ii) What answer did Meeta's father give? (iii) What are the tiny lights in traffic signals called and hw d these perate? Deihl 2016 ns. (i) Values displayed by Meeta, are curisity t learn and gd bservatin. Values displayed by her father are patience and knwledgeable. (ii) Meeta's father mst prbably explained her the benefits f using tiny bulbs (LEOs) ver a single bulb. (a) Tiny lights are semicnductr devices which cnsume very less pwer than a single bulb. (b) Tiny lights are very cheap. (c) Chapter) f sme f these tiny lights are nt wrking, then traffic system will nt be affected. ut if a single bulb is fused, traffic system will be disturbed. (2) (Hi) Tiny lights in traffic signals are called LEOs. LEOs are perated in frward biasing and emits spntaneus radiatin. 2. meen had been getting huge electricity bill fr the past few mnths. He was upset abut this. One day his friend Rhit, an electrical engineer by prfessin, visited his huse. When he pinted ut his anxiety abut this t Rhit, his friend fund that meen was using traditinal incandescent lamps and using ld fashined air cnditiner. n additin there was n prper earthing in the huse. Rhit advised him t use CFL bulbs f 28 W instead f looow-200vand als advised him t get prper earthing in the huse. He made sme useful suggestin and asked him t spread this message t his friends als. (i) What qualities/values, in yur pinin did Rhit pssess? (ii) Why CFLs and LEDs are better than traditinal incandescent lamps? (iii) n what way earthing reduces electricity bill? elhl2015c

57 CHPTER 14 : Semicnductr Electrnics 479 ns. (i) eing an engineer, Rhit was well awared abut energy saving and use f mdern technlgy. (ii) CFLs and LEOs cnsumes less pwer in cmparisn f traditinal incandescent lamp and als give mre light and it can save upt 85% n energy bill. (iii) The earth wire acts as negative terminal. The flwing current frm psitive cable t earth grunding will nt be cunted by electric meter because it des nt pass the negative cable. n this way, yu can reduce the electricity bill and save yur mney. (2) 3. Kritika Singh was enjying TV prgramme at her hme with her yunger brther Srya at night. Suddenly, the light went ff causing darkness all ver. Srya asked her t bring candle alng with matchstick t put the TV switch ff. Kritika at nce picked the mbile phne and pressed the buttn lighting up the surrunding. Her yunger brther was surprised and asked, where the light was cming. Kritika prudly shwed her mbile. Read the abve passage and answer the fllwing questins. (i) Which value is displayed by Kritika? (ii) Name the material used in the frmatin f LED. (iii) LED wrks, in which biasing? ns. (i) Kritika is a creative and intelligent girl. She has gd knwledge f Physics. (ii) The semicnductr material is used in the frmatin f LED e.g. Ga, s, P. (iii) LED wrks in frward biasing i.e. n-type is cnnected with negative terminal f the battery and p-type is cnnected with psitive terminal f the battery. Light Emitting Dide (LED) Specially designed dides, which give ut light radiatins when frward biased. LED's are made f GasP, GaP etc. (4) 4. shwin was given 3 semicnductrs, and C with respective band gaps f 3 ev, 2 ev and 1 ev fr use in a phtdetectr t detect = 1400nm. He fund that the phtdetectr was nt wrking with these semicnductrs and did nt knw why? His friend kash fund ut the reasn fr it and explained it t him. Read the abve passage and answer the fllwing questins. (i) Why did the phtdetectr nt wrk? (ii) What accrding t yu are the values shwn by kash? ns. Energy related t wavelength is E = he = 6.634x x 3x 10 8 =1.42 x 1O.-19J 1400x 10 9 E _1.42 X = 0.88 ev [:. 1 ev = 1.6 x 10-19J] 1.6x (i) The phtdetectr des nt wrk because the energy related t wavelength, 0.88 ev is less than band gaps f semicnductrs, and C. (ii) The values f kash are (a) helping attitude. (b) presence f mind. (c) high degree f awareness. (d) cncern fr his friend, kindness. (2) 5. Garima and Gaurav want t purchase a new TV set. They visited electrnic shps t lk fr sme branded TV. The dealer shwed them LCD and LED TV's. Nw, they were cnfused which set t buy. Finally, after discussing with friends, reading relevant literature and searching the internet, they decided t purchase LED. (i) Which value is being highlighted by Garima and Gaurav? (ii) What is the difference between LED and LCD? ns. (i) nterpretatin skill applicatin skill. analytical thinking is being highlighted by bth. (ii) LED stands fr Light Emitting Dide. LED is a semicnductr dide. Whereas, LCD stands fr Liquid Crystal Displays. LCDs came as a replacement technlgy fr large and heavy cathde ray tubes. (2)

58 480 Chpterwise CSE Slved Papers PHYSCS LCD is a devices, which cnsists f several parts, whereas an LED is a single cmpnent device. LCD is nly used as a display device, whereas LED are used in varius ther applicatins such as flashlights and indicatrs. LEDs are capable f prducing light whereas liquid crystals cannt prduce light. LED displays cnsume less pwer in general than the same sized LCDs. LED displays can prduce mre brightness and cntrast than the cunter part LCD displays. [31 6. Gautam went fr a vacatin t the village where his grandmther lived. His grandmther tk him t watch 'nautanki' ne evening. They nticed a blackbx cnnected t the mike lying nearby. Gautam's grandmther did nt knw what that bx was. When she asked this questin t Gautam, he explained t her that it was an amplifier. (i) Which values were displayed by the grandmther? Hw can inculcatin f these values in students be prmted? (ii) What is the functin f an amplifier? (iii) Which basic electrnic device is used in the amplifier? ns. (i) The values displayed by Gautam's grandmther are (a) Curisity (b) wareness [2) The inculcatin f these values in students can be prmted by psitive mental state, imprvement in mtives and healthy supprtive envirnment. (H) The functin f an amplifier t increase the amplitude f variatin f alternating vltage r current r pwer. [1) (Hi) Transistr is the basic electrnic device used in the amplifier. [1) 7. (i) Figure shws the input wavefrm which is cnverted by a device 'X' int an utput wavefrm. Name the device and explain its wrking using the prper circuit. Derive the expressin fr its vltage gain and pwer gain. (ii) Draw the transfer characteristic f base biased transistr in CE cnfiguratin. Explain clearly which regin f the curve is used in an amplifier. Delhl2015C ns. (i) Device X ~ CE mplifier Pwer gain p f the transistr may be expressed as: C pwer gain ( p ) = Current gain (J3cl x Vltage gain (,,) p = ~;,.C"RL R [2) s pwer is always psitive, hence pwer gain p is always psitive. Refer t ns. 48. (H) Refer t ns 50. [2) 8. Srya usually enjyed lud music. One day his music system was nt prducing very lud sund. Srya get disappinted. He discussed his prblem with his big brther Kamal. Kamal advised him t cnnect an amplifier in series with the amplifier f stersystem. This increased the sund f Srya music system cnsiderably. Read the abve passage and answer the fllwing questins. (i) Which values is displayed by Kamal? (ii) Why the ludness f music system get increased n cnnecting amplifier? (iii) Give the equatin fr current gain in the transistr as an amplifier. ns. (i) Kamal is caring fr his yunger brther, gd subject knwledge helps him t develp applicatin skill. [1) (ii) On cnnecting tw amplifiers in series, its amplificatin gains get multiplied. Hence ludness f music system increases. [21 (iii) Current gain in the transistr as an amplifier is given by ~C = M C M where, Mc = change in cllectr current M = change in base current [1)