Prof. Paolo Colantonio a.a

Transcription

1 Prof. Paolo olantonio a.a

2 The D bias point is affected by thermal issue due to the active device parameter variations with temperature I 1 I I 0 I [ma] V R } I 5 } I 4 } I 3 Q 2 } I 2 Q 1 } I 1 V } I =0 V E [V] oth I O and V E vary with the temperature, thus resulting in a variation of I Prof. Paolo olantonio 2 30

3 To reduce thermal issue, a feedback solution could be adopted V R I 1 I + v i - R 2 R E I E If the bias current I is increasing, then the voltage drop across R E is increasing also onsequently the base emitter voltage V E is decreasing Accounting for the device input characteristics, the base current I will be reduced Thus the device output current (I =H FE I ) will be reduced However, as we will see later, the resistor R E will reduce the A gain, therefore typically it is short circuited by a parallel capacitance Prof. Paolo olantonio 3 30

4 y adding in the circuit some element that is bias dependent, thus able to reproduce the same variation of V E, I 0 (and ), it is possible to compensate the I variation ompensation of I 0 V I 0 is the diode reverse saturated current R + I I Assuming V >>V E >>1 I 0 VE I E I I I 0 V I 0 - I I I 0 1 I 0 I Prof. Paolo olantonio 4 30

5 In the integrated implementation, since the resistor RE requires a by pass capacitance to allow higher gain, and this capacitance could be very high, a different approach is adopted ompensation in integrated circuits V The transistor Q 1 resembles a diode, being V E1 =V E1 Its collector current I 1 is given by: R I I 2 I 1 V V E1 I 1 I 2 v i I 1 Q 1 V E1 I 1 I 2 V E2 Q 2 v o Assuming V >>V E1 and (I 1 +I 2 )<<I 1 I 1 V const If the two transistors are similar, accounting for V E1 =V E2 and =R, then the bias current I 2 is constant I 2 I 1 V const Prof. Paolo olantonio 5 30

6 ompensation in integrated circuits The addiction of the two resistors R 2 er 3 improves the circuit behavior In this case, in fact, are the biasing currents I 1 and I 2,insteadofV E1 and V E2, to control the D behavior of Q 1 and Q 2 V If R 2 =R 3 then I 1 I 2 I I I I v i R 3 R Q 2 I 2 v o 0 V I 1 2 I I R 2 V E1 I 1 V V E1 2 R 2 R 1 I R 2 =R 3 Q 1 V E1 I 1 V E2 y a suitable selection of parameter, and accounting that Q 1 =Q 2, it is possible to obtain I 2 I 1 V const Moreover, selecting R =1/2 then V E2 V I 2 R V 2 Prof. Paolo olantonio 6 30

7 Assuming a generic two port a representation is made by assuming some electrical quantities as independent variables, while the remaining ones are dependent R g i 1 i 2 v g v 1 v 2 In particular, starting from the set of equation I 2 f I 1,V 2 V 1 gi 1,V 2 y a series expansion around the quiescent bias point (i.e. Taylor or McLaurin ) I 2 I 2 I I 1 I 2 V 1 V I 2 2 I 2 2 I I 2 2 V 1 2 V V 1 V 1 I I 1 V 1 V 1 V V 1 2 I 2 2 I V 1 2 V 1 2 V I 2 I I 1 V 1 V V 1 I I 1 V 1 V 2 2 Prof. Paolo olantonio 7 30

8 Is a first order approximation is considered I I i i v I1 V v 0 2 i V V v i v I1 V v 0 2 i Defining h 11 V V 1 1 h12 I1 v2 0 V i2 2 0 h 21 I I 2 2 h22 I1 v2 0 V i2 2 0 An hybrid representation can be obtained v h i h v i h i h v Prof. Paolo olantonio 8 30

9 In particular, referring to the ommon Emitter configuration v g R g i 1 v 1 v 2 i 2 v h i h v 1 ie b re e i h i h v c fe b oe e h ie v i b b v c 0 Input resistance with the output short circuited (ohms). h re v v b c 0 i b Voltage gain -1 with the input open (dimensionless). h fe i i c b v c 0 Forward current gain with the output short circuited (dimensionless). h oe i v c c i b 0 Output conductance with the input open (ohms -1 ) Prof. Paolo olantonio 9 30

10 The previous equation can be represented by an equivalent circuit model (hybrid model) v h i h v i h i h v 1 ie b re e c fe b oe e Prof. Paolo olantonio 10 30

11 orrente di base I,mA V 1 V I V 2 V V V I V I V cos t cos t = V 2 -V1 ollector current I, ma I =200μA I V I I I V cos t cos t ollector-emitter voltage V E, V ase voltage V E,V Typical values: h fe n 10 n 100 h re h ie Ω h oe Prof. Paolo olantonio 11 30

12 Accounting for the h parameter values, the model can be further simplified, assuming: r o 1 h oe Accounting for the diode behaviour of the base emitter junction, it is possible to define: g m i v E v ce 0 i c i b i b v be h FE I Q V T I Q V T 40 I Q Thus obtaining the following model (similar to FET): Prof. Paolo olantonio 12 30

13 The basic amplifier configuration are named according to the JT pin that is common to both input and output networks ommon Emitter (E) + i ommon ollector () i R S R S + v s i v E E v ce V + i v s v E E V o V V - ommon ase () R i R o R S E i + v s v i =v E v =v o V Prof. Paolo olantonio 13 30

14 For each configuration, the equivalent hybrid model can be used, by assuming for the [h] parameters the corresponding values, i.e. the second letter of the subscript represent the device configuration ommon Emitter (E) h ie,h fe,h re,h oe ommon ollector () h ic,h fc,h rc,h oc R s [h je ] R s [h jc ] E v s + v s + E R s ommon ase () h ib,h fb,h rb,h ob E v s + [h jb ] With this appraoch the [h] parameters assume different values, but the amplifier relationships (voltage gain, input and output resistance) have the same form Prof. Paolo olantonio 14 30

15 A different approach is based on the adoption of the same JT equivalent model (i.e. E [h] parameters h xe ) In this case the expressions are different ommon Emitter (E) ommon ollector () R s R s v s + E v s + E ommon ase () R s v s + E Prof. Paolo olantonio 15 30

16 v s R s I 1 1 I 2 2 R I s 1 1 h I i 2 2 I L I L h f I 1 h o V 1 V 2 Z L V 1 V 2 Z L 1' Two-port active network (transistor) 2' v s 1' + hrv2 2' Z i Y 0 Z i Y 0 h Approximate conversion formulas for hybrid parameters h ic h ie h rc 1 1 h oc hoe fc h fe h h ib ob h ie 1 h fe hoe 1 h fe hie hoe h rb h 1 hfe hfe h fb 1 h Prof. Paolo olantonio fe re

17 onsider the following circuit from which we want determine the quiescent collector current and the quiescent output voltage, given that the h FE of the transistor is 100 The base emitter voltage V E is approximately 0.7V I V V E R 10.2 A I h FE I 1.02 ma V E V O V I R 5.2 Prof. Paolo olantonio V

18 Determine the small signal voltage gain, input resistance and output resistance of the following circuit, given that h fe = 100 and h oe = 100 us The first step is to construct the small signal equivalent circuit Prof. Paolo olantonio 18 30

19 We first need to establish g m and h ie. From the earlier example I E I =1.02mA.Therefore g m 40 I E 40.8 ms h ie v be i b v be i c h fe h fe g m 2.45 k Prof. Paolo olantonio 19 30

20 Voltage gain A V v o v be g m v be R // 1 v be h oe g m R 1 hoe R 1 hoe g m R R h oe If the simplified model is considered, accounting for the large value of 1/h oe A V v o v be g m R 192 Given the inaccuracies involved, this seems a reasonable approximation Prof. Paolo olantonio 20 30

21 Input resistance R in R //h ie h ie 2.4 k Output resistance R out R // 1 h oe R 4.7 k Prof. Paolo olantonio 21 30

22 V Small signal equivalent circuit R i in 1 i b 1 i out v out v in //R 2 h ie h fe i b 1/h oe v out v in R 2 R in R out R out A V hi // 1 fe b R L v h out oe RL R R h 1// R2 // h h fe v h i h in ie b ie in ie ie R out 1 h oe 1 R ' R // R h out L L oe A I i v R i R v out out in in L in h fe Prof. Paolo olantonio 22 30

23 V Small signal equivalent circuit i in i b 1 v in //R 2 h ie h fe i b 1/h oe v in R 2 v out R in R out R in i out v out A V v 1 hfe ib R out L 1 vin hie 1 hfe R L ib v h 1 h R i R h h R ' in ie fe L b in ie 1 fe L ib ib R out vout hieib hie i h out 1 h 1 fe ib fe R R // R // R in ' in // 1// 2 iout vout Rin R h in ie hfe RL R R A A 1h i R v R R I V fe in L in L L Prof. Paolo olantonio 23 30

24 V Small signal equivalent circuit i b 1 h ie h fe i b i out v out R 2 v out R E v in R in R E v in i in A V v hir R out fe b L L hfe vin ibhie hie ' R R out out R L R out R out R in vin hieib hie i h in 1 h 1 fe ib fe A I i hi out fe b 1 i 1h i in fe b Prof. Paolo olantonio 24 30

25 V Small signal equivalent circuit i b R 1 h ie h fe i b v out,2 v in //R 2 R v in R 2 v out,2 R E v out,1 R E v out,1 R in R out,1 R o u t,2 A v 1h i h R out,1 fe b E fe E V,1 vin h 1 ie 1 ie h h h fe R E i b fe RE If R E =R,thenA V,1 = A V,2 A V,2 v hir hr out,2 fe b fe 1 1 v h h R i h h R in ie fe E b ie fe E R out,1 hi ie b 1 h fe i b hie 1 h fe 1 // 1// 2 Rin hie hfe RE R R Rout The output resistances are different!!! Prof. Paolo olantonio 25 30

26 V V V V R v out v out,2 v in R 2 v in R 2 v out R 2 R E v in v out v in R 2 R E v out,1 Out,2 Out,1 E E (with R E ) (with R ) A V h fe /h ie 1 h fe /h ie h fe R /[h ie +(1+h fe )R E ] (1+h fe )R E /[h ie +(1+h fe )R E ] R in h ie h ie +(1+h fe ) h ie /(1+h fe ) h ie +(1+h fe )R E h ie +(1+h fe )R E R out h ie /(1+h fe ) h ie /(1+h fe ) A I h fe 1+h fe 1 h fe R /R E 1+h fe Prof. Paolo olantonio 26 30

27 As we have seen the use of resistor RE in the E amplifier is useful to stabilize the device operating point. It is also useful to stabilize the gain behaviour, resulting in: V R A V with R E v h out fer v h 1h R in ie fe E R R E 1 v in R 2 v out A V without R E v v out in hfer h ie R E With feedback, the voltage gain is fixed by the resistive components, that are two stable and well defined passive components. Without the feedback the gain is h fe /h ie, thus varying with the transistor s operating condition and its variability (for h ie and h fe ) Prof. Paolo olantonio 27 30

28 However, the use of RE drastically reduces the amplifier voltage gain Thus it is quite common to remove the A feedback by using a decoupling capacitor Prof. Paolo olantonio 28 30

29 The adoption of the decoupling capacitor change the frequency response of the amplifier also A V E without feedback h /h fer ie andwidth f 2 Frequency E with feedback A V h /h fer ie R /R E andwidth f 3 Frequency E with R E and decoupling capacitor A V h /h fer ie R /R E andwidth f 1 f LOW f 2 Frequency Prof. Paolo olantonio 29 30

30 The total emitter resistance R E1 +R E2 can be tailored to suit the biasing requirements of the circuit Only part of this resistance can be decoupled (R E2 ) to produce the required smallsignal performance (R /R E1 ) Prof. Paolo olantonio 30 30