IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 33, NO. 8, AUGUST

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1 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 33, NO. 8, AUGUST A Semi-Analytical Thermal Moeling Framework for Liqui-Coole ICs Arvin Srihar, Member, IEEE, Mohame M. Sabry, Member, IEEE, an Davi Atienza, Senior Member, IEEE Abstract With the evelopment of liqui-coole integrate circuits (ICs) using silicon microchannels, the stuy of heat transfer an thermal moeling in liqui-coole heat sinks has gaine interest in the last five years. As a consequence, several methoologies on the thermally-aware esign of liqui-coole 2-D/3-D ICs an multiprocessor system-on-chips (MPSoCs) have appeare in the literature. A key component in such methoologies is a fast an accurate thermal moeling technique that can be easily interface with esign optimization tools. Conventional fully numerical techniques, such as finite-element methos, o not rener themselves to enable such an easy interfacing with esign tools an their orer of complexity is too large for fast simulations. In this context, we present a new semi-analytical representation for heat flow in force convective cooling insie microchannels, which is continuous in 1-D, i.e., along the irection of the coolant flow. This moel is base on the well-known analogy between heat conuction an electrical conuction, an introuces istribute electrical parameters in the imension consiere to be continuous, resulting in a state-space representation of the heat transfer problem. Both steay state an transient semi-analytical moels are presente. The propose semi-analytical moel is shown to have a close-form solution for certain cases that are encountere in practical esign problems. The accuracy of the moel has been valiate against state-ofthe-art thermal moeling frameworks [1] (errors 1%), with 3X spee-up of our propose moeling framework. Inex Terms Force convective cooling, liqui cooling of ICs, thermal moeling. I. INTRODUCTION LIQUID cooling of integrate circuits (ICs) using microchannels has recently gaine interest [2] [4] owing to the rising temperatures of 2-D an vertically-stacke 3-D ICs an multiprocessor system-on-chips (3-D MPSoCs). This cooling technology has been shown to be viable at ifferent levels of packaging, from etching microchannels on a copper col plate on top of the targete IC [5], to etching the microchannels irectly on the silicon ies in the case of 3-D ICs [4]. In aition to enabling further integration of CMOS circuits while maintaining safe operating temperatures better Manuscript receive November 17, 213; revise February 9, 214; accepte March 19, 214. Date of current version July This work was supporte in part by the YINS RTD project (no. 2NA21_15939) evaluate by the Swiss NSF an fune by Nano-Tera.ch with Swiss Confeeration financing, an in part by the GreenDataNet FP7 STREP project (no. 69). This paper was recommene by Associate Eitor C. C.-N. Chu. The authors are with the Embee Systems Laboratory, École Polytechnique Féérale e Lausanne, Lausanne 115, Switzerlan ( arvin.srihar@epfl.ch; mohame.sabry@epfl.ch; avi.atienza@epfl.ch). Color versions of one or more of the figures in this paper are available online at Digital Object Ientifier 1.119/TCAD than conventional air-cooling, liqui cooling also possesses the potential to increase cooling efficiency an enable energy harvesting when utilize in the large-scale atacenters. Hence, it is toute as a long-term green energy solution for next-generation atacenters [6]. Prototypes of 2-D an 3-D stacke ICs with microchannel liqui cooling have been built by various research groups aroun the worl with promising results [3], [7], [8]. An example from IBM is shown in Fig. 1, they have evelope a 3-D IC emulator with interlayer liqui cooling. Further evelopment of this technology an its large-scale use are strongly epenent upon soun early-stage esign tools capable of: 1) accurately preicting the thermal performance of these cooling technologies an 2) prescribing optimize esigns an ynamic run-time management tools that can maximize the electrical performance an energy efficiency of these systems while maintaining safe operating temperatures. At the heart of these research efforts is the nee to evelop an efficient thermal moel that can enable fast esign-space explorations. Conventional fine-graine simulations such as the finiteelement methos become infeasible for this purpose in the context of EDA owing to prohibitively large simulation times. Even the more compact methos base on finite-ifference [1], [1] an other such purely-numerical techniques o not len themselves to traitional optimization algorithms for fast thermal-aware esign ue to the significant simulation times of these numerical techniques, as well as the lack of appropriate compatibility for optimization problems. Instea, a vast number of often brute-force searches/machine learning techniques must be employe to fin optimal esigns, involving thousans of thermal simulations. This leas to long esign-times an as to the cost of prouction. In this paper, we present a new semi-analytical thermal moel for liqui-coole ICs to aress these issues. The propose semi-analytical moel is iscrete (numerical) in 2-Ds, an continuous (analytical) in 1-D, i.e., the irection of coolant flow. We buil this moel base on the well-known analogy between heat transfer an electrical circuits. In the imension the moel remains continuous, istributive electrical elements are utilize to create a transmission line-like moel for heat transfer, which is a novel approach to stuying heat transfer in liqui-coole ICs. The main contributions of this paper are as follows. 1) A new semi-analytical moel is erive that is spatially continuous in 1-D, i.e., along the irection of the flow of coolant. This semi-analytical moel is evelope for both steay state as well as transient simulations c 214 IEEE. Personal use is permitte, but republication/reistribution requires IEEE permission. See for more information.

2 1146 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 33, NO. 8, AUGUST 214 Fig. 2. Soli thermal cell an its equivalent electrical circuit. Fig. 1. Liqui-coole 3-D IC emulator built by IBM [9] an its schematic showing the location of iniviual ies an the microchannel heat sink. 2) A close-form solution is also erive for the steay state semi-analytical moel uner certain circumstances. 3) The moel has a succinct state-space form for the temperatures an heat flow variables in the moel. This form of representation lens itself to significant simulation time reuction, by values up to 3X compare to 3D-ICE [1], with negligible errors ( 1%). In aition, this representation can be easily applie in optimal esign algorithms. We emonstrate this by iscussing two recently avance an important applications of the propose moel in thermal-aware esign of liqui-coole ICs. The rest of the paper is organize as follows. Section II reviews the existing literature on the thermal moeling of liqui-coole ICs. Section III escribes the target representative problem being solve using the propose semi-analytical moel. In Section IV, the propose semi-analytical moel is presente an erive from the first principles. First, a steay state semi-analytical moel for a test structure with a single microchannel is erive. Close-form solutions are also erive for certain cases encountere in the esign of ICs. Next, the semi-analytical moel is extene for the more realistic case of multiple microchannels cooling the heat generate in an 3-D IC. Finally, the propose moel is extene for transient thermal analysis. In Section VI, we iscuss the effectiveness of our propose moel when it is eploye in state-of-the-art esign optimization schemes that aims to minimize thermal graients an maximize energy efficiency in liqui-coole ICs ([11] an [12], respectively). Finally, conclusions are presente in Section VII. II. RELATED WORK In this section, we briefly review the existing works on thermal moeling of ICs (both air- an liqui-coole). A. Thermal Moeling of Air-Coole ICs Thermal moeling of air-coole ICs is traitionally performe by invoking the equivalence between heat conuction in solis an current flow in resistance capacitance (RC) circuits. In this analogy, temperature is represente by voltage an heat flow is represente by current. Heat flow follows ohms law, an hence, thermal resistances an capacitances are calculate using the thermal conuctivity an heat capacity of the material, respectively. Current sources an voltage sources, then, represent heat sources an bounary conitions respectively. Finite-ifference approximation can be applie by iving an IC into small cuboial blocks calle thermal cells an constructing the equivalent circuit for each cell as shown in Fig. 2. Finally, a complete 3-D thermal RC gri is constructe for the entire IC. This moel can then be solve using circuit simulators methos to obtain the temperatures in the IC as a function of time. Thermal moels such as HotSpot [13] have been propose in the literature base on this principle. B. Thermal Moeling for Liqui-Coole ICs Thermal moeling of liqui-coole ICs consists of moeling the heat conuction in the soli parts of the IC as escribe above, with the aition of the following two new forms of heat transfer. 1) Convective heat transfer at the soli-liqui interface at the microchannel walls. 2) Avective transport of heat ownstream from inlet to outlet insie the microchannels ue to mass flow. Traitional theoretical treatments force convection problem in ucts or microchannels has involve representing the energy balance equations insie the microchannel as partial ifferential equations an then reucing them into orinary ifferential equations base on the specific properties of the given problem. Then, numerical techniques such as finite-element an finite-ifference methos are applie to solve for the conjugate conuction-convection problems along the entire length of the microchannels [14], [15]. In numerical fine-graine simulators, such as ANSYS CFX [16], the above moeling problem is solve by iviing the microchannel an the surrouning structures into very small cells/elements, then solving for the velocity profile of the coolant in every element, an finally calculating the heat transfer. Such methos, while being accurate, are extremely slow an are not suitable for the esign of liqui-coole ICs [9], which typically contain hunres of microchannels resulting in millions of variables to solve for. Even analytical (nonnumerical) stuies of heat transfer in microchannels in mechanical engineering, aerospace engineering an thermal engineering focus on solving of the etaile cross-sectional velocity an temperature profiles for various flow conitions (entrance, eveloping, evelope). They o not represent a compact solution suitable for system-level thermal analysis an optimization in early-stage IC esign [14], [17] [19]. Methos such as [4] can be use to simplify the heat transfer problem by assuming 1-D resistive network from the source of the heat to the inlet temperature, with the convective resistances being calculate using either numerical presimulations or empirical correlations. This moel, illustrate in Fig. 3, oversimplifies the heat transfer problem an oes not account for nonuniform heat istributions in an IC. Recently, a finite-ifference-base thermal moel for liquicoole ICs, calle 3D-ICE [1], [2], was presente. In this moel, the microchannel layers in the IC are ivie into thermal cells similar to the other soli layers as escribe in Section II-A. For the liqui thermal cells corresponing to the microchannels, an equivalent electrical circuit is constructe as shown in Fig. 4.

3 SRIDHAR et al.: SEMI-ANALYTICAL THERMAL MODELING FRAMEWORK FOR LIQUID-COOLED ICS 1147 Fig. 3. Simple 1-D moel for force convective cooling in microchannels [4]. Fig. 4. Liqui thermal cell an its equivalent electrical circuit in the 3D-ICE moel [1]. Here, the convective heat transfer from the microchannel walls into the coolant is represente using four convective thermal resistances. The thermal capacitance is use to represent heat storage in the coolant similar to solis. Two voltagecontrolle current sources are utilize to represent avection own the channel. This compact heat transfer moel insie the microchannel can be connecte to the surrouning thermal gri for the sol parts of the IC to create the complete 3-D thermal moel for liqui-coole IC, which can then be solve using circuit simulation techniques as before. The 3D-ICE moel has been proven to be accurate via experimental valiation against numerical simulators an measurements from real IC test-stacks [1], [2], [21]. However, the problem sizes still ten to be huge-hunres of thousans of unknowns for a typical IC. In aition, this metho is purely numerical, thus not lening itself to efficient esign-space exploration, esign parameters such as microchannel imensions are varie over a large range an simulations repeate. We emonstrate in the ensuing sections that the propose semi-analytical approach preserves the accuracy of this metho while overcoming the aforementione challenges. We choose this moel as the benchmark to evaluate the accuracy of the propose semi-analytical moel ue to two reasons. 1) This moel has been extensively valiate for accuracy against fine-graine numerical simulations as well as measurements from real liqui-coole ICs [1], [2], [21]. 2) This moel allows us the flexibility to incorporate any user-efine heat transfer coefficients that can also be implemente in the propose semi-analytical moel for a fair comparison of the accuracy/efficacy of the propose moel. III. BASIC CELL STRUCTURE OF THE TARGET MODEL In orer to present the propose semi-analytical moel, we must first consier the nature of the problem an the geometry of the basic cell structure for which we perform heat transfer analysis. As previously shown in Fig. 1, the target cooling technology places a number of microchannels between two silicon layers that contain the computing components. Thus, we start moeling from the basic structural component of the cooling layer, which is a single rectangular strip. This structure is shown in Fig. 5, it shows a single rectangular microchannel is surroune by silicon on all four sies. Fig. 5. Heat transfer geometries. (a) 3-D view of the test microchannel structure. (b) Cross-sectional view of the test structure at istance z from the inlet. Coolant enters from the inlet (front sie in the figure) at a volumetric flow rate of V an exits from the outlet at the rear en. The length of the microchannel is, measure along the z irection with the inlet at z =. It is in this irection, that the moel is continuous with no iscretization. Two slabs of silicon, each of thickness H Si cover the top an the bottom surfaces of the microchannel. There are active heating elements on the expose top an the bottom surfaces of these two slabs, respectively as shown in the figure. These active heating elements represent the electronic circuit fabricate on ifferent surfaces that surroun the microchannel. The variables corresponing to the top surface is esignate with the subscript 1, the variables in the bottom surface with subscript 2, an those in the microchannel with the subscript C. In aition, there are two silicon walls on the sies of the microchannel. The total with of this test structure (measure along the y irection) is W, while the microchannel itself has a with that is a function of the istance from the inlet w C (z). The height of the microchannel is fixe to H C. This assumption conforms to the traitional IC manufacturing process it is easier to change the with of the microchannels by using ifferent masks for etching, compare to varying their height uring the fabrication. A realistic twoie IC with interlayer microchannel heat sink can be visualize as multiple such test structures (Fig. 5(a)) stacke one next to the other (along the x irection), multiple microchannels running parallel to each other issipate the heat generate at the two silicon surfaces. The heat flux patters on these two ies can be uniform or nonuniform. Asie(x z plane) view of this structure at a given istance z from the inlet is shown in Fig. 6(a). T 1 (z, t), T 2 (z, t), an T C (z, t) are the temperatures in silicon an the microchannel, an q 1 (z, t), q 2 (z, t), an q C (z, t) are the heat flows in silicon an microchannel parallel to the coolant flow as inicate in Fig. 6(a). The following assumptions are applie to the test structure for the sake of simplicity an without loss of generality, to moel microchannels in ICs. 1) The heat fluxes entering from the top an the bottom surfaces of this structure are assume to be uniform along the y irection (i.e., along the with of this structure), an hence, are purely functions of istance from the inlet z (an time t, in the case of transient analysis). The heat fluxes from the top an the bottom are thus ivie by the with W an expresse as per unit length parameters ˆq i1 (z, t) an ˆq i2 (z, t).

4 1148 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 33, NO. 8, AUGUST 214 2) A constant inlet temperature at the inlet of the microchannel (T C,in ) serves as the fixe bounary conition for the moel. The temperature of the flui at the outlet is assume to be purely a function of the heat carrie out by it, with no aitional heat accumulation/issipation outsie the outlet. 3) All other expose surfaces in the structure are assume to be aiabatic with the microchannel heat sink serving as the sole issipator of heat. 4) Insie the microchannel, the avective heat transport is assume to be much larger than the conuction of heat in the flui along the irection of the flow (z), which is reasonable for all practical applications. With the above assumptions in min, the goal of the propose semi-analytical moel is to compute the temperatures of the top an bottom silicon surfaces of the cell structure (T 1 (z, t), T 2 (z, t)), an the coolant temperature (T C (z, t)) for any given set of heat flux istributions on the silicon surfaces (ˆq i1 (z, t) an ˆq i2 (z, t)). IV. PROPOSED SEMI-ANALYTICAL MODEL Since iscretize units in a thermal moeling problem (thermal cells) are represente using iscrete or lumpe electrical parameters, we hypothesize that the equivalent electrical representation for moels which are continuous in 1-D must employ istribute electrical elements such as per-unit-length resistances an capacitances. With this intuition in min, we first consier an infinitesimally small section of the test structure, of length z at istance z from the inlet as shown in Fig. 6(a). The temperatures at the top an bottom silicon surfaces (junction) an the microchannel (T 1, T 2, an T C ) an the heat flow at these locations in parallel to the microchannel (q 1, q 2, an q C ) are inicate along with the per-unit-length parameters. These parameters are as follows. 1) Per-unit-length heat fluxes ˆq i,1 (z) an ˆq i,2 (z) (expresse in W/m) entering the top an bottom silicon junctions. 2) Per-unit-length longituinal conuctance in silicon parallel to the irection of the flui flow in the microchannel ĝ l = k Si W H Si (expresse in W.m/K), k Si is the silicon thermal conuctivity. This parameter is assume to be inepenent of the istance z as there is not variation in the silicon cross-sectional imensions or material properties along its length. 3) Per-unit-length vertical conuctance from the silicon junctions ( to the flui bulk in the microchannel ĝ v (z) = 1 ĝ 1 v,con v,conv) +ĝ 1 (expresse in W/m.K), W g v,con = k Si HSi an g v,conv = h eff (z) W. This parameter combines both the vertical conuction in the silicon slab an the effective convection heat transfer (h eff (z)) atthe soli liqui interface of the microchannel. Hence, this parameter changes with the istance z, as the microchannel imensions an flui flow properties (bounary layer formation, type of flow, temperature, etc.) change. In aition, there is conuction along the silicon sie walls between the top an the bottom junctions. This parameter is neglecte in the present analysis for simplicity. It can be Fig. 6. (a) Infinitesimally small section of the test structure at istance z from the inlet. (b) Equivalent transmission line-like representation for the heat flow in the test structure. incorporate later in the moel without any loss of generality. We first erive an stuy the steay-state version of the propose semi-analytical moel for the test structure. We will then erive close-form solutions to this semi-analytical moel for specific scenarios. In the next subsection, we exten this moel to the more complex case of multiple parallel microchannels cooling an IC. Finally, we will erive the semi-analytical moel for transient analysis of the test structure. A. Steay-State Semi-Analytical Moel Using the parameters efine above, the following set of equations can be written to express the relationship between temperatures an heat flows at the far en of this section (z + z) in terms of the temperatures an heat flows at the near en (z): (1.1) T 1 (z + z) = T 1 (z) 1 ĝ l / z q 1(z) (1.2) q 1 (z + z) = q 1 (z) [T 1 (z) T C (z)] ĝ v z +ˆq i1 (z) z (2.1) T 2 (z + z) = T 2 (z) 1 ĝ l / z q 2(z) (2.2) q 2 (z + z) = q 2 (z) [T 2 (z) T C (z)] ĝ v z +ˆq i2 (z) z (3) c v V T C (z) = q C (z). (1)

5 SRIDHAR et al.: SEMI-ANALYTICAL THERMAL MODELING FRAMEWORK FOR LIQUID-COOLED ICS 1149 By rewriting the above equations an taking the limit z, we get (1.1) z T 1(z) = 1 ĝ l q 1 (z) (1.2) z q 1(z) = [T 1 (z) T C (z)] ĝ v +ˆq i1 (z) (2.1) z T 2(z) = 1 ĝ l q 2 (z) (2) (2.2) z q 2(z) = [T 2 (z) T C (z)] ĝ v +ˆq i2 (z) (3) c v V T C (z) = q C (z). The above set of equations represent a istribute heat transfer moel which is an intermeiate step in eriving the final semianalytical moel. There are some important observations to be mae in this istribute heat transfer moel before proceeing with the erivations, as escribe next. In the above sets of equations, note that (2.3) is not a ifferential equation because the heat flow in the irection of the flui flow insie the microchannel is a irect function of its temperature at any given point base on the heat flow governing equations in fluis [1] an the assumptions in Section III. B. Analogy of Telegraphers Equations Invoking the hypothesis at the beginning of this section that the electrical analogy for heat flow in a noniscretize imension must incorporate istribute electrical elements, the first four equations in (2) resemble the telegraphers equations use to escribe istribute voltages an currents in a multiconuctor transmission line [22]. The analogy between (2) an transmission lines is illustrate in Fig. 6(b). However, there are certain important characteristics of the above istribute heat transfer moel that ifferentiates it from a conventional transmission line in this analogy. 1) There are no elay/lossless terms in the istribute heat transfer moel since classical heat transfer follows a iffusive parabolic ifferential equations moel an not a wave equation. Hence, unlike a conventional transmission line, there are only lossy an amittance terms (resistances, conuctances, an capacitances). 2) Following the assumptions of aiabatic bounaries at the expose surfaces of silicon in the previous section, the longituinal heat flows q 1 (z) an q 2 (z) near the inlet an the outlet (z = an z = ) must be zero. These bounary conitions translates to a transmission line which is always open circuite at the input an the output as shown in Fig. 6(b). 3) While the conventional transmission lines are generally moele using homogenous telegraphers equations [22], the presence of istribute sources (ˆq i1 (z) an ˆq i2 (z)), reners the corresponing equations for the above istribute heat transfer moel inhomogenous requiring special solving techniques. 4) The microchannel, functioning as the heat sink, correspons to the groun/reference conuctor in a conventional transmission line that acts as a return path of currents. This groun line is typically assume to be the reference noe at all points along the length of the transmission line against which voltages are measure. In the Fig. 7. Illustration of the accumulation of heat insie the microchannel in steay state. above istribute heat transfer moel, however, the channel oes not act as an ieal groun since the absolute temperature of the flui increases as it accumulates heat from inlet to outlet. Hence, this change in the reference voltage must be taken into account an incorporate in the istribute moel for the correct simulation of temperatures. Note that if assumption 3 in Section III was roppe an the issipation of heat into the ambient was also consiere, the moel woul have an aitional istribute thermal resistance connecting one or more layers in the test structure to a groun or voltage reference (corresponing to the ambient temperature) from inlet to outlet, without changing any other aspect of the moel erivation or structure. C. Formulation of the Propose Semi-Analytical Moel As escribe above, in orer to incorporate the changing flui temperature from inlet to outlet, we must express the temperature of the flui T C (z) in (2.3) in terms of the temperatures an heat flow variables in silicon. This can be accomplishe by estimating exactly the amount of heat carrie by the flui at any istance z from the inlet, recognizing that the microchannel is the only heat sink through which all the heat generate insie the test structure can be issipate. For this, consier Fig. 7. The heat being transporte ownstream at any istance z, expresse as q C (z) must be the sum of the following. 1) The amount of heat with which the flui entere the structure at the inlet, q C,in = q C () = c v V T C,in, which is a fixe value, since the inlet temperature is assume to be constant. 2) The amount of heat generate at the silicon junctions from inlet (z = ) until the current location z. This can be expresse integrating ˆq i1 an ˆq i2 for the segment [, z]. 3) The amount of heat entering the region left of the location z (i.e., the region upstream to the current location) from the region right of this location, namely, the region ownstream to the current location via longituinal conuction insie silicon, expresse as (q 1 (z) + q 2 (z)), as illustrate in Fig. 7.

6 115 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 33, NO. 8, AUGUST 214 Hence, we can write z T C (z) = T C,in + 1 (ˆqi1 (z) +ˆq i2 (z) ) z c v V 1 c v V (q 1(z) + q 2 (z)). Substituting (3) in( ), an writing Q i1 (z) z ˆq i1(z) an Q i2 (z) z ˆq i2(z), we get T(z) T(z) = A(z) + U(z) (4) z q(z) q(z) T1 (z) q1 (z) T(z) =, q(z) = T 2 (z) q 2 (z) 1 ĝ l 1 ĝ A(z) = l ĝ v (z) ĝ v(z) ĝ v (z) c v V c v V an ĝ v (z) ĝ v(z) ĝ v (z) c v V c v V U(z) = ĝ v (z)t C,in + ĝv(z) c (Q v V i1(z) + Q i2 (z)) +ˆq i1 (z). ĝ v (z)t C,in + ĝv(z) c (Q v V i1(z) + Q i2 (z)) +ˆq i2 (z) (5) The above system of equations represents the semianalytical moel for heat transfer in the test structure in steay state. The solution to this system of equations can be written as follows: [ T(z) q(z) ] = e Ɣ(z) T() + q() Ɣ(z) = z z (3) e Ɣ(z) Ɣ(η) U(η)η (6) A(λ)λ. (7) The matrix exponential an the integration on the RHS in (6) is clearly nontrivial to compute. However, uner certain conitions, a close form solution to the temperatures in the silicon junction can be obtaine. The semi-analytical moel represente by (4) can be simplifie if the with of the microchannel w C (z) an the corresponing effective heat transfer coefficient h eff (z) are assume to be constant. This occurs when the flow is consiere to be fully evelope, which works as a reasonable approximation to the actual flow in many practical applications [23]. Hence, ĝ v (z) = ĝ v, A(z) = A, an Ɣ(z) = Az. Now,(4) can be written as z T(z) = A q(z) T(z) + U(z). (8) q(z) The solution to the above set of equations epens upon the nature of the functions ˆq i1 (z) an ˆq i2 (z). In the next subsection, the erivation of close-form solutions to this moel uner specific conitions are escribe. D. Close-Form Solutions to the Propose Semi-Analytical Moel One important feature of the propose semi-analytical moel is the possibility of eriving close form solutions to (8). This is ue to the fact that typically in the context of ICs the heat flux at the silicon junction is either uniform, or is istribute in the form of rectangular areas of ifferent uniform heat flux ensities across the 2-D surface of the silicon ie. Hence, the functions ˆq i1 (z) an ˆq i2 (z) can be partitione into piece-wise uniform regions an the integrations involve in solving the inhomogeneity of (8) can be performe over these partitions. This is illustrate as follows. For the single microchannel test structure uner consieration, the heat flux can be translate to per-unit-length heat constant flux ensities, or piece-wise constant functions of z. That is ˆq 1 i1 z < z 1 ˆq 2 ˆq i1 (z) = i1 z 1 z < z 2.. ˆq n i1 z n 1 z ˆq 1 i2 z < z 1 ˆq 2 ˆq i2 (z) = i2 z 1 z < z 2.. ˆq n i2 z n 1 z < z 1 < z 2 < < z n 1 <. (9) Note that the superscripts in the above efinitions represent the location number of the corresponing heat flux value an not a mathematical function. Case A: Assuming uniform heat fluxes, with ˆq i1 (z) =ˆq i1 an ˆq i2 (z) =ˆq i2, z, the cumulative heat flux functions in (5) can be written as Q i1 (z) =ˆq i1 z Q i2 (z) =ˆq i2 z. (1) Thus, (8) reuces to B = ĝv c v V z [ T(z) q(z) ] = A T(z) + Bz + C (11) q(z) ˆq i1 +ˆq i2, C = ĝ v T C,in +ˆq i1. (12) ˆq i1 +ˆq i2 ĝ v T C,in +ˆq i2 Solving (11) accoring to (6), we get T(z) = e q(z) Az T() z + e q() A (z η) (Bη + C) η. (13) Thus, at z =, we can write T() = e q() A T() + q() = M [ T() q() ] + N e A ( η) (Bη + C) η (14)

7 SRIDHAR et al.: SEMI-ANALYTICAL THERMAL MODELING FRAMEWORK FOR LIQUID-COOLED ICS 1151 M = e A, [ ] [ N = e A A I A 2 B + e A I] A 1 C. (15) The above equation is the close-form solution to Case A. However, remember that we o not know the temperatures at z =, i.e., T(), but we o know that all heat flows are zero at the terminations (since the expose surfaces are aiabatic), i.e., q() = q() =. Next, we rearrange the above solution such that the unknowns are on the LHS; an ivie the matrix M into four equal square sub matrices an the vector N into two equal parts as follows: M = M11 M 12, N = M 21 M 22 [ N1 N 2 ]. (16) Using the above representation, we finally obtain [ T() M 1 = 21 N ] 2 T() N 1 M 11 M 1 21 N. (17) 2 The temperatures T() obtaine above can then be substitute back into (13) to obtain the temperatures at any istance z. Hence, the complete temperature istribution at the silicon junction can be reconstructe. Case B: Assuming piecewise constant heat flux istribution on the silicon junction, the cumulative heat fluxes can be written as Q i1 (z) = Q i2 (z) = p k=1 p k=1 ˆq k il z k +ˆq p+1 ( ) i1 z zp ˆq k i2 z k +ˆq p+1 ( ) i2 z zp (18) z p = { max ({z, z 1, z 2,, z n 1 }) z p z } (19) z k = z k z k 1. Here, we set z an z n. Hence, (8) now becomes B p = C p = z T(z) = A(z) q(z) ˆq p+1 i1 +ˆq p+1 i2 ˆq p+1 i1 +ˆq p+1 i2 G i G i G i =ĝ v T C,in +ˆq p+1 + ĝv c v V i1 { p k=1 T(z) + B q(z) p z + C p (2) } ( ) ( ) ˆq k i1 +ˆqk i2 z k ˆq p+1 i1 +ˆq p+1 i2 z p. (21) Solving the above similar to Case A yiels T() = e q() A T() n zj + e q() A ( η) ( ) B j η + C j η j=1 z j 1 T() = M + N (22) q() M = e A n {( ) N = e A z j 1 e Az j 1 z j e Az j A 1 ( + + j=1 ) e Az j 1 e Az j A 2} B j ( e Az j 1 e Az j ) A 1 C j ]. (23) The equation can be rearrange an the unknown terminal temperatures can be compute similar to Case A. The above two cases, for which close-form solutions have been erive, cover a small subset of the many ifferent scenarios that coul be encountere when esigning microchannel heat sinks. But even when the problem becomes more complex an nonlinear, such as when the systems matrix A becomes a function of istance z because of changing convective resistances in a eveloping flow or when the microchannel imensions are no longer uniform but a function of istance, it woul still be possible to erive such close-form solutions if the system parameters are polynomial functions of the istance. Nevertheless, close-form solutions for such cases become too complex to erive an implement for practical applications. It is much more esirable to use numerical techniques to solve this problem uner such circumstances, as will be escribe in Section V. E. Steay-State Semi-Analytical Moel for Multiple Parallel Microchannels The theory evelope in the previous subsections can be extene to the case of multiple microchannels issipating heat generate in the two silicon junctions. This conforms closer to the realistic scenario of multiple microchannels cooling an IC with nonuniform 2-D heat flux patterns (calle the floorplan) in the active layers (e.g., the nonuniform floorplan of the UltraSPARC T1 [24]). For simplicity, consier Fig. 8(a). Here, the two test structures of with W each (calle tracks henceforth) from the previous subsection have been stacke next to each other. In this test structure, in aition to longituinal heat conuction parallel to the microchannel an the vertical heat conuction between the junction an the microchannel layer, there is also lateral heat conuction in silicon between the two tracks in both layers. This as a layer of complexity in the erivation of the propose semi-analytical moel. The corresponing istribute heat transfer moel for this structure is illustrate with the help of an infinitesimally small section of this structure in Fig. 8(b). As inicate in this figure, the temperature variables in the ifferent components of this structure are esignate as {T 11 (z), T 21 (z), T 12 (z), T 22 (z), T C1 (z), T C2 (z)}, the first subscript inicates the vertical location of the variable (the number of the layer, along

8 1152 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 33, NO. 8, AUGUST 214 Fig. 8. (a) Test structure with two tracks of microchannels stacke next to each other. (b) Infinitesimally small section of this test structure. the y irection) an the secon subscript inicates the lateral location (the number of the track, along the x irection). The corresponing heat flow an input heat flux variables are {q 11 (z), q 21 (z), q 12 (z), q 22 (z), q C1 (z), q C2 (z)} an {ˆq i11 (z), ˆq i21 (z), ˆq i12 (z), ˆq i22 (z)}. The state-space equations for the temperature variables in silicon, corresponing to (2.1.1) an (2.2.1), can be written as T(z) = q(z) (24) z T 11 (z) q 11 (z) T T(z) = 12 (z) q T 21 (z), q(z) = 12 (z) q 21 (z) T 22 (z) q 22 (z) (25) 1/ĝ l 1/ĝ = l 1/ĝ l. 1/ĝ l Similarly, the state-space equations for the heat flow variables in silicon [corresponing to (2.1.2) an (2.2.2)] can be rewritten, recognizing that there are two irections in which heat is issipate vertically into the microchannel, an lateral to the neighboring track, as z q(z) = T(z) + G vt C (z) + ˆq i (z) (26) ˆq i11 (z) TC1 (z) ˆq T C (z) =, ˆq T C2 (z) i (z) = i12 (z) ˆq i21 (z) ˆq i22 (z) ( ) ĝ v +ĝ s ĝ s = ĝ s ( ) ĝ v +ĝ s ( ) ĝ v +ĝ s ĝ s ĝ s ( ) ĝ v +ĝ s ĝ v ĝ G v = v ĝ v. ĝ v (27) Here, ĝ s = k Si H Si /W is the per-unit-length conuctance in silicon between the two tracks in the lateral irection. As in (2), we have neglecte the vertical conuction between the two layers via the silicon sie walls, without loosing generality. This can be easily inclue by slightly moifying, specifically by introucing new conuctance terms in this matrix corresponing to vertical conuction in these silicon sie walls. Then, similar to (3), the microchannel temperature vector T C (z) must be eliminate since it oes not len itself to a state-space representation (as the temperature an the heat flow in channel are irectly relate to each other). To o this, as in Section IV-A, we must write the heat accumulate in the channels until the istance z, {q C1 (z), q C2 (z)}, in terms of the other known an irreucible variables in the system. As before, we note that the heat accumulate in the channel inclues the heat that entere at the inlet with the flui owing to its constant inlet temperature q C,in, the amount of input heat generate in both the tracks an in both the layers between z = an the current location z, an finally the heat entering the region upstream to the location z from the region ownstream to this location via longituinal conuction in silicon in the respective tracks. However, in the case of multiple channels, there is also the aitional component of heat exchange between the tracks via lateral conuction in silicon, which etermines the ifferences in the amount of heat between the two channels. This can be compute by integrating this lateral heat flow (esignate as q s11 12 (z) an q s21 22 (z) with the efault irection of flow from track 1 to track 2) from inlet to z. Hence, we can write T Cj = 1 c v V q Cj = T C,in + 1 c v V ( q 1j (z) + q 2j (z) ) z [( Qi1j (z) + Q i2j (z) ) ] (q s11 12 (z) + q s21 22 ) z (28) j {1, 2}. From our efinition of the lateral heat flow variable, we know that q sj1 j2 (z) =ĝ s ( Tj1 (z) T j2 (z) ) (29) j {1, 2}. Hence, we can introuce new state space variables corresponing to the cumulative lateral heat flow Q s11 12 (z) an Q s21 22 (z) an eliminate the integral terms in (28) to create the final state-space representation as follows: z Q si1 i2(z) =ĝ s (T i1 (z) T i2 (z)) (3)

9 SRIDHAR et al.: SEMI-ANALYTICAL THERMAL MODELING FRAMEWORK FOR LIQUID-COOLED ICS 1153 i {1, 2}. Now, combining (24), (26), an (3), we get T(z) q(z) = T(z) q(z) + U(z) (31) z Q s (z) Q s (z) Q s (z) = Q s11 12 (z) + Q s21 22 (z) ĝ v /c v V ĝ v /c v V ĝ = v /c v V ĝ v /c v V ĝ v /c v V ĝ v /c v V ĝ v /c v V ĝ v /c v V T ĝ v /c v V +ĝ s +ĝ = v /c v V ĝ ĝ v /c v V, = s +ĝ s +ĝ v /c v V ĝ s ĝ v T C,in +ĝ v /c v V (Q i11 (z) + Q i21 (z)) +ˆq i11 (z) ĝ U(z) = v T C,in +ĝ v /c v V (Q i12 (z) + Q i22 (z)) +ˆq i12 (z) ĝ v T C,in +ĝ v /c v V (Q i11 (z) + Q i21 (z)) +ˆq i21 (z). ĝ v T C,in +ĝ v /c v V (Q i12 (z) + Q i22 (z)) +ˆq i22 (z) (32) The above erivation can be extene to the case of more than two tracks in a straightforwar manner. For the case of m tracks, Q s (z) woul be a vector of (m 1) new variables introuce to account for the cumulative lateral heat flow variables between the tracks. F. Transient Semi-Analytical Moel The semi-analytical moel evelope in Section IV-A can be extene for the case of transient analysis. Transient analysis in this context entails the preiction of temperatures uring a time-interval between the instant when the input heat fluxes switch to a new value until the temperatures settle own to the steay state. As escribe in Section II, the electrical analogy for transient thermal simulation involves a circuit that contains both resistors an capacitors (an RC circuit). In the propose semi-analytical moel, since we let 1-D in the computational omain remain continuous, this woul translate to an RC circuit that contains both istribute resistances an istribute capacitances in this imension. This is illustrate by consiering again the basic cell structure from Section IV-A. However, for the sake of simplicity an without loss of generality, we consier only one layer of silicon with active heating as shown in Fig. 9(a). Note that in this case, all the variables are a function of both istance z an time t. Here, T(z, t) an q(z, t) refer to the temperature an longituinal heat flow, respectively, in the silicon junction. T C (z, t) an q C (z, t) refer to corresponing variables in the microchannel. ˆq i (z, t) is the known istribute input heat flux function in the silicon junction. An infinitesimally small section of the new test structure of length z at istance z from the inlet, along with its equivalent electrical circuit, is shown in Fig. 9(b). Note that in this circuit, there are aitional pathways for the heat flow in the form of istribute capacitances Ĉ Si = c v,si W H Si an Ĉ C (z) = Fig. 9. (a) Test structure for transient analysis. (b) Infinitesimally small section of this test structure. c v,c w C (z) H C. The ifference equations for this small section can be written as (1) T(z + z, t) = T(z, t) 1 q(z, t) ĝ l / z (2) q(z + z, t) = q(z, t) [T(z, t) T C (z, t)] ĝ v (z) z Ĉ Si z t T(z, t) +ˆq i(z, t) z (3.1) c v,c V T C (z) = q C (z) (3.2) q C (z + z) = q C (z) [T C (z, t) T(z, t)] ĝ v (z) z Ĉ C (z) z t T C(z, t). (33) By rearranging the above equations, substituting (33.3.1) in substituting (33.3.2), then taking the limit z an finally writing κ(z) = w C (z)h C /V, we get T(z, t) T(z, t) q(z, t) = A(z) q(z, t) + B(z) T(z, t) q(z, t) z T C (z, t) T C (z, t) t T C (z, t) + U(z, t) (34) 1/ĝ l A(z) = ĝ v (z) ĝ v (z) +ĝ v /c v V ĝ v /c v V B(z) = Ĉ Si, U(z, t) = ˆq (35) i. κ(z) The above partial ifferential equations can be converte to orinary ifferential equations by numerically integrating the equations in time. For this, we choose the backwar Euler

10 1154 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 33, NO. 8, AUGUST 214 metho with a sampling time interval h. Hence, at the n th time-point uring the simulation, we can write T(z, n) ( q(z, n) = A(z) + B(z) ) T(z, n) q(z, n) z T C (z, n) h T C (z, n) (36) B(z) T(z, n 1) q(z, n 1) + U(z, n). h T C (z, n 1) If the values of the state variables at the previous time-point n 1 are known an can be consiere as input variables, the above system of equations become similar in form to (4). Theoretically, a solution similar (6) can be erive for these system of equations. However, a close-form expression for the state variables at any given time point n is extremely ifficult to compute as it woul require the knowlege of the cumulative state variables at the previous time-point at all points along the length of the test structure (i.e., the state variables {T(z, n 1), q(z, n 1), T C (z, n 1)} integrate from z = to any other point z). This is very rarely known, even when the matrices A an B are constant matrices that are not a function of z. Hence, only numerical solutions are practically feasible for the transient simulation of the propose semi-analytical moel in (36). Fig. 1. Input heat flux istributions for the example in Case A. Fig. 11. Input heat flux istributions for the example in Case B. V. VALIDATION RESULTS In this section, we show the effectiveness an accuracy of the propose moel with respect to the compact thermal moel, namely 3D-ICE [1]. We first start by valiating the steay-state an transient moels. Then, we show the traeoffs between the accuracy an spee-up between the propose moel an 3D-ICE. Fig. 12. Comparison of junction temperature istributions for the example of Case A: semi-analytical moel versus 3D-ICE. TABLE I SAMPLE TEMPERATURE RESULTS AND MAXIMUM ERROR WITH RESPECT TO 3D-ICE FOR CASE A IN SECTION IV-D A. Steay-State Moel Valiation To emonstrate the valiity of the propose semi-analytical moel an its close-form solution, an example with a single track is consiere, which has the same structure as in Fig. 5. We use the following values for the material an structure parameters of the iniviual tracks: H Si = H C = W = 1 μm, w C = 5 μm, = 1 mm k Si = 13 W/m K, k C =.6 W/m K, c v = kj/m 3 K V =.48 ml/min, T C,in = 3 K, h eff = h w C + 2H C, W Nu h = k f (37) h [23] [ Nu = w ( ) 2 C wc H C H C ( ) 3 ( ) 4 ( ) ] 5 wc wc wc H C (38) The nusselt number above has been erive for laminar flows in microchannels uner fully evelope conitions [23]. Integrate microchannels typically encounter liqui velocities of the orer of 1 m/s. For microchannel cross-sectional H C H C imensions of a few 1 s or 1 s of micrometers, this translates to Reynols numbers of the orer of 2 8 resulting in an extremely stable laminar flow justifying the assumption of such conitions for the propose moel [9]. First consier solution for the uniform heat flux istribution consiere in Section IV-D (Case A). The heat flux istributions on both layers are uniform an are set to 5 W/cm 2 an 1 W/cm 2, respectively, as shown in Fig. 1. The semi-analytical moel for this example was constructe an solve using (14) an the junction temperature istributions {T 1 (z), T 2 (z)} were compute. The problem was also solve using 3D-ICE [1] an the corresponing junction temperatures were also compute. The problem size in the 3D-ICE moel (number of noes) was 33. The comparison of the temperature plots is shown in Fig. 12. The maximum ifference in temperatures between the two methoologies was.23% (measure with respect to the temperature eviation from the initial state of 3 K). The results are tabulate in Table I. The close-form solution for the nonuniform heat flux istribution (Case B) can also be valiate in a similar way. Therefore, we consier an example similar to the one use

11 SRIDHAR et al.: SEMI-ANALYTICAL THERMAL MODELING FRAMEWORK FOR LIQUID-COOLED ICS 1155 Fig. 14. Input heat flux istributions for the example in Section IV-E. Fig. 13. Comparison of junction temperature istributions for the example in Case B: semi-analytical moel versus 3D-ICE. TABLE II SAMPLE TEMPERATURE RESULTS AND MAXIMUM ERROR WITH RESPECT TO 3D-ICE FOR CASE B IN SECTION IV-D TABLE III SAMPLE TEMPERATURE RESULTS AND MAXIMUM ERROR WITH RESPECT TO 3D-ICE FOR THE EXAMPLE IN SECTION IV-E for Case A. The only ifference is the istribution of the heat flux as shown in Fig. 11. Here, there are two regions in both the layers with ifferent heat fluxes. The temperature istributions resulting from these input heat fluxes using both methos, namely, the close-form solution to the propose semi-analytical moel in (22) an 3D-ICE, are compare in Fig. 13. The maximum ifference between temperatures obtaine using the two methos in this case was.37%. The results are shown in Table II. As explaine in Section IV-D, even though close-form solutions exist for the propose semi-analytical moel uner certain circumstances, it is more practical to use numerical solvers to compute the temperatures in thermal-aware esign problems. Hence, an experiment is performe the propose semi-analytical moel is solve using a numerical solver an then compare against 3D-ICE. For this, consier the case of two tracks of microchannels as shown in Fig. 8 (escribe in Section IV-E). The material an structural parameters are the same as those given above for the single track case. The heat flux istributions assume in this case are shown in Fig. 14.The state-space form of the semi-analytical moel in (4) lens itself to easy implementation in popular numerical ifferential equation Fig. 15. Comparison of junction temperature istributions for the example in Section IV-E: semi-analytical moel (solve using BVP4C [25]) versus 3D-ICE. solvers. As escribe in Section IV-B, since the semi-analytical moel represents a bounary value problem with the heat flows known to be zero at z = an z = (the aiabatic conitions at the terminals of the structure), bounary value problem solvers, such as the BVP4C package in MATLAB [25], can be use to obtain quick solutions to the temperature istributions for a wie variety of scenarios. The corresponing comparison of temperatures obtaine by solving the propose semi-analytical moel in (31) using the BVP4C solver an those obtaine from 3D-ICE (problem size 66) are plotte in Fig. 15. The maximum temperature ifference measure in this case was.27%. The results are shown in Table III. B. Transient Moel Valiation In aition to the steay-state moel valiation, the transient thermal moel is valiate by comparison with 3D-ICE. A case of uniform input heat flux switching between 25 an 5 W/cm 2 uring a 5 ms time interval is applie to the test structure in Fig. 9, with the parameters mentione before in Section V-A. The total simulation time interval is 5 ms long an the input heat flux starts switching 1 ms after the simulation begins. The propose semi-analytical moel (36) with a time-step of 1 ms was solve using the BVP4C solver, an the transient temperature results were compare with the results from 3D-ICE. Sample comparison of the temperature waveforms obtaine from the mile of the junction (T(z = 5mm, t)) is plotte in Fig. 16. The maximum ifference in the temperatures obtaine at this location for all time points, with respect to the maximum temperature eviation from the initial conitions (3 K) was.24%. C. MPSoC Simulation Valiation After the valiation using rather simplistic case-stuies, we exten the valiation of the propose moel against 3D-ICE by

12 1156 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 33, NO. 8, AUGUST 214 Fig. 16. Comparison of transient temperature waveforms: semi-analytical moel (solve using BVP4C) versus 3D-ICE. Fig. 17. Schematic iagram of the UltraSPARC T1-base 3-D MPSoC use in this valiation [24]. performing steay-state simulations on a complete two-layere 3-D MPSoC with interlayer liqui cooling. The simulate 3- D MPSoC is base on UltraSPARC T1 Niagara MPSoC [26], an the 3-D MPSoC structure aopte in this simulation has been use in several works [1], [11], [24]. Fig. 17 shows the schematic iagram of the targete 3-D MPSoC. More etails on the power figures of this architecture can be foun in [26]. All the floorplan elements of this 3-D MPSoC are assume to be functioning at 1% activity issipating the maximum possible power. There are 1 microchannels in the channel layer, each of with 1 μm an a pitch of 1 μm. The flow rate of the water coolant through the microchannel cavity is 48 ml/min. In this valiation, we compare between the two moels (i.e., propose an 3D-ICE) by using the following criteria: while the propose moel is continuous in the flui flow irection, it is iscrete in the irections normal to the flui flow. In this respect, we vary the iscretization size in several cases. In each case, we group the microchannels an erive the equivalent cavity meia, power consumption, an heat transfer parameters. For the targete case we split the 1 channels by the following factors {4, 8, 16, 32, 64}. The exact same splits are use in the 3D-ICE splits, in aition to the iscretization along the microchannel by using a cell length of 1 μm. We plot the thermal map generate by the propose moel of both layers in Fig. 18. Fig. 19 shows the simulation time an the error percentage ifference between the propose moel an 3D-ICE. From this figure, we can euce that the propose moel achieves high accuracy, with only.18% (or.51 K) maximum error, with respect to 3D-ICE. These small errors are ue to the fact that the moels built in 3D-ICE an the propose semi-analytical approach are similar in terms of their lateral iscretizations an the assumptions of neglecting vertical conuction via microchannel walls. This error oes not increase much with Fig. 18. Temperature maps of the two-ie UltraSPARC T1 (Niagara) 3-D MPSoC simulate using the propose semi-analytical moel. (a) Core layer. (b) Cache-memory layer. All temperatures in o C. even finer problem efinition. For example, when the 3D-ICE representation is iscretize at a much finer level, the error increases to about 2%. The errors for transient simulations also show similar behavior. D. Observations on Moel Performance an Efficacy Fig. 19 also shows that the propose moel achieves better speeup figures compare to 3D-ICE, with values up to 3X in the illustrate case stuy. This is mainly cause by treating the heat issipation along the channel as a continuous omain. By this treatment, no numerical approximations are neee in this irection, hence reucing the formulate thermal problem size. However, it is important to mention that this spee up can be recovere by increasing the cell size. If the cell size is change from 1 μm to 1 μm, 3D-ICE-base thermal simulation is 5% faster than the propose moel. The claime speeup (3X) comes at the cost of increase complexity in the solving methoology. The limitations of the propose semi-analytical moel can be summarize as follows. 1) The propose moel is faster than fully numerical moels such as 3D-ICE only when such moels are use with very fine iscretization as escribe above. 2) The propose semi-analytical moel requires extensive erivations an preprocessing as is clear from the preceing sections. The erivations of the moel an their close-form solutions become even more complex, when the heterogeneity of the structural an materials (e.g., aitional layers, TSVs, conuction via microchannel walls, etc.) in a real 3-D IC are inclue, since that woul imply that the conuction elements of the A matrix in (8) become functions of the istance making the evaluation of matrix exponentials an integrals nontrivial. Incluing such esign complexities in fully numerical moels such as 3D-ICE is very straightforwar as the parameters only the corresponing iscretization units or thermal cells woul nee to be change. 3) Moreover, every time any of these esign features are change, this preprocessing must be repeate. Again, note that incluing these aspects in a purely numerical moel like 3D-ICE is very straightforwar. In light of the above limitations, it is clear that extensive thermal simulations for conventional esign-space exploration is not the best use of the propose semi-analytical moel when compare to conventional numerical simulators; even though,

13 SRIDHAR et al.: SEMI-ANALYTICAL THERMAL MODELING FRAMEWORK FOR LIQUID-COOLED ICS 1157 Fig. 19. Thermal simulation time of the propose semi-analytical moel an 3D-ICE, as well as the maximum error percentage between the propose moel an 3D-ICE for ifferent problem sizes. Fig. 2. Convective resistance (inverse of the conuctance) versus channel with for a fixe channel height uner fully-evelope conitions [23]. the propose semi-analytical moel provies a very compact an elegant mathematical representation of heat transfer in a liqui-coole 3-D MPSoC. Instea, the primary application for this semi-analytical moel is in the early-stage optimize esign of liqui-coole ICs as escribe in the ensuing sections. VI. APPLICATIONS OF THE PROPOSED SEMI-ANALYTICAL MODEL: THERMAL GRADIENT MINIMIZATION AND ENERGY EFFICIENCY MAXIMIZATION The state-space form of the semi-analytical moel erive in the previous section ais in rapi temperature-aware esignspace exploration an optimization of liqui-coole 3-D-ICs. We briefly present an application that we have implemente base on this moel in the ensuing subsections. This application provies ifferent ways of performing channel with moulation, i.e., esigning an optimal microchannel with function that can be fabricate on an IC, in orer to minimize a specific esign cost while respecting other esign constraints. In orer to accomplish this, optimal control techniques are utilize an combine with the propose semi-analytical moel. By combining these techniques, significant spee-ups are obtaine in fining the optimal solution when compare to other thermal simulation frameworks. More etaile information about these novel esign algorithms can be foun in [11] an [12]. A major challenge in the robust esign of ICs is the large thermal graients that exist on the IC junction (see Section II-B) in a very small area. In liqui-coole ICs, these thermal graients arise out of both nonuniform heat flux signatures of multicore processors [26], an the accumulation of heat by the coolant as it flow from inlet to outlet proucing a nonuniform cooling of the IC surface [11]. Large thermal graients can unermine the reliability an lifetime of an IC [27]. This problem can be overcome by carefully esigning microchannel heat sinks. Specifically, the cross-sectional aspect ratio(w C (z)/h C ) of a channel can be fine-tune at various points along the channel to change local cooling efficiencies. The relationship between convective resistance an local channel with (for a constant channel height) is illustrate in Fig. 2 [23]. Hence, microchannel withs can be moulate in an IC to create more uniform temperatures. However, care must be taken to not excee esign consierations such as minimum spacings for TSVs an maximum pressure rops in the channels. In orer to accomplish this, the theory of optimal control [28] was applie to the semi-analytical moel in (4) to Fig. 21. (a) Channel with function an (b) corresponing temperature istributions obtaine using the optimal esign algorithm base on channel with moulation. Comparisons against the results from using the minimuman the maximum-possible uniform channel withs are also shown [11]. fin the optimal channel with profile w C (z) such that thermal graients in an IC are minimize. Experiments were performe for ifferent test cases with both uniform an nonuniform input heat fluxes. Numerical results confirme that in comparison to uniformly narrow an wie channels, optimally moulate channels can prouce lower in fact theoretically minimum thermal graients in an IC. The results shown for a uniform input heat flux can be seen in Fig. 21 [11]. Note that the mentione results [11] have been possible using the optimal control theory with relatively small execution time solely because of the state-space form of the propose semi-analytical moel that provies a very concise representation of all the useful variables in the system. To illustrate the effectiveness of our moel in reucing the execution time, we run the simulation using both 3D-ICE an the propose moels. Since the optimization algorithm complexity is O(N 2 ) [28], the optimal control problem achieves the intene solution at least 9X faster compare to eploying 3D-ICE to the optimization loop. The optimal control-base esign of microchannels escribe above has been moifie for another application, namely, to improve the energy efficiency of the cooling systems in a microprocessor [12]. For this, the efinition of the cost function was change to the pumping energy consume by the coolant insie the microchannel. This application, calle GREENCOOL reuces the coolant pumping energy cost up to 8% when compare to conventional straight channels. More etails about this application can be foun in [12]. VII. CONCLUSION A new semi-analytical moel for force convective cooling in microchannels has been presente. The propose semianalytical moel has a transmission line-like structure an

14 1158 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 33, NO. 8, AUGUST 214 provies concise state-space representation for heat transfer in liqui-coole microchannels. This new representation can be use in the esign an evaluation of avance liqui-coole heat sinks for ICs. Both steay-state as well as transient moels have been presente for single- or parallel- multiple microchannel cooling systems. Close-form solutions for the moel have been erive for specific cases, while numerical solutions can be use for all other cases. Examples emonstrating the accuracy of the moel have been presente for each case. Finally, two applications of the moel, which are of practical interest in thermal engineering of ICs, have been iscusse. REFERENCES [1] A. Srihar, A. Vincenzi, M. Ruggiero, T. Brunschwiler, an D. Atienza, 3D-ICE: Fast compact transient thermal moeling for 3D ICs with inter-tier liqui cooling, in Proc. ICCAD, San Jose, CA, USA, 21, pp [2] B. Agostini et al., State of the art of high heat flux cooling technologies, Heat Transfer Eng., vol. 28, no. 4, pp , 27. [3] D. B. Tuckerman an R. F. W. Pease, High-performance heat sinking for VLSI, IEEE Electron Device Lett., vol. 2, no. 5, pp , May [4] T. Brunschwiler et al., Interlayer cooling potential in vertically integrate packages, Microsyst. Technol., vol. 15, no. 1, pp , 29. [5] S. Zimmermann et al., Aquasar: A hot water coole ata center with irect energy reuse, Energy, vol. 43, no. 1, pp , 212. [6] T. Brunschwiler, B. Smith, E. Ruetsche, an B. Michel, Towar zeroemission ata centers through irect reuse of thermal energy, IBM J. Res. Develop., vol. 53, pp. 11:1 11:13, May 29. [7] F. Alfieri et al., 3D integrate water cooling of a composite multilayer stack of chips, J. Heat Transfer, vol. 132, no. 12, p , Sep. 21. [8] B. Dang, M. Bakir, D. Sekar, C. King, an J. Meinl, Integrate microfluiic cooling an interconnects for 2D an 3D chips, IEEE Trans. Avance Packag., vol. 33, no. 1, pp , Feb. 21. [9] T. Brunschwiler et al., Heat-removal performance scaling of interlayer coole chip stacks, in Proc. IEEE 12th ITherm, Las Vegas, NV, USA, Jun. 21, pp [1] H. Mizunuma et al., Thermal moeling an analysis for 3-D ICs with integrate microchannel cooling, IEEE Trans. Comput.-Aie Design Integr. Circuits Syst., vol. 3, no. 9, pp , Sep [11] M. M. Sabry, A. Srihar, an D. Atienza, Thermal balancing of liqui-coole 3D-MPSoCs using channel moulation, in Proc. DATE, Dresen, Germany, 212. [12] M. M. Sabry, A. Srihar, J. Meng, A. Coskun, an D. Atienza, GreenCool: An energy-efficient liqui cooling esign technique for 3-D MPSoCs via channel with moulation, IEEE Trans. Comput.-Aie Design Integr. Circuits Syst., vol. 32, no. 4, pp , Apr [13] W. Huang et al., Hotspot: A compact thermal moeling methoology for early-stage VLSI esign, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 14, no. 5, pp , May 26. [14] F. Incropera, D. Dewitt, T. Bergman, an A. Lavine, Funamentals of Heat an Mass Transfer. New York, NY, USA: Wiley, 27. [15] M. N. Ozisik, Finite Difference Methos in Heat Transfer. Boca Raton, FL, USA: CRC Press, [16] ANSYS CFX [Online]. Available: [17] J. Sucec, Exact solution for unsteay conjugate heat transfer in the thermal entrance region of a uct, J. Heat Transfer, vol. 19, no. 2, pp , [18] W. Khan an M. Yovanovich, Analytical moeling of flui flow an heat transfer in microchannel/nanochannel heat sinks, J. Thermophys. Heat Transfer, vol. 22, no. 3, pp , 28. [19] S. Shahsavari, A. Tamayol, E. Kjeang, an M. Bahrami, Convective heat transfer in microchannels of noncircular cross sections: An analytical approach, J. Heat Transfer, vol. 134, no. 9, p. 9171, Jun [2] A. Srihar, A. Vincenzi, M. Ruggiero, T. Brunschwiler, an D. Atienza, Compact transient thermal moel for 3D ICs with liqui cooling via enhance heat transfer cavity geometries, in Proc. THERMINIC, Barcelona, Spain, 21, pp [21] A. Srihar et al. 3D-ICE [Online]. Available: [22] C. Paul, Analysis of Multiconuctor Transmission Lines. NewYork,NY, USA: Wiley, [23] R. Shah an A. Lonon, Laminar Flow Force Convection in Ducts. New York, NY, USA: Acaemic Press, [24] M. M. Sabry et al., Energy-efficient multi-objective thermal control for liqui-coole 3D stacke architectures, IEEE Trans. Comput.-Aie Design Integr. Circuits Syst., vol. 3, no. 12, pp , Dec [25] BVP4C MATLAB Solver [Online]. Available: [26] A. Leon et al., A power-efficient high-throughput 32-threa SPARC processor, ISSCC, vol. 42, no. 1, pp. 7 16, 27. [27] C. J. Lasance, Thermally riven reliability issues in microelectronic systems: Status-quo an challenges, Microelectron. Rel., vol. 43, pp , Dec. 23. [28] K. L. Teo et al., A Unifie Computational Approach to Optimal Control Problems. Englan, U.K.: Longman Scientific an Technical, Arvin Srihar (M 7) receive the Ph.D. egree in electrical engineering from École Polytechnique Féérale e Lausanne, Lausanne, Switzerlan, 213. He is currently a Post-Doctoral Researcher with IBM Research, Zurich. He has authore 3D-ICE, the first compact transient thermal simulator for 2-D/3-D ICs with liqui cooling, which is currently being use by researchers in over 2 universities an laboratories worlwie. Mohame M. Sabry (M 12) receive the M.Sc. an Ph.D. egrees in electrical an computer engineering from Ain Shams University, Cairo Governorate, Egypt, an from École Polytechnique Féérale e Lausanne (EPFL), Lausanne, Switzerlan, in 28 an 213, respectively. He is currently a postoctoral research fellow at Stanfor University an a visiting scholar in the Embee Systems Lab, EPFL. His current research interests inclue system esign an resource management methoologies in embee systems, an multiprocessor system-on-chips (MPSoCs), especially temperature an reliability management of 2-D an 3-D MPSoCs, with particular emphasis on emerging computational an cooling technologies. Dr. Sabry was the recipient of the Swiss National Science Founation Early Post-Doctoral Mobility Fellowship in 213. Davi Atienza (M 5 SM 13) receive his MSc an PhD egrees in computer science an engineering from UCM, Spain, an IMEC, Belgium, in 21 an 25, respectively. He is currently an Associate Professor of Electrical Engineering an Director of the Embee Systems Laboratory at École Polytechnique Féérale e Lausanne, Lausanne, Switzerlan. His current research interests inclue system-level esign methoologies for high-performance multiprocessor system-on-chip (MPSoC) an low-power embee systems, incluing new 2-D/3-D thermal-aware esign for MPSoCs, ultralow power system architectures for wireless boy sensor noes, HW/SW reconfigurable systems, ynamic memory optimizations, an network-on-chip esign. He has co-authore over 2 publications in peer-reviewe international journals an conferences, several book chapters, an eight U.S. patents in these fiels. Dr. Atienza was the recipient of the IEEE Council on Electronic Design Automation (IEEE CASS) Early Career Awar in 213, the ACM SIGDA Outstaning New Faculty Awar in 212, an the Faculty Awar from Sun Labs at Oracle in 211. He is currently a Distinguishe Lecturer of the IEEE CASS. He was also the recipient of the two Best Paper Awars at the IEEE/IFIP VLSI-SoC 29 an CST-HPCS 212 conference, an five Best Paper Awar nominations at the DAC 213, DATE 213, WEHA-HPCS 21, ICCAD 26, an DAC 24 conferences. He serves/serve as an Associate Eitor of the IEEE TRANSACTIONS ON COMPUTERS PUBLICATION, the IEEE DESIGN AND TEST OF COMPUTERS, the IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, an Elsevier Integration.