Dainippon Screen Mfg. Co., Ltd , Takamiya, Hikone, Shiga , Japan. IMEC vzw, Kapeldreef 75, B-3001 Leuven, Belgium

Transcription

1 Solid State Phenomena Vols (2009) pp Online available since 2009/Jan/06 at (2009) Trans Tech Publications, Switzerland doi: / All Wet Photoresist Strip by Solvent Aerosol Spray M. Wada 1,2, a, K. Sano 1, J. Snow 1, R. Vos 2, L. H. A. Leunissen 2, P.W. Mertens 2 and A. Eitoku 1 1 Dainippon Screen Mfg. Co., Ltd , Takamiya, Hikone, Shiga , Japan 2 IMEC vzw, Kapeldreef 75, B-3001 Leuven, Belgium a m.wada@screen.co.jp Keywords: Solvent, photoresist removal, aerosol spray, NMP, DMSO Introduction The introduction of metal gates and high-k dielectrics in FEOL and porous ULK dielectrics in BEOL presents severe issues [1] and leads to the requirement of new chemistries and processes. A major challenge in cleaning is the removal of photoresist (PR) in both FEOL and BEOL. In current semiconductor device fabrication flow, the photoresist strip process in FEOL is mostly achieved by applying a sequence of plasma ashing followed by a wet-clean step with sulfuric-peroxide mixture (SPM). But in general, ashing leads to strong oxidation or etching of silicon substrate. Hence, several approaches for ashless PR strip have been reported, such as hot SPM [2] and the combination of a pre-treatment using high velocity CO 2 aerosol [3]. But in particular for metal gate first integration schemes, individual metal materials are exposed after gate patterning. The photoresist after ion-implant on extension and halo regions for nmos/pmos has to be removed from the substrate without any attack to the gate materials. Needless to say, SPM does not have enough compatibility against presently reported materials, such as TiN, W and WN for metal gate and LaO and AlO for high-k capping layer [4]. Cleaning approaches by using the dissolution and the swelling effect in solvent are gaining renewed interest [5] and have been considered for the application of post-etch photoresist removal on porous low-k dielectrics [6] in BEOL. This study reports on ion-implanted resist removal using solvent aerosol spray and reports the effect to the electrical performance. Experimental 300mm whole wafer and/or pieces were used for these experiments. Silicon wafers were coated with KrF DUV (JSR) resist and subsequently ion-implanted with several low/high dose conditions with As and B at levels of 1-5 E14-15 atoms/cm 2 using energy values of 1-5 kev. All wet processes using solvent and additional post cleaning by dhcl or APM were carried out in a Dainippon Screen single wafer cleaning tool (DNS, SU3000). Solvent was heated up and supplied from an aerosol spray nozzle together with appropriate nitrogen gas in order to apply the physical force. Physical force can be controlled by N 2 flow rate (Range from 0 to100 L/min). Photoresist removal on the wafer surface was assessed using different methods, i.e. KLA-Tencor Surf Scan SP2 LPD (Light Point Defect > 0.1um size and Haze-mode measurement), optical microscope and SEM. With the n/pmos device composed of Poly-Si/SiON/Si-substrate, the impact of different PR strip processes (dry and solvent wet strip) on electrical performance was investigated. For the solvent wet strip process, common conditions such as dispense time, temperature and N 2 flow (through the aerosol nozzle), were selected for each n/pmos strip. MP and DMSO-based solvents This study focused on the use of n-methylpyrollidone (NMP) and dimethylsulfoxide (DMSO) based solvents. These are proven solvents that are used in microelectronic manufacturing, e.g. resist stripping applications in lithography. These solvents exhibit a high polarity as defined by a high dielectric constant, which aids in the dissolution character for polymers. All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of TTP, (ID: , Pennsylvania State University, University Park, United States of America-15/06/14,05:39:32)

2 286 Ultra Clean Processing of Semiconductor Surfaces IX Results and discussion Effect of aerosol spray process Fig. 1 compares representative optical micrographs with different solvent strip conditions. The sample was coated with ion-implanted resist (As 1E15 5keV) and exposed to solvent aerosol spray with (b) and without (a) nitrogen gas and high/low solvent temperatures. The results clearly indicate that the strong physical force using aerosol spray with N 2 and high temperature during solvent dispensing promotes effective PR removal. Fig. 2 shows SP2 haze measurement results on the surface after the solvent wet strip process. The haze after solvent exposed with low flow rate N 2 or without N 2 showed high value comparatively (10ppm), although at the condition with high N 2 flow rate, such as over 60 L/min of N 2, it resulted in low and constant haze value (2-3ppm). The use of DMSO instead of NMP also showed similar removal performance. On this process application, the requirements dictate complete PR removal, as well as a damage-free process to the underlying gate stack structures. From other experimental results, it is reported that a gate stack structure collapses when over 80 L/min of N 2 is applied. Therefore 60 L/min of N2 flow is sufficient to achieve enough physical force for PR removal without gate collapse. Effect of post cleaning No residue was observed by optical microscopy after high temperature solvent process with optimized aerosol spray, although small amounts of ion-implanted resist residues were still present on the SP2 LPD map (See Fig. 4 (a)) and SEM images at the boundary of nmos and pmos (Fig. 3). But as shown in Fig. 4 (b) and 5, those residual resist particles can be reduced by additional post cleaning using dhcl or APM aerosol spray. It is considered that positively charged resist particles in solvent or DIW solution are strongly adhered on the substrate and then the control of surface potential on substrate by dhcl solution and/or oxidizing by APM lead to their detachment. The same phenomenon was reported [7] using SiO 2 and cross-linked poly-methy-methacrylate (PMMA) as model particles for generic cleaning application and hypothetical post-etch PR crust in solvent and DIW. Electrical test results Figure 6 shows the I on -I off characteristic on nmos device with POR (Process of Record) dry resist strip and solvent wet resist strip processes after extension and halo implant (B 5keV, 5.5E13, As 1keV, 1E15). In spite of seeing small amounts of residue on the boundary areas of nmos/pmos after solvent strip in the SEM image (See Fig. 3), I on -I off characteristics on both dry and wet solvent strip were comparable. And Figure 7 shows C ov (Capacitance on overlap regions under the gate structure) on the devices with different strip process. Both for nmos and pmos device, solvent wet resist strip resulted in higher C ov than the dry strip, which might imply a reduction of dopant loss inside the extension or halo regions during the PR strip process. Conclusion A review and demonstration of opportunities for solvent use in microelectronic manufacturing has been conducted. The combination of selected solvents and the appropriate aerosol dispense proved the possibility of replacement from the conventional SPM process. While there was still some small amount of residues present on the boundary regions of nmos/pmos, further studies will be conducted to define the condition to enable complete removal. References [1]P. W. Mertens et al., International Semiconductor Technology Conference (ISTC 2008) March 15 17, 2008, Shanghai, China [2]H. Takahashi, ECS transactions Cleaning and Surface Conditioning Technology in Semiconductor Device Manufacturing 10, p.189 (2007)

3 Solid State Phenomena Vols [3]G. G. Totir et al., ECS transactions Cleaning and Surface Conditioning Technology in Semiconductor Device Manufacturing 10, p.219 (2007) [4]R. Vos, S. Arnauts, I. Bovie, B. Onsia, S. Garaud, K. Xu, Y. Hongyu, S. Kubicek, E. Rohr, T. Schram, A. Veloso, T. Conard, L. Leunissen and P. Mertens, ECS transactions Physics and Technology of High-k Gate Dielectrics 5, p.275 (2007) [5]G. Kvakovszky, A. McKim and J. Moore, ECS transactions 11, p (2007) [6]M. Claes et al., Processngs of UCPSS2006, Solid State Phenomena Vol. 134 p.325 (Trans Tech Pub., Zuerich, Swiserland, 2008) [7]F. Barbagini, T. Janssens, T. Bearda, S. Armini, J. Van Hoeymissen, P. Mertens and J. Fransaer, ECS transactions 10, p.101 (2007) (a) Solvent without N 2 at 65deg.C (b) Solvent with 80L/min N 2 at 65deg.C (c) Solvent at RT with aerosol spray (d) Solvent at 65deg.C with aerosol spray Figure 1. Optical microscope images after solvent process for 3min with different spray and temperature conditions DWO Haze (ppm) No N2 gas N2=20L/min N2=40L/min N2=60L/min N2=80L/min DMSO 60L/min Solvent Spray Time (sec) Figure 2. SP2 DWO haze value after solvent strip of ion implanted resist with use of different solvent and N 2 flow Figure 3. SEM image at the boundary of nmos and pmos after solvent strip process

4 288 Ultra Clean Processing of Semiconductor Surfaces IX (a) After solvent only (b) additional APM clean Figure 4. SP2 LPD map after the solvent PR strip and additional APM clean (Particle size: 0.1um up) LPD count (0.1um up) Solvent only Overload O3 rinse dhcl rinse 400 APM rinse Figure 5. SP2 LPD count after the solvent PR strip and several kinds of post clean 1.E-03 Ioff_is (A/um) 1.E-04 1.E-05 1.E-06 1.E-07 1.E-08 POR : Dry strip Wet strip : APM 1.E Ion (A/um) Cov on n/pmos (ff/um) Capacitance at the overlap region Gate STI POR=Dry Solvent APM NMOS PMOS Figure 6. I on /I off characteristics on nmos after different PR strip process Figure 7. Capacitance at the gate overlap region on n/pmos after different PR strip process

5 Ultra Clean Processing of Semiconductor Surfaces IX / All Wet Photoresist Strip by Solvent Aerosol Spray /